DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of invention I, claims 1-14, in the reply filed on 12/04/2025 is acknowledged.
Claims 15-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 12/04/2025.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee (US 2020/0365657).
Regarding claim 1, Lee discloses, in FIGS. 2A-2C and in related text, a device structure, comprising:
first electrically conductive lines (16) that are laterally spaced apart from each other;
second electrically conductive lines (10) that are vertically spaced apart from the first electrically conductive lines and are laterally spaced apart from each other;
a two-dimensional array of magnetoresistive random access memory (MRAM) pillars (MTJ structure 14) located between the first electrically conductive lines and the second electrically conductive lines, wherein each of the MRAM pillars comprises a respective reference layer, a respective nonmagnetic tunnel barrier layer, and a respective free layer; and
a two-dimensional array of carbon-based layers (15) contacting surfaces of the first electrically conductive lines (16) and surfaces of the two-dimensional array of MRAM pillars (14) (see Lee, [0033], [0037], [0040], [0057], [0069]).
Regarding claim 14, Lee discloses the device structure of claim 1.
Lee discloses a computer system (1000) comprising a computer memory (1010) containing the device structure of Claim 1 (see Lee, FIG. 5, [0077], [0079]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2, 5, 7, 10-13 are rejected under 35 U.S.C. 103 as being unpatentable over Wu (US 2023/0371279) in view of Seto (US 2016/0072055) and Kim (Ik-Soo Kim et al., Amorphous Carbon Films for Electronic Applications, Adv. Mater. 2023, 35, 2204912, first published online November 21, 2022).
Regarding claim 1, Wu discloses, in FIG. 1 and in related text, a device structure, comprising:
first electrically conductive lines (12) that are laterally spaced apart from each other;
second electrically conductive lines (112) that are vertically spaced apart from the first electrically conductive lines and are laterally spaced apart from each other;
a two-dimensional array of magnetoresistive random access memory (MRAM) pillars (magnetic tunnel junction MTJ 34) located between the first electrically conductive lines and the second electrically conductive lines; and
a two-dimensional array of electrode layers (24) contacting surfaces of the first electrically conductive lines (12) and surfaces of the two-dimensional array of MRAM pillars (34) (see Wu, [0016]-[0018]).
Wu discloses magnetoresistive random access memory (MRAM) pillars being magnetic tunnel junctions. Wu does not explicitly disclose wherein each of the MRAM pillars comprises a respective reference layer, a respective nonmagnetic tunnel barrier layer, and a respective free layer.
Seto teaches a magnetic tunnel junction including a reference layer, a nonmagnetic tunnel barrier layer, and a free layer (see Seto, [0021]). Thus Seto together with Wu teaches wherein each of the MRAM pillars comprises a respective reference layer, a respective nonmagnetic tunnel barrier layer, and a respective free layer.
Wu and Seto are analogous art because they both are directed to memory devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Wu with the features of Seto because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wu to include wherein each of the MRAM pillars comprises a respective reference layer, a respective nonmagnetic tunnel barrier layer, and a respective free layer, as taught by Sato, to store data using magnetization conditions of the free and reference layers with tunneling magnetoresistive effect (see Seto, [0003]-[0004], [0021]).
Wu discloses the electrode layers being metal layers such as copper and titanium (see Wu, [0033]-[0034]). Wu does not disclose the electrode layers being carbon-based layers. Wu does not explicitly disclose carbon-based layers.
Kim teaches amorphous carbon being conductive material (see the low resistivity illustrated in FIG. 5e and current-voltage lines illustrated in FIG. 5f) and used as electrodes (see Abstract). Thus Kim teaches carbon-based layers.
Wu and Kim are analogous art because they both are directed to electronic devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Wu with the features of Kim because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wu to include carbon-based layers, as taught by Kim, because it is simple substitution of one known element for another (carbon for metal) to obtain predictable results (used as electrode). See MPEP § 2143.
Regarding claim 2, Wu in view of Seto and Kim teaches the device structure of claim 1.
Wu discloses wherein the two-dimensional array of electrode layers (24) underlies the two-dimensional array of MRAM pillars (34) and contacts bottom surfaces of the two-dimensional array of MRAM pillars and contacts top surfaces of the first electrically conductive lines (12) (see Wu, FIG. 1).
Kim teaches carbon-based layers (see discussion on claim 1 above), with the same analogous prior art and field of endeavor statement and the same motivation as provided for in claim 1.
Regarding claim 5, Wu in view of Seto and Kim teaches the device structure of claim 1.
Seto teaches metal oxide spacers (20) laterally surrounding MRAM pillar (MTJ 12) (see Seto, FIG. 1, [0021], [0023], [0029]). Thus Seto together with Wu teaches a two-dimensional array of metal oxide spacers laterally surrounding the two-dimensional array of MRAM pillars, with at least the same analogous prior art and field of endeavor statement and the same motivation as provided for in claim 1, and to oxidize redeposited metal material and passivate sidewall of MTJ element (see Seto, [0030]).
Regarding claim 7, Wu in view of Seto and Kim teaches the device structure of claim 5.
Seto teaches the metal oxide spacers (20) is on top of electrode layer (18) and vertically spaced from underlying wires (see Seto, FIG. 1, [0020]-[0023]). Thus Seto together with Wu teaches wherein the two-dimensional array of metal oxide spacers is vertically spaced from and does not contact the first electrically conductive lines, with the same analogous prior art and field of endeavor statement and the same motivation as provided for in claim 5.
Regarding claim 10, Wu in view of Seto and Kim teaches the device structure of claim 5.
Seto teaches the metal oxide spacers (20) contacts electrode layer (18) (see Seto, FIG. 1, [0020]-[0023]). Thus Seto together with Wu and Kim teaches wherein the two-dimensional array of metal oxide spacers contacts a respective carbon-based layer of the two-dimensional array of carbon-based layers, with the same analogous prior art and field of endeavor statement and the same motivation as provided for in claim 5.
Regarding claim 11, Wu in view of Seto and Kim teaches the device structure of claim 1.
Wu discloses the two-dimensional array of electrode layers (see discussion on claim 1 above). Kim teaches carbon-based layers.
Kim teaches wherein: carbon-based layers include carbon at an atomic percentage greater than 50 % and a resistivity of less than 10 milliOhm-cm; and carbon-based layers comprise, amorphous carbon, diamond-like carbon, a carbon-semiconductor alloy, a carbon-nitrogen alloy, a carbon-boron alloy, or a carbon-boron-nitrogen alloy (see Kim, FIG. 5e and related text), with the same analogous prior art and field of endeavor statement and the same motivation as provided for in claim 1.
Regarding claim 12, Wu in view of Seto and Kim teaches the device structure of claim 1.
Wu discloses wherein at least one electrode layer (24) within the two-dimensional array of conductive layers comprises a respective perpendicular sidewall (see Wu, FIG. 1).
Kim teaches carbon-based layers (see discussion on claim 1 above), with the same analogous prior art and field of endeavor statement and the same motivation as provided for in claim 1.
Wu does not explicitly disclose tapered concave sidewall.
However, the limitation would have been found obvious since changes in shape (from perpendicular sidewall to tapered concave sidewall) is a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration was significant. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also, MPEP § 2144.04.
Regarding claim 13, Wu in view of Seto and Kim teaches the device structure of claim 1.
Wu discloses a two-dimensional array of selector pillars (54) interposed between the two-dimensional array of MRAM pillars (34) and the second electrically conductive lines (112) (see Wu, FIG. 1, [0016]-[0018]).
Allowable Subject Matter
Claims 3-4, 6 and 8-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art of records, individually or in combination, do not disclose nor teach “a first line-level dielectric layer embedding the first electrically conductive lines, wherein the two-dimensional array of carbon-based layers comprise bottom surface segments that contact top surface segments of the first line-level dielectric layer” in combination with other limitations as recited in claim 3.
The prior art of records, individually or in combination, do not disclose nor teach “wherein at least one carbon-based layer within the two-dimensional array of carbon-based layers comprises: a central portion in contact with the top surface of a respective underlying one of the first electrically conductive lines and having a first thickness; and a peripheral portion in contact with a respective one of the top surface segments of the first line-level dielectric layer and having a second thickness that is different from the first thickness” in combination with other limitations as recited in claim 4.
The prior art of records, individually or in combination, do not disclose nor teach “wherein at least one carbon-based layer within the two-dimensional array of carbon-based layers has a respective sidewall that is laterally recessed inward from a bottom periphery of an outer sidewall of a respective overlying metal oxide spacer within the two-dimensional array of metal oxide spacers” in combination with other limitations as recited in claim 6.
The prior art of record, Seto, teaches wherein the two-dimensional array of metal oxide spacers comprises oxide of metallic elements within metallic materials of the two-dimensional array of MRAM pillars The prior art of records, individually or in combination, do not disclose nor teach “an inhomogeneous compositional profile along a vertical direction” in combination with other limitations as recited in claim 8.
The prior art of records, individually or in combination, do not disclose nor teach “wherein the two-dimensional array of metal oxide spacers does not contact the two-dimensional array of carbon-based layers” in combination with other limitations as recited in claim 9.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHIH TSUN A CHOU whose telephone number is (408)918-7583. The examiner can normally be reached M-F 8:00-16:00 Arizona Time.
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/SHIH TSUN A CHOU/Primary Examiner, Art Unit 2811