DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-7, 9-13, 16-17, 31 and 32 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al US 2018/0358288.
Pertaining to claim 1, Lee teaches an integrated device comprising:
a die 110 comprising active circuitry [0048] and a first set of contacts 102, the first set of contacts disposed on a first surface of the die and electrically connected to the active circuitry [0048 see Figure 5;
a first substrate RDL see Figure 5 including:
a second set of contacts and a third set of contacts on a first side of the first substrate;
a fourth set of contacts on a second side of the first substrate See Figure 5 marked up below; and
conductors (see RDL element in Figure 5 that contains various interconnection pathways for the sets of contacts) electrically connected between various contacts of the second set of contacts, the third set of contacts, and the fourth set of contacts, wherein the second set of contacts is electrically connected to the first set of contacts of the die See Figure 5 marked up below;
a mold compound 130 disposed on the first side of the first substrate and at least partially encapsulating the die see Figure 5; and
a set of through mold conductors 120 coupled to the third set of contacts and extending through the mold compound 130, wherein an upper surface of the mold compound, an upper surface of the die, and an upper surface of each of the set of through mold conductors are coplanar See Figure 5, and
an air gap between the die 110 and a second substrate F, the air gap defined at least in part by the set of through mold conductors coupled 140b to the second substrate. See Figure 9 marked up below
PNG
media_image1.png
276
552
media_image1.png
Greyscale
PNG
media_image2.png
330
524
media_image2.png
Greyscale
Pertaining to claim 2, Lee teaches the integrated device of claim 1, further comprising a ball grid array, wherein the BGA includes or is directly connected to the fourth set of contacts. See Figure 5. Balls are directly connected to the fourth set of contacts. See Figure 5 marked up again below
PNG
media_image3.png
202
534
media_image3.png
Greyscale
Pertaining to claim 3, Lee teaches the integrated device of claim 1, wherein at least one of the through mold conductors comprises a ball with a copper core 120a [0051] at least partially covered with another conductive material 120b [0052], a copper post, or a ball formed from a solder alloy.
Pertaining to claim 4, Lee teaches the integrated device of claim 1, further comprising a memory package 100b [0074] see Figure 9 coupled to the set of through mold conductors 120, the memory package comprising a second substrate F including a fifth set of contacts (not shown but exists in layer F and are what element 140b is electrically connected [0073]) to electrically connect a first side of the second substrate to a second side of the second substrate See Figure 9.
Pertaining to claim 5, Lee teaches the integrated device of claim 4, wherein the second side of the second substrate is coupled to the set of through mold conductors such that the upper surface of a through mold conductor of the set of through mold conductors directly contacts an interconnect solder ball 140b, and the interconnect solder ball directly contacts a contact of the fifth set of contacts element 140b is connected to a contact in layer F, this is implied [0073].
Pertaining to claim 6, Lee teaches the integrated device of claim 4, wherein no redistribution layer is disposed between the upper surface of each of the set of through mold conductors and the second side of the second substrate See Figure 9 there is no redistribution layer taught by Lee.
Pertaining to claim 7, Lee teaches the integrated device of claim 4, wherein the memory package further comprises memory circuitry and a sixth set of contacts disposed on the first side of the second substrate and electrically connected to the memory circuitry. See Figure 9 marked up below
PNG
media_image4.png
332
606
media_image4.png
Greyscale
Pertaining to claim 9, Lee teaches the integrated device of claim 1, wherein the upper surface of a through mold conductor of the set of through mold conductors comprises a copper portion ringed by a solder portion. [0051] 120a is copper and 120b is solder and 120b “rings” the copper portion 120a as illustrated in Figures noted above.
Pertaining to claim 10, this is a combination of claims 1 and 4. See rejections of claims 1 and 4 above.
Pertaining to claim 11, this is the same as claim 5. See rejection of claim 5 above.
Pertaining to claim 12, this is the same as claim 6. See rejection of claim 6 above.
Pertaining to claim 13, this is the same as claim 7. See rejection of claim 7 above.
Pertaining to claim 16, this is the same as claim 3. See rejection of claim 3 above.
Pertaining to claim 17, this is the same as claim 9. See rejection of claim 9 above.
Pertaining to claims 31 and 32, Lee teaches the device of claims 1 and 10, further comprising a thermal conductive layer 112 applied to a portion of the upper surface of the die 110 to facilitate heat dissipation within the air gap. See Figures 8 and 9
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 8, 14 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee as applied to claims 7, 13 and 10 above respectively.
Pertaining to claims 8 and 14, Lee teaches the integrated device of claims 7 and 13, but is silent on the specific type of memory, such as wherein the memory circuitry comprises dynamic random access memory circuitry. However, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to select any known type of memory circuitry and apply it to the invention of Lee. DRAM has been in use for decades and is one of a few options to consider. Since Lee teaches the generic “memory” selecting DRAM is nothing more than an obvious design choice. When there is a design need or market pressure to solve a problem and there are a finite number of identified, predictable solutions, a person of ordinary skill in the art has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely the product not of innovation but of ordinary skill and common sense. KSR Int'l Co v. Teleflex Inc.
Pertaining to claim 15, Lee teaches the integrated device of claim 10, but is silent on the end use product to which the invention will be integrated, such as a smartphone or computer etc. However, it’s not inventive to state a final product to which the invention will be used and it would have been obvious to one of ordinary skill in the art at the time the invention was filed to use an integrated circuit in a device that consists of integrated circuits. When there is a design need or market pressure to solve a problem and there are a finite number of identified, predictable solutions, a person of ordinary skill in the art has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely the product not of innovation but of ordinary skill and common sense. KSR Int'l Co v. Teleflex Inc.
Allowable Subject Matter
Claims 18, 19, 22-28 are allowed.
The following is an examiner’s statement of reasons for allowance: The primary reason for the allowance of the claims is the inclusion of the limitation: removing a portion of the mold compound and a portion of the die such that an upper surface of the mold compound, an upper surface of the die, and the pad portions of the set of through mold conductors are coplanar, in all of the claims which is not found in the prior art references.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
/NICHOLAS J TOBERGTE/Primary Examiner, Art Unit 2817