DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 09/16/2026 has been entered.
Claim Objections
Claims 2 and 10 are objected to because of the following informalities:
Claim 2 recites the limitation "a rib like portion" (emphasis added) in line 2. There is insufficient antecedent basis for this limitation in the claim. For the purpose of examination, the Examiner assumes the above limitation of “a rib like portion” (as recited in line 2) is:
“the rib like portion” (emphasis added).
Claim 2 also recites the limitation "a hollow portion" (emphasis added) in line 2. There is insufficient antecedent basis for this limitation in the claim. For the purpose of examination, the Examiner assumes the above limitation of “a hollow portion” (as recited in line 2) is:
“the hollow portion” (emphasis added).
Claim 10 recites the limitation "a rib like portion" (emphasis added) in line 2. There is insufficient antecedent basis for this limitation in the claim. For the purpose of examination, the Examiner assumes the above limitation of “a rib like portion” (as recited in line 2) is:
“the rib like portion” (emphasis added).
Claim 10 also recites the limitation "a hollow portion" (emphasis added) in line 2. There is insufficient antecedent basis for this limitation in the claim. For the purpose of examination, the Examiner assumes the above limitation of “a hollow portion” (as recited in line 2) is:
“the hollow portion” (emphasis added).
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, and 5-6 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Camacho et al. (U.S 2009/0115040 A1).
As to claim 1, Camacho et al. disclose in Figs. 1-2 a package structure, comprising: a plastic encapsulation layer (“package encapsulation” 102 is a molding compound, such as an epoxy molding compound, para. [0028]); and a rib like structure (“conductive grid” 103, Fig. 1)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108, Fig. 2) located on the plastic encapsulation layer (“package encapsulation” 102) (see Fig. 1 and Fig. 2 below, para. [0028]-[0029]), wherein a bottom surface of the rib like structure (“conductive grid” 103, Fig. 1)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108, Fig. 2) is located on a top surface of the plastic encapsulation layer (“package encapsulation” 102) (see Fig. 2 below), wherein the rib like structure (“conductive grid” 103, Fig. 1)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108, Fig. 2) includes a rib like portion (comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108, Fig. 2 below) and a hollow portion (“isolation holes” 110, Fig. 2 below) (Fig. 2 below, para. [0029]-[0032]), wherein the hollow portion (“isolation holes” 110, Fig. 2 below) exposes the top surface of the plastic encapsulation layer (“package encapsulation” 102) and a side wall of the rib like portion (comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) (see Fig. 2 below), and wherein a thermal conductivity of the rib like structure (“conductive grid” 103, Fig. 1)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108, Fig. 2) is greater than a thermal conductivity of the plastic encapsulation layer (“package encapsulation” 102) {it should be noted that: since the rib like structure (“conductive grid” 103) is a conductive layer/material, it inherently has a thermal conductivity greater than a thermal conductivity of the plastic encapsulation layer 102. A thermal conductivity of the conductive layer/material may be greater than 100 or 200 W/m.K while a thermal conductivity of the plastic encapsulation layer (“epoxy molding compound” 102) is about 0.2 – 2.5 W/m.K)}.
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As to claim 2, as applied to claim 1 above, Camacho et al. disclose in Figs. 1-2 all claimed limitations including the limitation: wherein the rib like structure (“conductive grid” 103)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) includes the rib like portion (comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) and the hollow portion (“isolation holes” 110), a bottom surface of the rib like portion (comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) is located on the top surface of the plastic encapsulation layer (“package encapsulation” 102) (see Fig. 2 above), and the hollow portion (“isolation holes” 110) exposes the top surface of the plastic encapsulation layer (“package encapsulation” 102) (see Fig. 2 above).
As to claim 3, as applied to claims 1 and 2 above, Camacho et al. disclose in Figs. 1-2 all claimed limitations including the limitation: wherein the rib like portion (comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) includes a plurality of portions (portions of 106) extending along a first direction (horizontal direction) and a plurality of portions (portions 108) extending along a second direction (vertical direction), the first direction intersects the second direction, and both are perpendicular to a thickness direction of the rib like structure (“conductive grid” 103)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) (Fig. 2).
As to claim 5, as applied to claim 1 above, Camacho et al. disclose in Figs. 1-2 all claimed limitations including the limitation: wherein a material of the rib like structure (“conductive grid” 103)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) is different from that of the plastic encapsulation layer (“package encapsulation” 102) (Figs. 1-2, para. [0028]-[0029]).
As to claim 6, as applied to claim 1 above, Camacho et al. disclose in Figs. 1-2 all claimed limitations including the limitation: wherein a thermal expansion coefficient of a material of the rib like structure (“conductive grid” 103)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) is less than that of a material of the plastic encapsulation layer (“package encapsulation” 102) {see Figs. 1-2, para. [0028]-[0029], since the plastic encapsulation layer 102 is made of “epoxy molding compound” which inherently has a thermal expansion coefficient greater than that of a conductive material of the rib like structure 103}.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Camacho et al. (U.S 2009/0115040 A1) in view of Huang et al. (U.S 2023/0101826 A1) (of record).
As to claim 4, as applied to claim 1 above, Camacho et al. disclose in Figs. 1-2 all claimed limitations except for the limitation: wherein a material of the rib like structure is the same as that of the plastic encapsulation layer.
Huang et al. disclose in Fig. 1 a package structure comprising: a material of the rib like structure (comprising 122, 124) is the same as that of the plastic encapsulation layer (120) (Fig. 1, para. [0024], [0026]).
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was made to modify the reference of Camacho et al. by providing the same material for both the rib like structure and the plastic encapsulation layer as taught by Huang et al., in order to minimize the manufacturing steps, thereby reducing production costs, and prevent thermal expansion mismatch (CTE mismatch), while inherently maintaining the structural support and chip protection.
Claim(s) 7 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Camacho et al. (U.S 2009/0115040 A1) in view of KIM et al. (U.S 2014/0061891 A1) (of record).
As to claim 7, as applied to claim 1 above, Camacho et al. disclose in Figs. 1-2 all claimed limitations including the limitation: wherein a thermal expansion coefficient of a material (“epoxy molding compound”) of the plastic encapsulation layer (102) ranges from 9ppm/K to 36ppm/K (a thermal expansion coefficient of “epoxy molding compound” of 102 is in the range of about 10-20ppm/K that falls in the recited range of “9ppm/K to 36ppm/K”, as claimed) (Figs. 1-2, para. [0028]).
Camacho et al. are silent to disclose a thermal expansion coefficient of a material of the rib like structure ranges from 0.12ppm/K to 0.18ppm/K.
KIM et al. disclose in Fig. 4D a package structure comprising: a rib like structure (comprising “mold” 203 & “member” 204), wherein a thermal expansion coefficient of a material of the rib like structure (comprising “mold” 203 & “member” 204) ranges from 0.12ppm/K to 0.18ppm/K {the rib like structure (203, 204) may be a “carbon fiber” that has CTE of 0 to 5 ppm/C which has at least one value/number that falls in the recited range of 0.12ppm/K to 0.18ppm/K, as claimed}.
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was made to modify the reference of Camacho et al. by providing a material of the rib like structure that has a thermal expansion coefficient
ranges from 0.12ppm/K to 0.18ppm/K (which is less than a thermal expansion coefficient of a material of the plastic encapsulation layer) as taught by KIM et al., in order to mitigate package warpage and reduce internal thermos-mechanical stress during thermal cycling, so as to improve reliability of the package.
As to claim 8, as applied to claim 1 above, Camacho et al. disclose in Figs. 1-2 all claimed limitations except for the limitation: wherein a thermal conductivity of a material of the rib like structure is greater than 200W/(m.K).
KIM et al. disclose in Fig. 4D a package structure comprising: a rib like structure (comprising “mold” 203 & “member” 204), wherein a thermal conductivity of a material of the rib like structure (comprising “mold” 203 & “member” 204) is greater than 200W/(m.K) {a thermal conductivity of a material of the rib like structure (203, 204) includes a “carbon fiber” that has a range from 600-1300 W/m-K (for typical fibers) which is greater than 200W/(m·K) as claimed}.
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was made to modify the reference of Camacho et al. by providing a material of the rib like structure that has a thermal conductivity greater than 200W/(m.K) as taught by KIM et al. in order to enhance the thermal management of the electronic package, prevent structural deformation, and maintain the safe operation of the embedded chips.
Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Camacho et al. (U.S 2009/0115040 A1) in view of Kim et al. (U.S 2020/0075502 A1).
As to claim 9, Camacho et al. disclose in Figs. 1-2 a package structure comprising: a chip (“integrated circuit die” 104) located on a die-attach paddle (106) (Fig. 1, para. [0029], [0032]); a plastic encapsulation layer (“package encapsulation” 102 is a molding compound, such as an epoxy molding compound, para. [0028]) covering the chip (“integrated circuit die” 104) (Fig. 2, para. [0032]); and a rib like structure (“conductive grid” 103, Fig. 1)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108, Fig. 2) located on the plastic encapsulation layer (“package encapsulation” 102) (see Fig. 1 and Fig. 2 below, para. [0028]-[0029]), wherein a bottom surface of the rib like structure (“conductive grid” 103, Fig. 1)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108, Fig. 2) is located on a top surface of the plastic encapsulation layer (“package encapsulation” 102) (see Fig. 2 below), wherein the rib like structure (“conductive grid” 103, Fig. 1)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108, Fig. 2) includes a rib like portion (comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108, Fig. 2 below) and a hollow portion (“isolation holes” 110, Fig. 2 below) (Fig. 2 below, para. [0029]-[0032]), wherein the hollow portion (“isolation holes” 110, Fig. 2 below) exposes the top surface of the plastic encapsulation layer (“package encapsulation” 102) and a side wall of the rib like portion (comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) (see Fig. 2 below), and wherein a thermal conductivity of the rib like structure (“conductive grid” 103, Fig. 1)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108, Fig. 2) is greater than a thermal conductivity of the plastic encapsulation layer (“package encapsulation” 102) {it should be noted that: since the rib like structure (“conductive grid” 103) is a conductive layer/material, it inherently has a thermal conductivity greater than a thermal conductivity of the plastic encapsulation layer 102. A thermal conductivity of the conductive layer/material may be greater than 100 or 200 W/m.K while a thermal conductivity of the plastic encapsulation layer (“epoxy molding compound” 102) is about 0.2 – 2.5 W/m.K)}.
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Camacho et al. are silent to disclose the structure comprising a package substrate, so that a chip can locate on the package substrate.
Kim et al. disclose in Fig. 1 a package structure comprising a package substrate (32), and a chip (“semiconductor die” 52) located on the package substrate (32) (Fig. 1, para. [0004]-[0006]).
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was made to modify the package structure of Camacho et al. by incorporating a package substrate as taught by Kim et al., such that the chip of Camacho et al. is located on the package substrate, in order to provide a secure structural foundation and integrated electrical routing for the existing chip-and-package. Utilizing a package substrate to support the chip and/or package was a well-known, standard packaging practice in the art (as shown in Fig. 1 by Kim et al.) to achieve predictable mechanical stability and external connectivity for the device.
As to claim 10, as applied to claim 9 above, Camacho et al. and Kim et al. disclose all claimed limitations including the limitation: wherein the rib like structure (“conductive grid” 103)/(comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) includes the rib like portion (comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) and the hollow portion (“isolation holes” 110), a bottom surface of the rib like portion (comprising “die-attach paddle” 106 and “individual leads or external interconnects” 108) is located on the top surface of the plastic encapsulation layer (“package encapsulation” 102) (see Fig. 2 above), and the hollow portion (“isolation holes” 110) exposes the top surface of the plastic encapsulation layer (“package encapsulation” 102) (see Fig. 2 above in Camacho et al.).
Claim(s) 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Camacho et al. (U.S 2009/0115040 A1) in view of Kim et al. (US 2020/0075502 A1) as applied to claims 9 and 10 above, and further in view of KAWASE et al. (U.S 2016/0307818 A1) (of record).
As to claims 11 and 12, as applied to claims 9 and 10 above, the combined references of Camacho et al. and Kim et al. disclose all claimed limitations except for the limitation: wherein the chip includes a memory chip and a controller chip arranged in a direction parallel to the package substrate, a ratio of an area of an orthographic projection of the rib like portion directly above the controller chip on the package substrate to an area of an orthographic projection of the rib like structure directly above the controller chip on the package substrate is a first ratio, a ratio of an area of an orthographic projection of the rib like portion directly above the memory chip on the package substrate to an area of an orthographic projection of the rib like structure directly above the memory chip on the package substrate is a second ratio, and the first ratio is greater than or equal to the second ratio; and wherein the memory chip includes a three-dimensional NAND memory chip.
KAWASE et al. disclose in Fig. 3 a package structure comprising: the chip includes a memory chip (“storage unit” 20 comprising “NAND-type flash memory chip”, para. [0021]) and a controller chip (“control unit” 22) arranged in a direction parallel to the package substrate (14) (Fig. 3, para. [0021]-[0022]), a ratio of an area of an orthographic projection of the rib like portion (portion of 12a) directly above the controller chip (22) on the package substrate (14) to an area of an orthographic projection of the rib like structure (12a) directly above the controller chip (22) on the package substrate (14) is a first ratio, a ratio of an area of an orthographic projection of the rib like portion (portion of 12a) directly above the memory chip (“storage unit” 20 comprising “NAND-type flash memory chip”, para. [0021]) on the package substrate (14) to an area of an orthographic projection of the rib like structure (12a) directly above the memory chip (20) on the package substrate (14) is a second ratio, and the first ratio is greater than or equal to the second ratio; and wherein the memory chip (20) includes a three-dimensional NAND memory chip (Fig. 3, para. [0021]).
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was made to modify the package structure of Camacho et al., in view of Kim et al., by having the chip including a memory chip and a controller chip arranged in a direction parallel to the package substrate, a ratio of an area of an orthographic projection of the rib like portion directly above the controller chip on the package substrate to an area of an orthographic projection of the rib like structure directly above the controller chip on the package substrate is a first ratio, a ratio of an area of an orthographic projection of the rib like portion directly above the memory chip on the package substrate to an area of an orthographic projection of the rib like structure directly above the memory chip on the package substrate is a second ratio, and the first ratio is greater than or equal to the second ratio; and wherein the memory chip includes a three-dimensional NAND memory chip as taught by KAWASE et al., in order to provide additional functions within the package structure while expanding storage capacity without increasing the physical size of the device by utilizing a three-dimensional NAND memory chip.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-12 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THANH Y TRAN whose telephone number is (571)272-2110. The examiner can normally be reached M-F, 10am-10pm (flex) (PST).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571)272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Thanh Y. Tran/Primary Examiner, Art Unit 2817 September 23, 2026
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