DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species 4 in the reply filed on 12/16/25 is acknowledged. The traversal is on the ground(s) that claims 1- 2, 5-7, 9-14, and 16-20 pertain to the same species; claims are never species; the species are not independent and distinct; and it is not a burdensome search upon the office to address the additional claims listed by the Applicant.
This is not found persuasive on multiple grounds- the Examiner’s restriction requirement is not stating that the claims themselves are species, rather as a curtesy to the Applicant and to promote clarity of record, the Examiner identifies which claims pertain to the distinct species so the Applicant understands clearly which claims are being elected. Moreover the species are indeed separate and distinct- Applicant’s own specification teaches that Fig.1 represents “multiple embodiments” and the grounds of rejection to address the additional species would significantly be altered from the rejection based upon Lee made below in accordance with Species 4.
An exhaustive search has been conducted based upon Applicant’s election and Lee is the best piece of prior art to be applied - however different art would need to be applied to address claims 1- 2, 5-7, 9-14, and 16-20. This would present a burdensome search requiring a plethora of additional searching and prior art references to address the different species represented in the claims 1- 2, 5-7, 9-14, and 16-20. Applicant is reminded that should future prosecution identify allowable subject matter and it is properly incorporated into the withdrawn claims- rejoinder may be possible.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 12 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Lee (US 2017/0358558).
12. A semiconductor package, comprising:
a first semiconductor die (Figs. 9 (600) and [0020; see also 0070-0073]);
a plurality of second semiconductor dies (Figs. 1/8-9 (100, 200, 300, 400) and [0020]) stacked on the first semiconductor die (Figs. 9 (600) and [0020]), each of the second semiconductor dies (Figs. 1/8-9 (100, 200, 300, 400) and [0020]) having a width less than a width of the first semiconductor die (Figs. 9 (600) and [0020]);
a first non-conductive layer (Figs. 1/8-9 (640) and [0075]) between the first semiconductor die (Figs. 1/8-9 (600) and [0020]) and a lowermost one of the second semiconductor dies (Figs. 1/8-9 (100) and [0020]); and
a second non-conductive layer (Figs. 1/9 (181, 183, 185) and [0040]) between adjacent ones of the second semiconductor dies (Figs. 1/8-9 (100, 200, 300, 400) and [0020]), wherein each of the second semiconductor dies (Figs. 1/8-9 (100, 200, 300, 400) and [0020]) comprises:
a first substrate (Figs. 1/8-9 (110, 210, 310) and [0026-0028; see also 0039] that has a first front surface and a first rear surface (Figs. 1/8-9 (110/120, 210/220, 310/320) and [0027; 0039- note that the device layers may be interpreted as part of the semiconductor structure];
a first interlayer dielectric layer (Figs. 1/8-9 (160, 260, 360) and [0035/0088-0089]) that covers the first front surface [0087];
a plurality of first through electrodes (Figs. 1/8-9 (130, 230, 330) and [0026]) that penetrate the first substrate (Figs. 1/8-9 (110, 210, 310) and [0026-0028; see also 0039]; and
a first passivation layer (not shown in the figures but described- [0032]) that covers the first rear surface [0032], wherein
a first groove (Figs. 1/8-9 (150) and [0035]) is in a portion of the first interlayer dielectric layer(Figs. 1/8-9 (160, 260, 360) and [0035/0088-0089]), and wherein the second non-conductive layer (Figs. 1/8-9 (181, 183, 185) and [0040]) is within the first groove (Figs. 1/8-9 (150) and [0035]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US2017/0358558) in further view of Ko et al (2021/0143008).
In reference to claim 18, Lee (‘558) teaches the following claimed limitations as cited below:
18. The semiconductor package of claim 12, wherein the first semiconductor die (Figs. 8 (100) and [0020]) has a first width, each of the second semiconductor dies (Figs. 8 ( 200, 300, 400) and the first semiconductor die comprises:
a second substrate (Figs. 8 (110, 210, 310) and [0026-0028; see also 0039]) that has a second front surface and a second rear surface (Figs. 8 (110, 210, 310) and [0026-0028; see also 0039]);
a second interlayer dielectric layer (Figs. 8 (160, 260, 360) and [0035/0088-0089]) that covers the second front surface [0087];
a plurality of second through electrodes (Figs. 1/8-9 (130, 230, 330) and [0026]) that penetrate the second substrate (Figs. 8 (110, 210, 310) and [0026-0028; see also 0039]); and
a second passivation layer (not shown in the figures but described- [0032]) that covers the second rear surface [0032],
a second groove (Fig.8 (252) and [0066]) is in the second passivation layer (not shown in the figures but described- [0032]) and a portion of the second substrate (Fig.8 (220/200) and [0066], and the first non-conductive layer (Fig.8 (181) and [0066]) is within the second groove (Fig.8 (252) and [0066]).
However, Lee fails to disclose explicitly in Fig.8 wherein each of the second semiconductor dies has a second width less than the first width, rather Fig.8 shows identical widths.
However in Fig.9, Lee teaches a wider package substrate (Figs. 9 (600) and [0020; see also 0070-0073]), yet Fig.9 does not depict a second groove as depicted in Fig.8.
Ko et al (2021/0143008) teaches a wider substrate (Fig.1 (100) and [0037]) with a second groove (Fig.1 (110) and [0038]).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee’s teaching in Fig.8 to include either the wider substrate found in Fig.9 of Lee- or the wider first substrate with second grooves as taught by Ko because wider substrates allow for additional circuitry and the inclusion of a second and flipped groove on the bottom substrate would serve to catch overflow adhesive material as taught by Ko [0039].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hua et al (US 2016/0035707); Chen et al (2022/0013480) and Lee (US 9941252) teach similar structures.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAURA M MENZ whose telephone number is (571)272-1697. The examiner can normally be reached Monday-Friday 7:00-3:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached at 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LAURA M MENZ/Primary Examiner, Art Unit 2813
2/26/26
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