DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species E in the reply filed on 08/06/2025 is acknowledged. The traversal is on the ground(s) that the Species A-E overlap in scope and thus are not mutually exclusive. Applicant argued an election of Species C includes both Species A and B, and an election of Species E includes both Species D and B (pages 9-10). This is found persuasive. However, in response to Applicant’s election of Species E and claims 1, 3-16, and 18-20, the Examiner does not agree because claims 1-8 drawn to a method of forming an optical package shown in figs. 12-15 of Species C and claims 9-20 drawn to a semiconductor and a method of forming thereof shown in figs. 11 and 18-21 of Species E. During a telephone discussion with attorney Vijay D. Desai (Reg. No. 76670) on March 31, 2026, a provisional election was made with traverse to elect claims 9-20 for the elected species E. Affirmation of this election must be made by Applicant in replying to this Office action. Claims 1-8 have been withdrawn from further consideration by the examiner, 37 CFR 1.142(b), as being drawn to a non-elected invention.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 9, 14-16, and 19-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yu et al. (US 20230012157 A1).
Re claim 9: Yu et al. discloses a method, comprising: forming a device layer 28 over a front-side of a first substrate 20, the device layer comprising an optical input/output device and an optical waveguide 22, the optical input/output device being configured to receive a range of light wavelengths [0019]; forming a through device 30 via extending through at least part of the device layer and the first substrate (fig. 3; [0023]); forming an interconnect structure 38 over a front-side of the device layer (fig. 4; [0025]); forming an opening 41 through the interconnect structure to expose the optical input/output device (fig. 4; [0026]); depositing an insulating material in the opening, the insulating material 42 being transparent to the range of light wavelengths (fig. 5; [0027]); attaching a first carrier 50 over the interconnect structure; exposing the through device via from a back-side of the first substrate 20; forming a first bond layer 40 over and electrically connected to the exposed through device via 30; bonding the first bond layer to an electronic integrated circuit device 44 (fig. 6A; [0029-0031]), the electronic integrated circuit device comprising a second bond layer 46; attaching a silicon substrate 50 over the electronic integrated circuit device [0034]; forming an external connector layer over and electrically connected to the interconnect structure [0029-0030]; and forming a lens 54 in the silicon substrate, a region extending from the lens to the optical input/output device being transparent to the range of light wavelengths (fig. 8; 28 is transparent to light [0017]; 42 is transparent to light [0027]; 48 is transparent to light [0033]).
Re claim 9: Yu et al. discloses a method, comprising: forming a device layer 142 over a front-side of a first substrate 120, the device layer comprising an optical input/output device and an optical waveguide (122, 124, 126), the optical input/output device being configured to receive a range of light wavelengths [0019]; forming a through device 60 via extending through at least part of the device layer and the first substrate 120 (fig. 13; [0041]); forming an interconnect structure 38 over a front-side of the device layer (142 and 58) (fig. 4; [0025]); forming an opening 41 through the interconnect structure to expose the optical input/output device (fig. 4; [0026]); depositing an insulating material in the opening, the insulating material 42 being transparent to the range of light wavelengths (fig. 5; [0027]); attaching a first carrier 50 over the interconnect structure; exposing the through device via from a back-side of the first substrate 20; forming a first bond layer 40 over and electrically connected to the exposed through device via 30; bonding the first bond layer to an electronic integrated circuit device 44 (fig. 6A; [0029-0031]), the electronic integrated circuit device comprising a second bond layer 46; attaching a silicon substrate 50 over the electronic integrated circuit device [0034]; forming an external connector layer over and electrically connected to the interconnect structure [0029-0030]; and forming a lens 54 in the silicon substrate, a region extending from the lens to the optical input/output device being transparent to the range of light wavelengths (fig. 8; 28 is transparent to light [0017]; 42 is transparent to light [0027]; 48 is transparent to light [0033]).
Re claim 14: Yu et al. discloses the method of claim 9, wherein the insulating material comprises an oxide [0027].
Re claim 15: Yu et al. discloses an optical package (fig. 18), comprising: an optical interposer 164, comprising: an external connector layer 166; a first interconnect structure over the external connector layer, the first interconnect structure comprising conductive features (bond pads 162) embedded in dielectric layers 158D [0046]; an active device layer over the first interconnect structure, the active device layer comprising a grating coupler 126; a dielectric substrate 142 over the active device layer; a first bond layer 140 over the dielectric substrate; and a reflective pad 57, in a plan view the reflective pad overlapping the grating coupler 126 (fig. 15); and a semiconductor device attached to the first bond layer 140 of the optical interposer 158, the semiconductor device comprising a second bond layer 62, a second interconnect structure 38, and an electronic device layer 44.
Re claim 16: Yu et al. discloses the optical package of claim 15, wherein in the plan view the dielectric layers 128, 58 overlapping the grating coupler 126 are free of the conductive features (bond pads 162; fig. 18).
Re claim 19: Yu et al. discloses the optical package of claim 15, wherein the dielectric layers 128 comprise a continuous oxide region [0021] disposed around the grating coupler 126.
Re claim 20: Yu et al. discloses the optical package of claim 19, wherein the reflective pad 57 is within the continuous oxide region (of dielectric layer 58A; [0039]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 10-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US 20230012157 A1) in view of Hsia et al. (US 20240094469 A1).
Re claim 10: Yu et al. discloses the method of claim 9 as discussed above. Yu et al. further discloses depositing the insulating material comprises: forming a first portion of the insulating material 42 in the opening, and forming a second portion of the insulating material 48 to fill the opening, but fails to teach forming a first reflective pad over the first portion of the insulating material.
Hsia et al. teaches a method of forming a reflective pad 58-3 between two insulating layers 58-2, 58-4 (fig. 13; [0036-0038]).
It would have been obvious to a person of ordinary skill in the art before the filing date of the present application to utilize the method of forming a reflective pad between two insulating layers as taught by Hsia et al. to reflect light back to the grating coupler for the purpose of improving efficiency in the light-redirection (Hsia et al.: [0038]).
Re claim 11: Yu et al. discloses the method of claim 9 as discussed above. Yu et al. further discloses depositing the insulating material comprises: filling the opening with the insulating material 42, but fails to teach etching the insulating material to form a recess; and filling the recess with a reflective material to form a second reflective pad.
Hsia et al. teaches etching the insulating material 82 to form a recess 86 (fig. 28; [0055]); and filling the recess with a reflective material to form a second reflective pad 90 (fig. 29; [0060]).
It would have been obvious to a person of ordinary skill in the art before the filing date of the present application to utilize the etching method in the steps of forming a reflective pad as taught by Hsia et al. since such modification is merely an alternative method of forming reflective pad. The claim would have been obvious because a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. KSR International Co. v. Teleflex Inc., 550 USPQ2d 1385 (2007). Further, it would have been obvious to add a second reflective pad to Yu et al.’s device since such modification is merely a matter of design choice for intended use, and a mere duplication since it has been held that the mere duplication of the essential working parts of a device involves only routine skill in the art, it would have been obvious before the effective filing date to a person having ordinary skill in the art to have provided a plurality of cells, such as at least eight unit cells. St Regis Paper Co v Bemis Co., 193 USPQ 8
Re claims 12-13 and 17-18: Yu et al. discloses the method of claims 9 and 15 as discussed above, but fails to teach the external connector layer comprises under-bump metallizations and a third reflective pad, wherein forming the external connector layer comprises forming the third reflective pad in parallel with the under-bump metallizations, wherein the reflective pad is within the first bond layer, wherein the reflective pad is within the external connector layer.
It would have been obvious to a person of ordinary skill in the art before the filing date of the present application to add a third reflective pad in various locations to the device of Yu et al. since such modification is merely it would have been obvious to add a second reflective pad to Yu et al.’s device since such modification is merely a matter of design choice for intended use, and a mere duplication since it has been held that the mere duplication of the essential working parts of a device involves only routine skill in the art, it would have been obvious before the effective filing date to a person having ordinary skill in the art to have provided a plurality of cells, such as at least eight unit cells. St Regis Paper Co v Bemis Co., 193 USPQ 8
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Chen et al. (US 20220342164 A1) discloses a lens can be disposed on the same side or opposite side with external connectors.
Hsia et al. (US 20220043208 A1) discloses external connectors can be formed over the front side or back side of the device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Uyen-Chau N. Le whose telephone number is (571)272-2397. The examiner can normally be reached Monday-Friday, 9:00am-5:30pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kiesha R. Bryant can be reached at (571) 272-3606. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/UYEN CHAU N LE/ Supervisory Patent Examiner, Art Unit 2874
Prosecution Insights