DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Claims 5, 6 and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art of record, taken alone or in combination, fails to disclose or render obvious a plurality of through vias as claimed. The closest relevant prior art of record, Kim (U.S. PG Pub. # 2013/0011094 A1), teaches the electrical connections atop the encapsulant and vias within it (par. 0007 and 0035), but not through the substrate as claimed.
Claims 16 – 20 are allowed.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record, taken alone or in combination, fails to disclose or render obvious a semiconductor package comprising, among other things, a first plasmonic bridge embedded in the insulating encapsulant, wherein the first plasmonic bridge comprises a first electrical-optical conversion module, a second electrical-optical conversion module, and a first plasmonic waveguide optically connecting the first electrical-optical conversion module and the second electrical-optical conversion module; a first redistribution structure sandwiched between the first electric integrated circuit component and the insulating encapsulant, wherein the first redistribution structure electrically connects the first electric integrated circuit component and the first electrical-optical conversion module; and a second redistribution structure sandwiched between the second electric integrated circuit component and the insulating encapsulant, wherein the second redistribution structure electrically connects the second electric integrated circuit component and the second electrical-optical conversion module.
The closest relevant prior art of record, Kim (U.S. PG Pub. # 2013/0011094 A1), teaches the encapsulant (hashed area) embedding a plasmonic waveguide (110, 120 130) and not the modules as claimed nor the redistribution structures as claimed.
Thus, with no teaching from the prior art, and without the benefit of applicant's teachings, there is no motivation for one of ordinary skill in the art to combine/modify the prior art of record in a manner so as to create the claimed invention.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 – 4, 9 – 11 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim (U.S. PG Pub. # 2013/0011094 A1).
In Re claim 1, ‘094 teaches a semiconductor package (fig. 5), comprising: a first electric integrated circuit component (530 or solder balls under 530); a second electric integrated circuit component (540 or solder balls under 540) aside the first electric integrated circuit component; and a first plasmonic bridge (110, 120 and 130) vertically overlapped with both the first electric integrated circuit component and the second electric integrated circuit component, wherein the first plasmonic bridge comprises a first plasmonic waveguide optically connecting the first electric integrated circuit component and the second electric integrated circuit component (fig. 5).
In Re claim 2, ‘094 teaches wherein the first plasmonic bridge further comprises: a first electrical-optical conversion module (530), electrically coupled to the first electric integrated circuit component and optically coupled to the first plasmonic waveguide; and a second electrical-optical conversion module (540), electrically coupled to the second electric integrated circuit component and optically coupled to the first plasmonic waveguide (fig. 5).
In Re claim 3, ‘094 teaches wherein the first plasmonic waveguide optically connects the first electric integrated circuit component (solder balls under 530) and the second electric integrated circuit component (solder balls under 530) respectively through the first electrical-optical conversion module and the second electrical-optical conversion module (fig. 5).
In Re claim 4, ‘094 teaches a substrate (under hashed area, fig. 5) underneath the first plasmonic bridge; and an insulating encapsulant (hashed area, fig. 5) disposed on the substrate, wherein the insulating encapsulant encapsulates the first plasmonic bridge.
In Re claim 9, ‘094 teaches a plurality of conductive terminals (as a solder ball of each of 530 and 540 or conducting parts internal or external of 560 to 540 and conducting parts internal or external 550 to 530) on the substrate opposite (across hashed conducting area atop hashed area) to the insulating encapsulant (fig. 5).
In Re claim 10, ‘094 teaches a semiconductor package, comprising: a first electric integrated circuit component (530); a second electric integrated circuit component (540) disposed adjacent to the first electric integrated circuit component; and a first plasmonic bridge comprising a first terminal (left mirror, par. 0040), a second terminal (right mirror, par. 0040), and a first plasmonic waveguide (110, 120 and 130) optically connecting the first terminal and the second terminal, wherein the first terminal is connected (optically) to the first electric integrated circuit component, and the second terminal is connected (optically) to the second electric integrated circuit component (fig. 5).
In Re claim 11, ‘094 teaches a substrate (under hashed area in fig. 5) over (when fig. 5 is inverted) the first plasmonic bridge; and an insulating encapsulant (hashed area of fig. 5) filled among the substrate, the first electric integrated circuit component, and the second electric integrated circuit component, wherein the insulating encapsulant encapsulates the first plasmonic bridge (fig. 5).
In Re claim 15, ‘094 teaches a plurality of conductive terminals (as a solder ball of each of 530 and 540 or conducting parts internal or external of 560 to 540 and conducting parts internal or external 550 to 530) on the substrate opposite (across hashed conducting area atop hashed area) to the insulating encapsulant (fig. 5).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 7, 8, 13 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (U.S. PG Pub. # 2013/0011094 A1).
In Re claims 7, 8, 13 and 14, ‘094 teaches the package of claims 4 and 11, respectively, but is silent to a second plasmonic bridge embedded in the insulating encapsulant, and the second plasmonic bridge is coupled to the second electric circuit component; wherein the second plasmonic bridge comprises a third electrical-optical conversion module, a fourth electrical-optical conversion module, and a second plasmonic waveguide extending horizontally between the third electrical-optical conversion module and the fourth electrical-optical conversion module, and both of the third electrical-optical conversion module and the fourth electrical-optical conversion module are electrically connected to the second integrated circuit component and are optically connected to the second plasmonic waveguide;
a second plasmonic bridge embedded in the insulating encapsulant, and the second plasmonic bridge is coupled to the second electric circuit component;
wherein the second plasmonic bridge comprises a third terminal, a fourth terminal, and a second plasmonic waveguide optically connecting the third terminal and the fourth terminal, and both of the third terminal and the fourth terminal are connected to the second electric integrated circuit component.
However, it is well known in the art that having multiple communication paths on a substrate allows for a larger number of channels to simultaneously communicate to from chips in a network.
Thus it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to duplicate the structures as claimed so as to allow for a more versatile and robust communication package since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art.
St. Regis Paper Co. v. Bemis Co., 193 USPQ 8.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHAD SMITH whose telephone number is (571)270-1294. The examiner can normally be reached M-F 7:30 - 5.
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/CHAD H SMITH/ Primary Examiner, Art Unit 2874
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