Prosecution Insights
Last updated: July 17, 2026
Application No. 18/365,455

SEMICONDUCTOR DEVICE

Final Rejection §103
Filed
Aug 04, 2023
Priority
Oct 12, 2022 — JP 2022-163944
Examiner
ONUTA, TIBERIU DAN
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Renesas Electronics Corporation
OA Round
2 (Final)
76%
Grant Probability
Favorable
3-4
OA Rounds
5m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
63 granted / 83 resolved
+7.9% vs TC avg
Strong +24% interview lift
Without
With
+24.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
26 currently pending
Career history
120
Total Applications
across all art units

Statute-Specific Performance

§103
92.6%
+52.6% vs TC avg
§102
5.8%
-34.2% vs TC avg
§112
1.2%
-38.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 83 resolved cases

Office Action

§103
DETAILED ACTION This Office action responds to Applicant’s amendments on 03/13/2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Amendment Status The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-2, 6, and 8-10. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, in the plan view, the size of the third chip is larger than a size of the insulating substrate as recited in claim 9 must be shown the drawings or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-2, 6, and 8-10 are rejected under 35 U.S.C. 103 as obvious over by Kuwajima (US 2017/0148732) in view of Nakashiba (US 2011/0049693) in further view of Ho (US 2010/0259909). Regarding claim 1, Kuwajima shows (see, e.g., Kuwajima: fig. 3) most aspects of the instant invention including a semiconductor device, comprising a third chip (containing the inductors CL11/CL12) comprising: A first semiconductor substrate 1 (1a/1b/1c) A wiring layer IL1/IL2/IL3 formed on the first semiconductor substrate 1 (1a/1b/1c) A second inductor CL12 formed in an uppermost layer IL3 of the wiring layer IL1/IL2/IL3 An insulating substrate IL4/IL5 (see, e.g., Kuwajima: par. [0088]) disposed on the wiring layer IL1/IL2/IL3 An insulating layer PA formed on the insulating substrate A first inductor CL11 formed on the insulating substrate IL4/IL5 and formed in the insulating layer PA With respect to claim 1, note that a limitation in a claim with respect to the manner in which a claimed device is intended to be used does not differentiate the claimed device from a prior-art device, if the prior-art device teaches all structural limitations in the claim and the limitations are found to be inherent in the prior-art device. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997); Ex Parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). See Hewlett-Packard Co. v. Bausch & Lomb Inc. and the related case law cited therein which makes it clear that it is the final product per se which must be determined in a device claim, and not the patentability of its functions (909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990)). As stated in Best, Where the claimed and prior art products are identical or substantially identical in structure or composition, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977). Note that the applicant has burden of proof once the examiner establishes a sound basis for believing that the products of the applicant and the prior art are the same. See In re Spada, 911 F.2d 705, 709, 15 USPQ2d 1655, 1658 (Fed. Cir. 1990). In reference to the language in claim 1 referring to the structure of the device, it is noted that Kuwajima shows all structural aspects of the package structure according to the instant invention (see paragraph 13 above), and that providing different first and second potentials when the semiconductor functional structure is at different running speeds does not affect the function of the final device. Furthermore, Kuwajima’s device is configured of performing the claimed functions since the performing function interaction corresponding to content tested would involve a mere manipulation of the structure of the package structure. The first inductor CL11 being a component of a transformer CL11/CL12 performing contactless communication between different potentials (see MPEP 2112.01 and MPEP 2114.I/2114.II) (MPEP 2114.II: Apparatus claims cover what a device is, not what a device does." Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim) wherein: The first inductor CL11 is configured to be applied with a first potential (see MPEP 2112.01 and MPEP 2114.I/2114.II) (MPEP 2114.II: Apparatus claims cover what a device is, not what a device does." Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim) The first inductor CL11 is formed so that the first inductor CL11 can be magnetically coupled with a second inductor CL12 configured to be applied with a second potential different from the first potential (see MPEP 2112.01 and MPEP 2114.I/2114.II) (MPEP 2114.II: Apparatus claims cover what a device is, not what a device does." Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim) However, Kuwajima fails (see, e.g., Kuwajima: figs. 3) to show that the insulating substrate IL4/IL5 is disposed on the wiring layer IL1/IL2/IL3 via an adhesive member. Nakashiba, in a similar device to Kuwajima, shows (see, e.g., Nakashiba: fig. 7) that the insulating substrate 210/260 is disposed on a wiring layer 110/160 a via an adhesive member 500. Nakashiba also shows (see, e.g., Nakashiba: fig. 7) when the insulating adhesive sheet is used as the adhesive layer 500, the insulating adhesive sheet is thermosetting and thermoplastic (see, e.g., Nakashiba: par. [0071]) and also insulating adhesive sheet can control the distance between the first inductor 130 and the second inductor 230 with high precision, to be a desired value by changing the thickness of the insulating adhesive sheet (see, e.g., Nakashiba: par. [0075]). It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the adhesive member of Nakashiba in the device of Kuwajima, in order to control the distance between the first inductor and the second inductor with high precision at a desired value by changing the thickness of the insulating adhesive sheet. However, Kuwajima in view of Nakashiba fails (see, e.g., Kuwajima: fig.3) to show that the insulating substrate IL4/IL5 is a glass substrate. Kuwajima in view of Nakashiba is (see, e.g., Kuwajima: fig.3) actually silent about the type of the insulating layer IL4/IL5. Ho, in a similar device to Kuwajima in view of Nakashiba, shows (see, e.g., Ho: fig. 3) that the insulating substrate 22a is a glass substrate (e.g., Ho: par. [0051]). Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use either the glass insulating substrate of Ho or the insulating substrate of Kuwajima in view of Nakashiba because these were recognized in the semiconductor art for their use as insulating substrates in coil transducers and their packages, as taught by Ho and by Kuwajima in view of Nakashiba, and selecting between known equivalents would be within the level of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S.--,82 USPQ2d 1385 (2007). Regarding claim 2, Kuwajima in view of Nakashiba in view of Ho shows (see, e.g., Nakashiba: fig. 7) a second chip 200 including the second inductor 230. Kuwajima in view of Nakashiba in view of Ho shows (see, e.g., Kuwajima: fig. 3): The insulating substrate IL4/IL5 has a first surface and a second surface located opposite the first surface The insulating layer PA is formed in an insulating layer IL4/IL5 formed on the first surface Kuwajima in view of Nakashiba in view of Ho shows (see, e.g., Nakashiba: fig. 7) that the insulating substrate 210 is disposed on a second chip via an adhesive member 500 such that the second inductor faces the second surface. Regarding claim 6, Kuwajima in view of Nakashiba shows (see, e.g., Kuwajima: figs. 3 and 38, and see, e.g., Nakashiba: fig. 7) that: A first chip 100 includes a first circuit 110 applying the first potential to the first inductor 130 (see, e.g., Nakashiba: fig. 7, and see, e.g., Nakashiba: par. [0048]) The first inductor CL11 is formed on the insulating substrate IL4/IL5 (see, e.g., Kuwajima: fig. 3) The first inductor CL11 is electrically connected to the first circuit formed in the first chip via a first conductive member BW1(BW) (see, e.g., Kuwajima: fig. 38, and see, e.g., Kuwajima: par. [0108]) Regarding claim 8, Kuwajima in view of Nakashiba in view of Ho shows (see, e.g., Kuwajima: fig. 3) most aspects of the instant invention including a first chip (see, e.g., Kuwajima: par. [0108]). Kuwajima in view of Nakashiba in view of Ho shows (see, e.g., Ho: fig. 3) that a second chip 64a including a second circuit applying the second potential to the second inductor 34a (through terminal 46a, see, e.g., Ho: par. [0037]). Kuwajima in view of Nakashiba in view of Ho also shows (see, e.g., Ho: fig. 3) a third chip 10a in which the second inductor 34a is formed, wherein the second inductor 34a is electrically connected to the second circuit 64a via a second conductive member 54a. Regarding claim 9, Kuwajima in view of Nakashiba in view of Ho shows (see, e.g., Ho: fig. 3) shows: in plan view, a size of the third chip 10a is larger than a size of the insulating substrate (see, e.g., Ho: annotated fig. 3) The insulating substrate is formed on the third chip 10a A part of the third chip 10a is exposed from the insulating substrate to be electrically connected to the second chip via 64a the second conductive member 64a PNG media_image1.png 708 1157 media_image1.png Greyscale Regarding claim 10, Kuwajima in view of Nakashiba in view of Ho shows (see, e.g., Kuwajima: fig. 3) most aspects of the instant invention including the insulating substrate IL4/IL5. Kuwajima in view of Nakashiba in view of Ho shows (see, e.g., Ho: fig. 3) that the insulating substrate 22a is a glass substrate (e.g., Ho: par. [0051]) Response to Arguments Applicants’ arguments have been considered but are moot in view of the new grounds of rejection. The applicants argue: Kuwajima fails to anticipate or render obvious the amended limitation of "… an insulating layer disposed on the wiring layer via an adhesive member ", as recited in claims 1. The examiner responds: In view of the new grounds of rejection, Nakashiba, in a similar device to Kuwajima, shows (see, e.g., Nakashiba: fig. 7) that the insulating substrate 210/260 is disposed on a wiring layer 110/160 a via an adhesive member 500. Nakashiba also shows (see, e.g., Nakashiba: fig. 7) when the insulating adhesive sheet is used as the adhesive layer 500, the insulating adhesive sheet is thermosetting and thermoplastic (see, e.g., Nakashiba: par. [0071]) and also insulating adhesive sheet can control the distance between the first inductor 130 and the second inductor 230 with high precision, to be a desired value by changing the thickness of the insulating adhesive sheet (see, e.g., Nakashiba: par. [0075]). It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the adhesive member of Nakashiba in the device of Kuwajima, in order to control the distance between the first inductor and the second inductor with high precision at a desired value by changing the thickness of the insulating adhesive sheet. The applicants argue: Kuwajima fails to anticipate or render obvious the amended limitation of "… the insulating layer made of glass substrate ", as recited in claims 1. The examiner responds: In view of the new grounds of rejection, Ho, in a similar device to Kuwajima in view of Nakashiba, shows (see, e.g., Ho: fig. 3) that the insulating substrate 22a is a glass substrate (e.g., Ho: par. [0051]). Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use either the glass insulating substrate of Ho or the insulating substrate of Kuwajima in view of Nakashiba because these were recognized in the semiconductor art for their use as insulating substrates in coil transducers and their packages, as taught by Ho and by Kuwajima in view of Nakashiba, and selecting between known equivalents would be within the level of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S.--,82 USPQ2d 1385 (2007). Conclusion This action is made final. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire three months from the mailing date of this action. In the event a first reply is filed within two months of the mailing date of this final action and the advisory action is not mailed until after the end of the three-month shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than six months from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIBERIU DAN ONUTA whose telephone number is (571) 270-0074 and between the hours of 9:00 AM to 5:00 PM (Eastern Standard Time) Monday through Friday or by e-mail via Tiberiu.Onuta@uspto.gov. If attempts to reach the examiner by telephone or email are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (in USA or Canada) or 571-272-1000. /TIBERIU DAN ONUTA/Examiner, Art Unit 2814 /WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
Read full office action

Prosecution Timeline

Aug 04, 2023
Application Filed
Dec 18, 2025
Non-Final Rejection mailed — §103
Mar 13, 2026
Response Filed
Apr 16, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12677676
COMPOSITION FOR REMOVING PHOTORESIST
4y 5m to grant Granted Jul 07, 2026
Patent 12677525
LIGHT EMITTING DEVICE, DISPLAY SUBSTRATE AND DISPLAY DEVICE
4y 3m to grant Granted Jul 07, 2026
Patent 12677690
CONDUCTIVE MEMBER WITH METAL CORE FOR SUBSTRATE CONNECTIONS
3y 6m to grant Granted Jul 07, 2026
Patent 12672563
PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
3y 9m to grant Granted Jun 30, 2026
Patent 12666924
SOLDER BUMP FORMATION USING WAFER WITH RING
4y 3m to grant Granted Jun 23, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+24.4%)
3y 4m (~5m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 83 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month