DETAILED ACTION
Response to Arguments
Applicant’s arguments, see the claim amendments, filed 8/24/26, with respect to the rejection(s) of the claim(s) have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Rejection over Hwang et al., US 6,649,446, in view of Goetz et al., US 6,649,446
Claim(s) 1-6, 8, 17-24, 26, 27, and 29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hwang et al., US 2022/0223525, in view of Goetz et al., US 6,649,446.
Regarding claim 1, Hwang (figure 2) teaches a memory, comprising:
a substrate (attached at 205);
a device layer CELL disposed on the substrate (attached at 205), wherein the device layer PERI/ CELL comprises a peripheral circuit unit PERI and a memory array unit CELL, wherein the memory CELL is a three-dimensional (3D) NAND memory (paragraph 0102), the peripheral circuit unit PERI is disposed on the substrate (attached at 205), and the memory array unit CELL is bonded face to face with the peripheral circuit unit PERI and located on a side of the peripheral circuit unit PERI away from the substrate (attached at 205).
Hwang fails to teach a padding layer disposed at a first side of the device layer; a buffering protection layer disposed on a second side of the device layer and a side of the padding layer away from the substrate, wherein the buffering protection layer covers a side of both the memory array unit and the padding layer away from the substrate; and a packaging layer covering at least a side of the buffering protection layer away from the substrate, wherein the padding layer is disposed to be adjacent to the device layer in a direction parallel to the substrate.
Goetz (figure 1) teaches a device comprising:
a substrate 130;
a device layer 110 disposed on the substrate 130;
a padding layer 140 disposed at a first side of the device layer 110; and
a buffering protection layer 150 disposed on a second side of the device layer 110 and a side of the padding layer 140 away from the substrate 130, wherein the buffering protection layer 150 covers a side of both the device layer 110 and the padding layer 140 away from the substrate 130; and
a packaging layer 160 covering at least a side of the buffering protection layer 150 away from the substrate 130,
wherein the padding layer 140 is disposed to be adjacent to the device layer 110 in a direction parallel to the substrate 130.
Though Goetz fails to teach a memory device and a peripheral circuit, it would have been obvious to one of ordinary skill in the art at the time of the invention to use the padding layer/buffering layer/packaging layer combination of Goetz in the invention of Hwang because a memory device is another type of device that a skilled artisan would reasonably expect to benefit from Goetz’s packaging configuration. Goetz (column 1, lines 29-43) states its configuration provides a hermetic seal to keep particulates or contaminants from affecting performance or reliability. A skilled artisan knows that these benefits would benefit in the packaging of most any other type of device, including a memory device with a peripheral circuit unit and a memory array unit. The substitution of one known equivalent technique for another may be obvious even if the prior art does not expressly suggest the substitution (Ex parte Novak 16 USPQ 2d 2041 (BPAI 1989); In re Mostovych 144 USPQ 38 (CCPA 1964); In re Leshin 125 USPQ 416 (CCPA 1960); Graver Tank & Manufacturing Co. V. Linde Air Products Co. 85 USPQ 328 (USSC 1950).
Though Goetz fails to teach the buffering protection layer specifically covers a side of the memory array unit, Goetz’s buffering protection layer 150 covers the entire device layer 110, therefore Goetz meets this limitation when a memory device is substituted for Goetz’s device layer, as detailed above.
With respect to claim 2, Goetz teaches a surface of the device layer 110 away from the substrate 130 has a first distance from the substrate 130, and a surface of the padding layer 140 away from the substrate 130 has a second distance from the substrate 130, wherein the first distance is greater than or equal to the second distance. Goetz (column 2, lines 60-62) states the 140 “’preferably encompasses a substantial portion of the perimeter of each device substrate” therefore, the device layer 110 first distance would be greater than the padding layer second distance.
Pertaining to claim 3, though Goetz fails to teach a difference between the first distance and the second distance is smaller than or equal to 20 microns, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the relative distance through routine experimentation (MPEP 2144.05).
As to claim 4, Goetz (column 2, line 67-column 3, line 2) teaches the padding layer comprises a photoresist, wherein at least some of the listed materials are a photoresist.
In claim 5, though Goetz fails to teach the photoresist has a viscosity greater than or equal to1000cp, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the viscosity through routine experimentation (MPEP 2144.05).
In re claim 6, Goetz (column 2, line 67-column 3, line 2) teaches the photoresist comprises a negative photoresist, wherein at least some of the listed materials are a negative photoresist.
Concerning claim 8, Goetz (figure 1) teaches the padding layer 140 is disposed on the substrate 130 and surrounds the device layer 110.
Pertaining to claim 17, Hwang (figures 2 & 17) teaches a memory system, comprising:
A memory, comprising
a substrate (attached at 205);
a device layer CELL disposed on the substrate (attached at 205), wherein the device layer PERI/ CELL comprises a peripheral circuit unit PERI and a memory array unit CELL, wherein the memory CELL is a three-dimensional (3D) NAND memory (paragraph 0102), the peripheral circuit unit PERI is disposed on the substrate (attached at 205), and the memory array unit CELL is bonded face to face with the peripheral circuit unit PERI and located on a side of the peripheral circuit unit PERI away from the substrate (attached at 205); and
a controller 2002 coupled to the memory 2003 and configured to control the memory to store data.
Hwang fails to teach a padding layer disposed at a first side of the device layer; a buffering protection layer disposed on a second side of the device layer and a side of the padding layer away from the substrate, wherein the buffering protection layer covers a side of both the memory array unit and the padding layer away from the substrate; and a packaging layer covering at least a side of the buffering protection layer away from the substrate, wherein the padding layer is disposed to be adjacent to the device layer in a direction parallel to the substrate.
Goetz (figures 1) teaches a device comprising:
a substrate 130;
a device layer 110 disposed on the substrate 130;
a padding layer 140 disposed at a first side of the device layer 110; and
a buffering protection layer 150 disposed on a second side of the device layer 110 and a side of the padding layer 140 away from the substrate 130, wherein the buffering protection layer 150 covers a side of both the device layer 110 and the padding layer 140 away from the substrate 130; and
a packaging layer 160 covering at least a side of the buffering protection layer 150 away from the substrate 130,
wherein the padding layer 140 is disposed to be adjacent to the device layer 110 in a direction parallel to the substrate 130.
Though Goetz fails to teach a memory device and a peripheral circuit, it would have been obvious to one of ordinary skill in the art at the time of the invention to use the padding layer/buffering layer/packaging layer combination of Goetz in the invention of Hwang because a memory device is another type of device that a skilled artisan would reasonably expect to benefit from Goetz’s packaging configuration. Goetz (column 1, lines 29-43) states its configuration provides a hermetic seal to keep particulates or contaminants from affecting performance or reliability. A skilled artisan knows that these benefits would benefit in the packaging of most any other type of device, including a memory device with a peripheral circuit unit and a memory array unit. The substitution of one known equivalent technique for another may be obvious even if the prior art does not expressly suggest the substitution (Ex parte Novak 16 USPQ 2d 2041 (BPAI 1989); In re Mostovych 144 USPQ 38 (CCPA 1964); In re Leshin 125 USPQ 416 (CCPA 1960); Graver Tank & Manufacturing Co. V. Linde Air Products Co. 85 USPQ 328 (USSC 1950).
Though Goetz fails to teach the buffering protection layer specifically covers a side of the memory array unit, Goetz’s buffering protection layer 150 covers the entire device layer 110, therefore Goetz meets this limitation when a memory device is substituted for Goetz’s device layer, as detailed above.
In claim 18, Goetz teaches a surface of the device layer 110 away from the substrate 130 has a first distance from the substrate 130, and a surface of the padding layer 140 away from the substrate 130 has a second distance from the substrate 130, wherein the first distance is greater than or equal to the second distance. Goetz (column 2, lines 60-62) states the 140 “’preferably encompasses a substantial portion of the perimeter of each device substrate” therefore, the device layer 110 first distance would be greater than the padding layer second distance.
Pertaining to claim 19, though Goetz fails to teach a difference between the first distance and the second distance is smaller than or equal to 20 microns, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the relative distance through routine experimentation (MPEP 2144.05).
Regarding claim 20, Goetz (column 2, line 67-column 3, line 2) teaches the padding layer comprises a photoresist, wherein at least some of the listed materials are a photoresist.
In claim 21, though Goetz fails to teach the photoresist has a viscosity greater than or equal to1000cp, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the viscosity through routine experimentation (MPEP 2144.05).
In re claim 22, Goetz (column 2, line 67-column 3, line 2) teaches the photoresist comprises a negative photoresist, wherein at least some of the listed materials are a negative photoresist.
Concerning claim 23, Goetz (figure 1) teaches the padding layer 140 is disposed on the substrate 130 and surrounds the device layer 110.
Regarding claims 24 and 27, though Goetz, which teaches using organic or inorganic materials (column 3, lines 24-28), fails to teach the buffering protection layer comprises at least one of polyimide, polybenzoxazole, or phenol, it would have been obvious to one of ordinary skill in the art at the time of the invention to use one of these materials in the invention of Goetz because they are conventionally known and used organic materials. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
As to claims 26 and 29, though Goetz fails to teach at least one functional layer comprising a wiring layer is disposed between the packaging layer 160 and the buffering protection layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use this configuration in the invention of Goetz because it is conventionally known and used in the art. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
Rejection over Hwang et al., US 6,649,446, in view of Boccia et al., WO 0115076
Claim(s) 1-6, 8, and 17-24, 26, 27, and 29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hwang et al., US 2022/0223525, in view of Boccia et al., WO 0115076.
Regarding claim 1, Hwang (figure 2) teaches a memory, comprising:
a substrate (attached at 205);
a device layer CELL disposed on the substrate (attached at 205), wherein the device layer PERI/ CELL comprises a peripheral circuit unit PERI and a memory array unit CELL, wherein the memory CELL is a three-dimensional (3D) NAND memory (paragraph 0102), the peripheral circuit unit PERI is disposed on the substrate (attached at 205), and the memory array unit CELL is bonded face to face with the peripheral circuit unit PERI and located on a side of the peripheral circuit unit PERI away from the substrate (attached at 205).
Hwang fails to teach a padding layer disposed at a first side of the device layer; a buffering protection layer disposed on a second side of the device layer and a side of the padding layer away from the substrate, wherein the buffering protection layer covers a side of both the memory array unit and the padding layer away from the substrate; and a packaging layer covering at least a side of the buffering protection layer away from the substrate, wherein the padding layer is disposed to be adjacent to the device layer in a direction parallel to the substrate.
Boccia (see marked up portion of figure 3 below) teaches a device, comprising:
a substrate 18;
a device layer 1 disposed on the substrate 18;
a padding layer 2 disposed at a first side of the device layer 1; and
a buffering protection layer 20 disposed on a second side of the device layer 1 and a side of the padding layer 2 away from the substrate 18, wherein the buffering protection layer 20 covers a side of both the device layer 1 and the padding layer 2 away from the substrate 18; and
a packaging layer 50 covering at least a side of the buffering protection layer 20 away from the substrate 18,
wherein the padding layer 2 is disposed to be adjacent to the device layer 1 in a direction parallel to the substrate 18.
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Though Boccia fails to teach the device layer comprises a memory device with a peripheral circuit unit and a memory array unit, it would have been obvious to one of ordinary skill in the art at the time of the invention to use the teachings of Boccia in the memory device in the invention of Hwang because a skilled artisan knows that a memory device is a standard type of device that would be used in Boccia’s mini-smart card to store the information needed for the mini-smart card and would benefit from the packaging of Boccia. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). Though Boccia fails to teach the buffering protection layer specifically covers a side of a memory array unit, Goetz’s buffering protection layer 20 covers the entire device layer 1, therefore Boccia meets this limitation when a memory device is substituted for Boccia’s device layer, as detailed above.
Concerning claim 2, Boccia (see marked up portion of figure 3 above) teaches a surface of the device layer 1 away from the substrate 18 has a first distance from the substrate 18, and a surface of the padding layer 2 away from the substrate 18 has a second distance from the substrate 18, wherein the first distance is greater than or equal to the second distance.
Pertaining to claim 3, though Boccia fails to teach a difference between the first distance and the second distance is smaller than or equal to 20 microns, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the relative distance through routine experimentation (MPEP 2144.05).
In claim 4, though Boccia fails to teach the padding layer comprises a photoresist, it would have been obvious to one of ordinary skill in the art at the time of the invention to use a photoresist in the invention of Boccia because a photoresist is a known equivalent material. The substitution of one known equivalent technique for another may be obvious even if the prior art does not expressly suggest the substitution (Ex parte Novak 16 USPQ 2d 2041 (BPAI 1989); In re Mostovych 144 USPQ 38 (CCPA 1964); In re Leshin 125 USPQ 416 (CCPA 1960); Graver Tank & Manufacturing Co. V. Linde Air Products Co. 85 USPQ 328 (USSC 1950).
Regarding claim 5, though Boccia fails to teach the photoresist has a viscosity greater than or equal to1000cp, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the viscosity through routine experimentation (MPEP 2144.05).
With respect to claim 6, though Boccia fails to teach the photoresist comprises a negative photoresist, it would have been obvious to one of ordinary skill in the art at the time of the invention to use a negative photoresist in the invention of Boccia because a negative photoresist is a known equivalent material. The substitution of one known equivalent technique for another may be obvious even if the prior art does not expressly suggest the substitution (Ex parte Novak 16 USPQ 2d 2041 (BPAI 1989); In re Mostovych 144 USPQ 38 (CCPA 1964); In re Leshin 125 USPQ 416 (CCPA 1960); Graver Tank & Manufacturing Co. V. Linde Air Products Co. 85 USPQ 328 (USSC 1950).
Pertaining to claim 8, Boccia (see marked up portion of figure 3 above) teaches the padding layer 2 is disposed on the substrate 18 and surrounds the device layer 1.
In claim 17, Hwang (figures 2 & 17) teaches a memory system, comprising:
A memory, comprising
a substrate (attached at 205);
a device layer CELL disposed on the substrate (attached at 205), wherein the device layer PERI/ CELL comprises a peripheral circuit unit PERI and a memory array unit CELL, wherein the memory CELL is a three-dimensional (3D) NAND memory (paragraph 0102), the peripheral circuit unit PERI is disposed on the substrate (attached at 205), and the memory array unit CELL is bonded face to face with the peripheral circuit unit PERI and located on a side of the peripheral circuit unit PERI away from the substrate (attached at 205); and
a controller 2002 coupled to the memory 2003 and configured to control the memory to store data.
Hwang fails to teach a padding layer disposed at a first side of the device layer; a buffering protection layer disposed on a second side of the device layer and a side of the padding layer away from the substrate, wherein the buffering protection layer covers a side of both the memory array unit and the padding layer away from the substrate; and a packaging layer covering at least a side of the buffering protection layer away from the substrate, wherein the padding layer is disposed to be adjacent to the device layer in a direction parallel to the substrate.
Boccia (see marked up portion of figure 3 above) teaches a device system, comprising:
a substrate 18;
a device layer 1 disposed on the substrate 18;
a padding layer 2 disposed at a first side of the device layer 1; and
a buffering protection layer 20 disposed on a second side of the device layer and a side of the padding layer away from the substrate, wherein the buffering protection layer covers a side of both the memory array unit and the padding layer away from the substrate; and
a packaging layer covering at least a side of the buffering protection layer away from the substrate,
wherein the padding layer is disposed to be adjacent to the device layer in a direction parallel to the substrate.
Though Boccia fails to teach the buffering protection layer specifically covers a side of a memory array unit, Boccia’s buffering protection layer 150 covers the entire device layer 110, therefore Boccia meets this limitation when a memory device is used for Goetz’s device layer, as detailed above.
Regarding claim 18 Boccia (see marked up portion of figure 3 above) teaches a surface of the device layer 1 away from the substrate 18 has a first distance from the substrate 18, and a surface of the padding layer 2 away from the substrate 18 has a second distance from the substrate 18, wherein the first distance is greater than or equal to the second distance.
Pertaining to claim 19, though Boccia fails to teach a difference between the first distance and the second distance is smaller than or equal to 20 microns, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the relative distance through routine experimentation (MPEP 2144.05).
In claim 20, though Boccia fails to teach the padding layer comprises a photoresist, it would have been obvious to one of ordinary skill in the art at the time of the invention to use a photoresist in the invention of Boccia because a photoresist is a known equivalent material. The substitution of one known equivalent technique for another may be obvious even if the prior art does not expressly suggest the substitution (Ex parte Novak 16 USPQ 2d 2041 (BPAI 1989); In re Mostovych 144 USPQ 38 (CCPA 1964); In re Leshin 125 USPQ 416 (CCPA 1960); Graver Tank & Manufacturing Co. V. Linde Air Products Co. 85 USPQ 328 (USSC 1950).
Regarding claim 21, though Boccia fails to teach the photoresist has a viscosity greater than or equal to1000cp, it would have been obvious to one ordinary skill in the art at the time of the invention to optimize the viscosity through routine experimentation (MPEP 2144.05).
With respect to claim 22, though Boccia fails to teach the photoresist comprises a negative photoresist, it would have been obvious to one of ordinary skill in the art at the time of the invention to use a negative photoresist in the invention of Boccia because a negative photoresist is a known equivalent material. The substitution of one known equivalent technique for another may be obvious even if the prior art does not expressly suggest the substitution (Ex parte Novak 16 USPQ 2d 2041 (BPAI 1989); In re Mostovych 144 USPQ 38 (CCPA 1964); In re Leshin 125 USPQ 416 (CCPA 1960); Graver Tank & Manufacturing Co. V. Linde Air Products Co. 85 USPQ 328 (USSC 1950).
Pertaining to claim 23, Boccia (see marked up portion of figure 3 above) teaches the padding layer 2 is disposed on the substrate 18 and surrounds the device layer 1.
In claim 24 and 27, though Boccia fails to teach the buffering protection layer comprises at least one of polyimide, polybenzoxazole, or phenol, it would have been obvious to one of ordinary skill in the art at the time of the invention to use these materials in the invention of Boccia because they are conventionally known and used equivalent materials used for this purpose. The substitution of one known equivalent technique for another may be obvious even if the prior art does not expressly suggest the substitution (Ex parte Novak 16 USPQ 2d 2041 (BPAI 1989); In re Mostovych 144 USPQ 38 (CCPA 1964); In re Leshin 125 USPQ 416 (CCPA 1960); Graver Tank & Manufacturing Co. V. Linde Air Products Co. 85 USPQ 328 (USSC 1950).
With respect to claims 26 and 29, though Boccia fails to teach at least one functional layer comprising a wiring layer is disposed between the packaging layer 160 and the buffering protection layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use this configuration in the invention of Boccia because it is conventionally known and used in the art. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry should be directed to DAVID A ZARNEKE at (571)272-1937. If attempts to reach the examiner are unsuccessful, the examiner’s supervisor, Matt Landau can be reached at 571-272-1731. The fax number is 571-273-8300.
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/DAVID A ZARNEKE/ Primary Examiner, Art Unit 2891 9/4/26
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