Prosecution Insights
Last updated: May 29, 2026
Application No. 18/366,681

DISPLAY DEVICE

Final Rejection §102§103
Filed
Aug 08, 2023
Priority
Feb 09, 2021 — JP 2021-018997 +1 more
Examiner
MENZ, DOUGLAS M
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Magnolia White Corporation
OA Round
2 (Final)
88%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
676 granted / 766 resolved
+20.3% vs TC avg
Minimal +5% lift
Without
With
+4.6%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
34 currently pending
Career history
796
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
51.1%
+11.1% vs TC avg
§102
36.7%
-3.3% vs TC avg
§112
0.6%
-39.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 766 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-6 and 14-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cho et al. (US 2018/0151817). Regarding claim 1, Cho discloses a display device comprising: a substrate (123, fig. 6 and paragraph 0189); a switching element arranged above the substrate (130, fig. 6 and paragraph 0196); a first insulating layer arranged above the substrate (124, fig. 6 and paragraph 0197) and including a first contact hole penetrating to the switching element (122c, fig. 6 and paragraph 0198); a conductive material filled in the first contact hole (122c, fig. 6 and paragraph 0200); a lower electrode arranged above the first insulating layer, overlapping the first contact hole, and being in contact with the conductive material (160, fig. 6 and paragraph 0200); an organic layer stacked on the lower electrode (170, fig. 6 and paragraph 0202) and including a hole injection layer on the lower electrode, a hole transport layer on the hole injection layer, and a light emitting layer on the hole transport layer (paragraphs 0036, 0174); an upper electrode stacked on the organic layer (180, fig. 6 and paragraph 0203); and a coating layer covering an end surface of the lower electrode, the hole injection layer, and the hole transport layer, and including an opening directly above the first contact hole (125, fig. 6 and paragraph 0201). Regarding claim 2, Cho further discloses wherein the organic layer further includes an electron blocking layer between the hole transport layer and the light emitting layer (paragraphs 0036, 0175), and the coating layer covers an end surface of the electron blocking layer (125, fig. 6). Regarding claim 3, Cho further discloses wherein the coating layer covers an end surface of the light emitting layer (125 covers end surface of all layers of 170, fig. 6). Regarding claim 4, Cho further discloses wherein the organic layer further includes a hole blocking layer on the light emitting layer (paragraphs 0037, 0182), and the coating layer covers an end surface of the hole blocking layer (125 covers end surface of all layers of 170, fig. 6). Regarding claim 5, Cho further discloses wherein the organic layer further includes an electron transport layer on the hole blocking layer (paragraphs 0036-0037), and the coating layer covers an end surface of the electron transport layer (125 covers end surface of all layers of 170, fig. 6). Regarding claim 6, Cho further discloses wherein the organic layer further includes an electron injection layer on the electron transport layer (paragraph 0037), and the coating layer covers an end surface of the electron injection (125 covers end surface of all layers of 170, fig. 6). Regarding claim 14, Cho further discloses wherein a boundary surface between the conductive material and the lower electrode is located under an upper surface of the first insulating layer (122c, fig. 6). Regarding claim 15, Cho further discloses wherein a boundary surface between the conductive material and the lower electrode is located above an upper surface of the first insulating layer (122c, fig. 6). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 8-10 and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Cho et al. (US 2018/0151817) in view of Do et al. (US 2017/0133635). Regarding claim 8, Cho discloses a display device comprising: a substrate (123, fig. 6 and paragraph 0189); a switching element arranged above the substrate (130, fig. 6 and paragraph 0196); a first insulating layer arranged above the substrate (124, fig. 6 and paragraph 0197) and including a first contact hole penetrating to the switching element (122c, fig. 6 and paragraph 0198); a conductive material filled in the first contact hole (122c, fig. 6 and paragraph 0200); a lower electrode arranged above the first insulating layer, overlapping the first contact hole, and being in contact with the conductive material (160, fig. 6 and paragraph 0200); an organic layer including a light emitting layer, and stacked on the lower electrode (170, fig. 6 and paragraph 0202); an upper electrode stacked on the organic layer (180, fig. 6 and paragraph 0203); and a coating layer covering an end surface of the lower electrode and including an opening directly above the first contact hole (125, fig. 6 and paragraph 0201), wherein the coating layer exposes a top surface of the lower electrode in the opening (160, fig. 6), and the organic layer is in contact with the top surface of the lower electrode in the opening of the coating layer (170, fig. 6). Cho further discloses that the coating layer is a pixel defining layer (125, fig. 6 and paragraph 0201) but does not disclose if it is formed of an inorganic material. However, it would have been obvious to one of ordinary skill in the art at the time of filing to use an inorganic or an organic material for the pixel defining layer since such practices were well known in the art at the time of filing and commonly employed. To illustrate such known practices see Do (1624, fig. 16 and paragraph 0109). Regarding claim 9, Cho further discloses a sealing layer (190, 121, fig. 6 and paragraphs 0205-0207), wherein the sealing layer covers the upper electrode (180, fig. 6) and the coating layer (125, fig. 6) and is in contact with the first insulating layer (although not shown in the figure because of the cutout, it is understood that the encapsulation layer covers the entire surface for protecting the light emitting device and touches the planarization layer in the periphery, paragraphs 0205-0207). Regarding claim 10, Cho further discloses a sealing layer (190, 121, fig. 6 and paragraphs 0205-0207), wherein the upper electrode (180, fig. 6) covers the coating layer (125, fig. 6) and is in contact with the first insulating layer (although not shown in the figure because of the cutout, it is common practice for the upper electrode to touch the planarization layer), and the sealing layer is stacked on the upper electrode (180,fig. 6). Regarding claim 16, Cho discloses the display device of claim 1 as mentioned above. Cho does not explicitly disclose a power supply line arranged on the first insulating layer, and a second insulating layer including a second contact hole penetrating to the power supply line, wherein the upper electrode is in contact wit the power supply line in the second contact hole. However, as mentioned above, Do discloses such features and therefore would be deemed obvious to one of ordinary skill in the art at the time of filing for the rationale mentioned above. Regarding claim 17, Cho discloses the device of claim 1 as mentioned above and further discloses a sealing layer covering the upper electrode and the coating layer (121, fig. 6 and paragraph 0206) and sealing to substrate 123, fig. 6. As such it would be deemed obvious to make contact with the planarization layer 124. Claims 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Oooka et al. (US 2016/0204176) in view of Choi et al. (US 2007/0170850). Regarding claim 11, Oooka discloses a display device comprising: a substrate (10, figs. 7-9 and paragraph 0076); a switching element arranged above the substrate (11, figs. 7-9 and paragraph 0076); a first insulating layer (13, figs. 7-9 and paragraph 0076) arranged above the substrate and including a first contact hole penetrating to the switching element (32a, figs. 7-9 and paragraphs 0076-0077); a conductive material filled in the first contact hole (paragraph 0037); a lower electrode arranged above the first insulating layer and being in contact with the conductive material (32, figs. 7-9 and paragraph 0077); an organic layer (33b, figs.8-9 and paragraph 0080) including a light emitting layer (33c, fig. 9 and paragraph 0080), stacked on the lower electrode, and covering an end surface of the lower electrode (32c, figs. 8-9 and paragraph 0078), and being in contact with the first insulating layer (13, fig. 9 and paragraph 0078); an upper electrode stacked on the organic layer and covering an end surface of the organic layer (34, fig. 9 and paragraph 0080). Oooka does not explicitly disclose wherein the upper electrode is in contact with the first insulating layer. Oooka’s figure 9 shows electrode 34 angled down towards insulating layer 13 but the figure is cutoff. However, it would have been obvious to one of ordinary skill in the art at the time of filing to have Oooka’s electrode (34,fig. 9) make contact with the insulating layer (13, fig. 9) because a well known common configuration would have the electrode come in contact with and penetrate the planarization insulating layer to connect with a power source. To illustrate such known teachings see Choi figure 1 as follows: Planarization layer (160, fig. 1 and paragraph 0054); Bottom electrode (171, fig. 1 and paragraph 0056); Organic layer with emission layer (190, fig 1 and paragraph 0057); Top electrode (200,fig. 1 and paragraph 0057) angles down and contacts planarization layer (160, fig. 1), penetrates planarization layer and connects to power supply line (150a, fig. 1 and paragraph 0055). Regarding claims 12-13, Oooka in view of Choi discloses the display device of claim 11, as mentioned above. Oooka further discloses a sealing layer (40, fig. 4) on the upper electrode (34, fig. 4). Oooka does not explicitly disclose wherein the sealing layer (claim 12) or the upper electrode (claim 13) is in contact with the first insulating layer. However, Oooka does explicitly disclose wherein the organic layer is formed by an oblique evaporation method utilizing an acute angle of deposition (paragraphs 0078-0079). As such, edge regions of the organic layer and layers thereafter would be at an inclined plane. Thus it would be deemed obvious to one of ordinary skill in the art at the time of filing within normal experimentation of Oooka’s teachings that the upper electrode and/or the sealing layer would contact the insulating layer (13, fig. 3). Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Cho et al. (US 2018/0151817) in view of Choi et al. (US 2007/0170850). Regarding claim 18, Cho discloses the device of claim 1 as mentioned above and further discloses a sealing layer (121, fig. 6) covering the upper electrode (180, fig. 6) and the upper electrode covering the coating layer (125, fig. 6). Cho does no disclose wherein the upper electrode contacts the insulating layer. However, as mentioned above, such feature would be deemed obvious in view of Choi. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS M MENZ whose telephone number is (571)272-1877. The examiner can normally be reached Monday-Friday 8:00am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DOUGLAS M MENZ/ Primary Examiner, Art Unit 2897 4/13/26
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Prosecution Timeline

Aug 08, 2023
Application Filed
Oct 02, 2025
Non-Final Rejection mailed — §102, §103
Feb 19, 2026
Response Filed
Apr 16, 2026
Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
88%
Grant Probability
93%
With Interview (+4.6%)
2y 0m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 766 resolved cases by this examiner. Grant probability derived from career allowance rate.

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