Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species 2 in the reply filed on 1/23/26 is acknowledged. The traversal is on the ground(s) that the species are not distinct because the species are not mutually exclusive and all claims read upon the elected species. This is not found persuasive because an exhaustive search has been conducted on the elected claims and allowable subject matter has been identified and a second and burdensome search would be required to address the additional species and identify the most relevant art. However, Applicant is reminded that should the allowable subject matter be properly incorporated into the withdrawn claims, rejoinder may be possible.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 7 (and therefore dependent claims 8-15) and on separate grounds claim 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 7 is recited below (with the Examiner’s suggested correction):
7. The semiconductor package of claim 1, wherein the plurality of regions comprises a first region and a second region, the first region comprises at least a portion of each of four sides of a [the] second surface of the semiconductor chip, the second region comprises four vertices of the second surface of the semiconductor chip, and the separation distance between the neighboring ones of the respective bumps of the first region is different from the separation distance between the neighboring ones of the respective bumps of the second region.
A “second surface of the semiconductor chip” has no prior recitation and requires “a” rather than “the”. The Examiner proposes the above simple amendment to fix the lack of antecedent basis issue in Claim 7. However, it is more complex than it appears because a second surface of the semiconductor chip is missing an essential element- that is a first surface of the semiconductor chip- claim 1 may require an amendment to include that the semiconductor chip has a first and second surface to fully resolve this 112 rejection OR perhaps the Applicant intended to refer to the substrate and not the chip? -where a first and second surface are previously recited in claim 1. Correction is required.
Claim 13 recites:
The semiconductor package of claim 12, wherein the first thickness is in a range of 60% to 90% of the sum of the thicknesses of the first non-conductive film and the second non-conductive film (of which regions?), and the second thickness is in a range of about 90% to about 100% of the sum of the thicknesses of the first non-conductive film and the second non-conductive film (of which regions?).
Claim 13 has two separate regions, each with a first and second non conductive film- it is unclear which regions the summation refers to and requires clarification. For purposes of examination the Examiner proffers her best guess as cited in the below rejection.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 7, 9-15 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Yim et al (US 2006/0033213)
A semiconductor package comprising:
a semiconductor chip (Fig.3B (130) and [0051- IC]) comprising:
a substrate ( Fig.3B (120) and [0052]) comprising a first surface ( bottom) and a second surface ( top) opposite to the first surface (bottom); and
a plurality of lower pads (Fig.3B/4B (122/222) and [0052/0080]) on the second surface (top) at different intervals [0080- teaching electrodes 122 of a pitch of 50 um and 222 having a pitch of 38 um);
a plurality of bumps (Fig.3B/4B (132/232) and [0051/0057]) attached to the plurality of lower pads (Fig.3B/4B (122/222) and [0052/0080]);
a first non-conductive film (Fig.3C (144) and [0055])) on the second surface (top) of the substrate (Fig.3C (120) and [0052]); and
a second non-conductive film (Fig.3C (142 and [0051]) on the first non-conductive film (Fig.3C (144) and [0055])), wherein a plurality of regions are defined in the semiconductor package according to a separation distance between the plurality of bumps (Fig.3B/4B (132/232) and [0051/0057]), such that each region of the plurality of regions comprises respective bumps (Fig.3B/4B (132/232) and [0051/0057]), from among the plurality of bumps (Fig.3B/4B (132/232) and [0051/0057]), that have a respective separation distance between neighboring ones of the respective bumps (Fig.3B/4B (132/232) and [0051/0057]) within the region (see [0005; 0009; and 0080- teaching that the pitches vary] can be seen as separated into different regions compare Fig.s 3B/4B],
wherein a sum of thicknesses of the first non-conductive film and the second non- conductive film is constant (Fig.3C (142/144- resins shown to be a constant thickness) , and
wherein an elastic modulus of the first non-conductive film and an elastic modulus of the second non-conductive film are different from each other (the Young's modulus for a cured blend of solid Bisphenol A (BPA), liquid Bisphenol F (BPF), and phenoxy resin in a 1:1.5:1.5 mass ratio, cured with 2-methylimidazole (2-MI) and a silane coupling agent (3-glycidyloxypropyltrimethoxysilane- as taught by Yim), typically ranges between 2.5 GPa and 3.5 GPa- this is the modulus of layer 142;
with the polystyrene Ni coated particles the modulus increases to 5.0 to 7.0 GPa- this is the modulus of layer 144- so the two are different).
7. The semiconductor package of claim 1, wherein the plurality of regions comprises a first region (Fig.3B/3C (122) and [0080]) and a second region (Fig.4B/4C (222) and [0080]), the first region (Fig.3B/3C (122) and [0080]) comprises at least a portion of each of four sides of the second surface of the semiconductor chip (Fig.3B/3C (130) and [0051- IC]), the second region (Fig.4B/4C (222) and [0080]) comprises four vertices of the second surface of the semiconductor chip (Fig.4B/4C (230) and [0063- IC]), and the separation distance between the neighboring ones of the respective bumps ([0080- pitch is 50 um) of the first region is different from the separation distance between the neighboring ones of the respective bumps of the second region ([0080-pitch is 38 um).
9. The semiconductor package of claim 7, wherein the separation distance between the neighboring ones of the respective bumps of the first region (Fig.3B/3C (122) and [0080]) is a first distance ([0080- pitch is 50 um), the separation distance between the neighboring ones of the respective bumps of the second region (Fig.4B/4C (222) and [0080]) is a second distance ([0080-pitch is 38 um), and the second distance (38 um) is less than the first distance (50 um).
10. The semiconductor package of claim 9, wherein the first distance is in a range of 60 pm to 100 pm ([0005]), and the second distance is in a range of 20 pm to 40 pm {0080].
11. The semiconductor package of claim 7, wherein a thickness of a portion of the first non-conductive film in the first region (Fig.3C (144) and [0055]) is different from a thickness of a portion of the first non-conductive film in the second region (Fig.4C (246+244- it is thicker because it includes an additional layer 246) and [0060-0061/0085]).
12. The semiconductor package of claim 11, wherein the first non-conductive film has a first thickness in the first region (Fig.3C (144) and [0055]) and has a second thickness in the second region, and the second thickness is greater than the first thickness (Fig.4C (246+244- it is thicker because it includes an additional layer 246) and [0060-0061/0085]).
13. The semiconductor package of claim 12, wherein the first thickness is in a range of 60% to 90% of the sum of the thicknesses of the first non-conductive film (Fig.3C (144) and [0055])) and the second non-conductive film (Fig.3C (142) and [0051]), and the second thickness (Fig.4C (246+244- it is thicker because it includes an additional layer 246) and [0060-0061/0085]) is in a range of about 90% to about 100% of the sum of the thicknesses of the first non-conductive film (Fig.4C (246+244) and the second non-conductive film (Fig.4C (242) and [0059-0061]) [please note the 112 rejection made above].
14. The semiconductor package of claim 7, wherein the plurality of regions further comprises a third region (Fig.5C (422) and [0072]) that comprises a central region of the second surface of the semiconductor chip (Fig.5C (330) and [0068]), the separation distance between the neighboring ones of the respective bumps (Fig.3B (132) and [0051]) of the first region is a first distance ([0080- pitch is 50 um), and the separation distance between the neighboring ones of the respective bumps (Fig.5C (332) and [0068]) of the third region is less than the first distance (compare Figs. 3C to 5C).
15. The semiconductor package of claim 14, wherein a thickness of a portion of the first non-conductive film within the third region (Fig.5C (344) and [0069] is greater than a thickness of a portion of the first non-conductive film within the first region (Fig.3C (144) and [0055])).
Allowable Subject Matter
Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim (claim 1) and any intervening claims (and the 112 rejection of claim 7 is corrected).
Prior art teaches the limitations of claims 1 and 7 as cited above; however fails to teach nor suggest the limitations of claim 8 as recited below:
8. The semiconductor package of claim 7, wherein a portion of the first region is located between a first portion of the second region and a second portion of the second region, wherein the portion of the first region comprises a portion of one side of the second surface of the semiconductor chip, and wherein the first portion of the second region comprises a first vertex of the second surface of the semiconductor chip, and the second portion of the second region comprises a second vertex of the second surface of the semiconductor chip.
Consequently, claim 8 contains allowable subject matter IF the 112 rejection is resolved.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Cho et al ( US 20180337120, US 10262933); Jang et al (US 11837577); Moon (US 20250079373) teach similar devices.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAURA M MENZ whose telephone number is (571)272-1697. The examiner can normally be reached Monday-Friday 7:00-3:30.
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/LAURA M MENZ/Primary Examiner, Art Unit 2813
3/28/26
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