Prosecution Insights
Last updated: April 19, 2026
Application No. 18/368,169

DISPLAY PANEL AND DISPLAY APPARATUS INCLUDING THE SAME

Non-Final OA §102§103
Filed
Sep 14, 2023
Examiner
VLCEK, JACOB ALEXANDER
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
100%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
0%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allow Rate
1 granted / 1 resolved
+32.0% vs TC avg
Minimal -100% lift
Without
With
+-100.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
11 currently pending
Career history
12
Total Applications
across all art units

Statute-Specific Performance

§103
56.5%
+16.5% vs TC avg
§102
30.4%
-9.6% vs TC avg
§112
13.0%
-27.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3, 9, 11-13, and 20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kim et al. (US 20210202652 A1) . Regarding claim 1, FIG. 1, FIG. 2, FIG. 3, and FIG. 5 of Kim et al. teach a display panel (10; FIG. 1; paragraph 0033) comprising: a substrate (100, 300; FIG. 2; paragraph 0035) including a display area (DA; FIG. 1; paragraph 0031) and a peripheral area (NDA; FIG. 1; paragraph 0031) surrounding the display area; a display element (200; FIG. 5; paragraph 0071) arranged in the display area on the substrate; a voltage supply line (160, 170, ELVDD, ELVSS; FIG. 2; FIG. 3; paragraph 0044) arranged in the peripheral area on the substrate, wherein the voltage supply line is electrically connected (T1, TFT; FIG. 3; FIG. 5); paragraph 0044 to a portion of a common electrode of the display element (200, 230; FIG. 5; paragraph 0044) extending to the peripheral area; and a conductive line (215; FIG. 6; paragraph 0100) embedded in the substrate and connected to the voltage supply line. Regarding claim 2, FIG. 7 of Kim et al. teaches the display panel of claim 1, wherein the conductive line (215; FIG. 7; paragraph 0105) overlaps the voltage supply line (170; FIG. 7; paragraph 0105) and is electrically connected to the voltage supply line via a plurality of contact areas (170; 215; FIG. 7; paragraph 0105). Regarding claim 3, FIG. 2 and FIG. 7 of Kim et al. teach the display panel of claim 1, wherein the substrate (100, 300; FIG. 2; paragraph 0035) includes: a first base layer (100; FIG. 7; paragraph 0035); a second base layer (300; FIG. 7; paragraph 0035) on the first base layer; and a barrier layer (101; 400; FIG. 7; paragraph 0068; paragraph 0103) between the first base layer and the second base layer, wherein the barrier layer includes a first barrier layer (101; FIG. 7; paragraph 0068) and a second barrier layer (400; FIG. 7; paragraph 0103), wherein the conductive line (215; FIG. 7; paragraph 0105) is between the first barrier layer and the second barrier layer. Regarding claim 9, FIG. 2 of Kim et al. teaches the display panel of claim 1, further comprising: a first fan-out line (151; FIG. 2; paragraph 0046) arranged in the peripheral area (NDA; FIG. 1; paragraph 0031) on the substrate (100, 300; FIG. 2; paragraph 0035) and connected to a data line (DL; FIG. 2; paragraph 0046) of the display area (DA; FIG. 1; paragraph 0031); and a second fan-out line (20; 110; 115; FIG. 2; FIG. 5; paragraph 0089) disposed in a same layer as the conductive line (215; FIG. 6; paragraph 0100) and electrically connected (150; FIG. 2; paragraph 0046) to the first fan-out line. Regarding claim 11, FIG. 1, FIG. 2, FIG. 3, and FIG. 5 of Kim et al. teach a display apparatus comprising: a display panel (10; FIG. 1; paragraph 0033) in which a display area (DA; FIG. 1; paragraph 0031) and a peripheral area (NDA; FIG. 1; paragraph 0031) surrounding the display area are defined; and an integrated circuit (150; FIG. 2; paragraph 0046) disposed on a rear surface of the display panel, wherein the display panel includes: a substrate (100, 300; FIG. 2; paragraph 0035); a display element (200; FIG. 5; paragraph 0071) arranged in the display area on the substrate; a voltage supply line (160, 170, ELVDD, ELVSS; FIG. 2; FIG. 3; paragraph 0044) arranged in the peripheral area on the substrate, wherein the voltage supply line is electrically connected (T1, TFT; FIG. 3; FIG. 5); paragraph 0044 to a portion of a common electrode of the display element (200, 230; FIG. 5; paragraph 0044) extending to the peripheral area; and a conductive line (215; FIG. 6; paragraph 0100) embedded in the substrate and connected to the voltage supply line. Regarding claim 12, FIG. 7 of Kim et al. teaches the display apparatus of claim 11, wherein the conductive line (215; FIG. 7; paragraph 0105) overlaps the voltage supply line (170; FIG. 7; paragraph 0105) and is electrically connected to the voltage supply line via a plurality of contact areas (170; 215; FIG. 7; paragraph 0105). Regarding claim 13, FIG. 2 and FIG. 7 of Kim et al. teach the display apparatus of claim 11, wherein the substrate (100, 300; FIG. 2; paragraph 0035) includes: a first base layer (100; FIG. 7; paragraph 0035); a second base layer (300; FIG. 7; paragraph 0035) on the first base layer; and a barrier layer (101; 400; FIG. 7; paragraph 0068; paragraph 0103) between the first base layer and the second base layer, wherein the barrier layer includes a first barrier layer (101; FIG. 7; paragraph 0068) and a second barrier layer (400; FIG. 7; paragraph 0103), wherein the conductive line (215; FIG. 7; paragraph 0105) is between the first barrier layer and the second barrier layer. Regarding claim 20, FIG. 2 of Kim et al. teaches the display apparatus of claim 11, further comprising: a first fan-out line (151; FIG. 2; paragraph 0046) arranged in the peripheral area (NDA; FIG. 1; paragraph 0031) on the substrate (100, 300; FIG. 2; paragraph 0035) and connected to a data line (DL; FIG. 2; paragraph 0046) of the display area (DA; FIG. 1; paragraph 0031); and a second fan-out line (20; 110; 115; FIG. 2; FIG. 5; paragraph 0089) disposed in a same layer as the conductive line (215; FIG. 6; paragraph 0100) and electrically connected (150; FIG. 2; paragraph 0046) to the first fan-out line. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 4, 14, and 15 are rejected under 35 U.S.C. 103 as being obvious over Kim et al. in view of Yuan et al. (US 20200312886 A1). Regarding claim 4, Kim et al. teach the display panel of claim 1, wherein the conductive line (170, 215; FIG. 2; FIG. 6; paragraph 0100) surrounds the display area (DA; FIG. 2; paragraph 0031) and is arranged in the peripheral area (NDA; FIG. 2; paragraph 0031) and a pad area (140, FIG.2; paragraph 0043) is defined in the peripheral area. Kim et al. do not teach a portion of the conductive line positioned in the pad area is connected to a flexible printed circuit board disposed on a rear surface of the substrate. FIG. 14 of Yuan et al. teaches at least one flexible printed circuit board (FCP; FIG. 14; paragraph 0088) including a second conductive layer (42; FIG. 14; paragraph 0088), which may be electrically connected to the plurality of conductive sections (41; FIG. 14; paragraph 0088). Kim et al. and Yuan et al. are both analogous to the claimed invention in that they involve display devices that use power supply and conduction. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the conductive lines in the pad area make contact with the flexible circuit board. This would allow for corresponding electrical signals can be provided to the signal lines of the display region through the driving chip and/or the FPC board (paragraph 0004). Regarding claim 14, Kim et al. teach the display apparatus of claim 13. Kim et al. do not teach an opening corresponding to a pad area being defined in the first base layer of the substrate, and the integrated circuit being mounted on a flexible printed circuit board, a portion of which is disposed in the opening. FIG. 15 of Yuan et al. teaches a second flexible substrate (60; FIG. 15; paragraph 0090) provided with one or more trenches (61; FIG. 15; paragraph 0090), such that at least a portion of each conductive section (41; FIG. 14; paragraph 0088) can be exposed, connecting the flexible printed circuit board (FPC; FIG. 15; paragraph 0090) to the conductive sections. Kim et al. and Yuan et al. are both analogous to the claimed invention in that they involve display devices that use power supply and conduction. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have an opening corresponding to a pad area being defined in the first base layer of the substrate, and the integrated circuit being mounted on a flexible printed circuit board, a portion of which is disposed in the opening. This allows the FPCP to connect to the conductive layers (paragraph 90). Regarding claim 15, Kim et al. teach the display apparatus of claim 11, wherein the conductive line (170, 215; FIG. 2; FIG. 6; paragraph 0100) surrounds the display area (DA; FIG. 2; paragraph 0031) and is arranged in the peripheral area (NDA; FIG. 2; paragraph 0031) and a pad area (140, FIG.2; paragraph 0043) is defined in the peripheral area. Kim et al. do not teach a trench being defined in the rear surface of the substrate, wherein the trench exposes a portion of the conductive line in the pad area, and a portion of the conductive line positioned in the pad area is connected to a flexible printed circuit board disposed on a rear surface of the substrate. FIG. 14 and FIG. 15 of Yuan et al. teach at least one flexible printed circuit board (FCP; FIG. 14; paragraph 0088) including a second conductive layer (42; FIG. 14; paragraph 0088), which may be electrically connected to the plurality of conductive sections (41; FIG. 14; paragraph 0088), as well as a second flexible substrate (60; FIG. 15; paragraph 0090) provided with one or more trenches (61; FIG. 15; paragraph 0090), such that at least a portion of each conductive section can be exposed. Kim et al. and Yuan et al. are both analogous to the claimed invention in that they involve display devices that use power supply and conduction. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a trench being defined in the rear surface of the substrate, wherein the trench exposes a portion of the conductive line in the pad area, and a portion of the conductive line positioned in the pad area is connected to a flexible printed circuit board disposed on a rear surface of the substrate. This would allow for corresponding electrical signals can be provided to the signal lines of the display region through the driving chip and/or the FPC board (paragraph 0004). Claims 5, 10, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. in view of Yuan et al. and Lee et al. ((US 10916616 B2). Regarding claim 5, Kim et al. and Yuan et al. teach the display panel of claim 4. FIG. 2 and FIG. 9 of Kim et al. further teach the conductive line (215; FIG. 9; paragraph 0110) including a first portion (215; FIG. 9; paragraph 0110) and a second portion (215; FIG. 9; paragraph 0110), wherein the second portion is positioned farther from the pad area (140, FIG.2; paragraph 0043) than the first portion. Kim et al. and Yuan et al. do not teach a width of the second portion of the conductive line being greater than a width of the first portion. FIG. 14 of Lee et al. displays the first conductive layer (40; FIG. 14; paragraph 0044) being wider than the second conductive layer (40; FIG. 14; paragraph 0044), with the first conductive layer farther away from the pad area than the second conductive layer. It would have been obvious before the effective filing date of the claimed invention to have modified Kim et al. to have the second portion of the conductive line being greater than a width of the first portion. This means the wider conductive layer includes a plurality of conductive sections. Regarding claim 10, FIG.7 of Kim et al. teaches the display panel of claim 9, wherein the substrate (100, 300; FIG. 2; paragraph 0035) includes: a first base layer (100; FIG. 7; paragraph 0035); a second base layer (300; FIG. 7; paragraph 0035) on the first base layer; and a barrier layer (101; 400; FIG. 7; paragraph 0068; paragraph 0103) between the first base layer and the second base layer, wherein the barrier layer includes a first barrier layer (101; FIG. 7; paragraph 0068) and a second barrier layer (400; FIG. 7; paragraph 0103), wherein the conductive line (215; FIG. 7; paragraph 0105) is between the first barrier layer and the second barrier layer. Kim et al. do not teach an opening corresponding to a pad area being defined in the first barrier layer and the first base layer of the substrate and a portion of the second fan-out line positioned in the pad area being connected to the first fan-out line and a flexible printed circuit board disposed on a rear surface of the substrate. FIG. 15 of Yuan et al. teaches a second flexible substrate (60; FIG. 15; paragraph 0090) provided with one or more trenches (61; FIG. 15; paragraph 0090), such that at least a portion of each conductive section (41; FIG. 14; paragraph 0088) can be exposed. FIG. 1 and FIG. 5 of Lee et al. further display a flexible printed circuit board (FPCB; FIG. 1; paragraph 34) connecting a controller (80; FIG. 1; paragraph 34) to the terminal portion (40; FIG. 1; paragraph 34) electrically, with signals or power transferred from the controller moves to wirings (21, 31, 51, 61, 71; FIG. 1; paragraph 34) connected to the terminal portion, with said wirings overlapping the flexible area. Kim et al., Yuan et al., and Lee et al. are all analogous to the claimed invention in that they involve display devices that use power supply and conduction. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have opening corresponding to a pad area being defined in the first barrier layer and the first base layer of the substrate and a portion of the second fan-out line positioned in the pad area is connected to the first fan-out line and a flexible printed circuit board disposed on a rear surface of the substrate. This allows the FPCP to connect to the conductive layers (Yuan et al.: paragraph 90) as well as signal and power to be transferred (Lee et al.: paragraph 34). Regarding claim 16, Kim et al. and Yuan et al. teach the display apparatus of claim 15. FIG. 2 and FIG. 9 of Kim et al. further teach the conductive line (215; FIG. 9; paragraph 0110) including a first portion (215; FIG. 9; paragraph 0110) and a second portion (215; FIG. 9; paragraph 0110), wherein the second portion is positioned farther from the pad area (140, FIG.2; paragraph 0043) than the first portion. Kim et al. and Yuan et al. do not teach a width of the second portion of the conductive line being greater than a width of the first portion. FIG. 14 of Lee et al. displays the first conductive layer (40; FIG. 14; paragraph 0044) being wider than the second conductive layer (40; FIG. 14; paragraph 0044), with the first conductive layer farther away from the pad area than the second conductive layer. It would have been obvious before the effective filing date of the claimed invention to have modified Kim et al. to have the second portion of the conductive line being greater than a width of the first portion. This means the wider conductive layer includes a plurality of conductive sections. Claim(s) 7 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. in view of Yuan et al. and in further view of Gai et al. (US 20240040876 A1). Regarding claim 7, Kim et al. teaches the display panel of claim 1, wherein the conductive line (215; FIG. 9; paragraph 0110 includes a first conductive line (215; FIG. 9; paragraph 0110) and a second conductive line (215; FIG. 9; paragraph 0110, wherein the first conductive line surrounds the display area (DA; FIG. 2; paragraph 0031) and is arranged in the peripheral area (NDA; FIG. 2; paragraph 0031), and a pad area (140, NDA; FIG.3; paragraph 0031; paragraph 0043) is defined in the display area or the peripheral area. Kim et al. does not teach the second conductive line extending from the first conductive line to cross the display area and a portion of the second conductive line positioned in the pad area being connected to a flexible printed circuit board disposed on a rear surface of the substrate. FIG. 15 of Yuan et al. teaches at least one flexible printed circuit board (FPC; FIG. 15; paragraph 0088), shown at the bottom surface of the substrate, may include a second conductive layer (42; FIG. 15; paragraph 0088) functioning as a pad area. FIG. 9 of Gai et al. further displays a second conductive line (40; FIG. 9; paragraph 0038) including a backbone conductive line (410; FIG. 9; paragraph 0038) and a plurality of branch conductive lines (420; FIG. 9; paragraph 0038), with the branch conductive line passing through the display area (11; FIG. 9; paragraph 0038). Kim et al., Yuan et al, and Gai et al. are all analogous to the claimed invention in that they involve display devices with conductive lines. Therefor, it would have been obvious to someone with ordinary skill in the art before the effective filing date of the claimed invention to modify Kim so that the second conductive line extends from the first conductive line to cross the display area and a portion of the second conductive line positioned in the pad area is connected to a flexible printed circuit board disposed on a rear surface of the substrate. This would allow for corresponding electrical signals can be provided to the signal lines of the display region through the driving chip and/or the FPC board (Yuan et al.: paragraph 0004) and ensures that power distribution through the display area is uniform (Gai et al.: paragraph 0040). Regarding claim 18, Kim et al. teaches the display apparatus of claim 11, wherein the conductive line (215; FIG. 9; paragraph 0110 includes a first conductive line (215; FIG. 9; paragraph 0110) and a second conductive line (215; FIG. 9; paragraph 0110, wherein the first conductive line surrounds the display area (DA; FIG. 2; paragraph 0031) and is arranged in the peripheral area (NDA; FIG. 2; paragraph 0031), and a pad area (140, NDA; FIG.3; paragraph 0031; paragraph 0043) is defined in the display area or the peripheral area. Kim et al. does not teach the second conductive line extending from the first conductive line to cross the display area, a trench being defined in the rear surface of the substrate, wherein the trench exposes a portion of the second conductive line arranged in the pad area, and the portion of the second conductive line positioned in the pad area being connected to a flexible printed circuit board disposed on a rear surface of the substrate. FIG. 15 of Yuan et al. teaches at least one flexible printed circuit board (FPC; FIG. 15; paragraph 0088), shown at the bottom surface of the substrate, may include a second conductive layer (42; FIG. 15; paragraph 0088) functioning as a pad area as well as a second flexible substrate (60; FIG. 15; paragraph 0090) provided with one or more trenches (61; FIG. 15; paragraph 0090), such that at least a portion of each conductive section (41; FIG. 14; paragraph 0088) can be exposed. FIG. 9 of Gai et al. further displays a second conductive line (40; FIG. 9; paragraph 0038) including a backbone conductive line (410; FIG. 9; paragraph 0038) and a plurality of branch conductive lines (420; FIG. 9; paragraph 0038), with the branch conductive line passing through the display area (11; FIG. 9; paragraph 0038). Kim et al., Yuan et al, and Gai et al. are all analogous to the claimed invention in that they involve display devices with conductive lines. Therefore, it would have been obvious to someone with ordinary skill in the art before the effective filing date of the claimed invention to modify Kim so that the second conductive line extends from the first conductive line to cross the display area, a trench is defined in the rear surface of the substrate, wherein the trench exposes a portion of the second conductive line arranged in the pad area, and a portion of the second conductive line positioned in the pad area is connected to a flexible printed circuit board disposed on a rear surface of the substrate. This would allow for corresponding electrical signals can be provided to the signal lines of the display region through the driving chip and/or the FPC board (Yuan et al.: paragraph 0004) while letting the FPCP to connect to the conductive layers (Yuan et al.: paragraph 90) and ensures that power distribution through the display area is uniform (Gai et al.: paragraph 0040). Claims 8 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. in view of Chu et al. (US 20230214076 A1). Regarding claim 8, FIG. 2 and FIG. 5 of Kim et al. teach the display panel of claim 1, wherein the voltage supply line (160, 170; FIG. 2; paragraph 0044) includes a first supply line (160; FIG. 2; paragraph 0044) and a second supply line (170; FIG. 2; paragraph 0044). Kim does not teach the second supply line overlapping the first supply line and in contact with the first supply line. FIG. 5 and FIG. 7 of Chu display a first supply line (V1; FIG. 5; paragraph 0053) and a second supply line (V2; FIG. 5; paragraph 0053) overlapping and in contact with each other (FIG. 7). Kim et al. and Chu et al. are both analogous to the claimed invention in that they involve display devices with voltage supply lines. Therefore, it would have been obvious to someone with ordinary skill in the art before the effective filing date of the claimed invention to make the second supply line overlap the first supply line and be in contact with the first supply line. This allows the two lines to be include the respective materials of what they are in contact with while differing from each other (paragraph 0053; paragraph 0075). Regarding claim 19, FIG. 2 and FIG. 5 of Kim et al. teach the display device of claim 11, wherein the voltage supply line (160, 170; FIG. 2; paragraph 0044) includes a first supply line (160; FIG. 2; paragraph 0044) and a second supply line (170; FIG. 2; paragraph 0044). Kim does not teach the second supply line overlapping the first supply line and in contact with the first supply line. FIG. 5 and FIG. 7 of Chu display a first supply line (V1; FIG. 5; paragraph 0053) and a second supply line (V2; FIG. 5; paragraph 0053) overlapping and in contact with each other (FIG. 7). Kim et al. and Chu et al. are both analogous to the claimed invention in that they involve display devices with voltage supply lines. Therefore, it would have been obvious to someone with ordinary skill in the art before the effective filing date of the claimed invention to make the second supply line overlap the first supply line and be in contact with the first supply line. This allows the two lines to be include the respective materials of what they are in contact with while differing from each other (paragraph 0053; paragraph 0075). Allowable Subject Matter Claims 6 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 6, the combination of Kim et al. and Yuan et al. teach the display panel of claim 4. Kim et al. further teaches the conductive line (215; FIG. 9; paragraph 0110) including a first portion (215; FIG. 9; paragraph 0110) and a second portion (215; FIG. 9; paragraph 0110), wherein the second portion is positioned farther from the pad area (140; FIG.3; paragraph 0043) than the first portion, and the conductive line is electrically connected to the voltage supply line via a plurality of contact areas. Kim et al. does not teach a number of the contact areas per unit length in the first portion of the conductive line being greater than a number of the contact areas per unit length in the second portion of the conductive line. FIG. 14 of Yuan et al. teaches one first power-supply line (21; FIG. 14; paragraph 0051) may be electrically connected to the plurality of conductive sections (41; FIG. 14; paragraph 0051) while a second conductive layer (42; FIG. 14; paragraph 088) connected to the flexible circuit board (FCP; FIG. 14; paragraph 0088) may be electrically connected to the plurality of conductive sections, but not to the power-supply line. Yuan et al. does not disclose the conductive layer closer to the pad area as represented by the flexible circuit board has a greater than a number of the contact areas per unit length. Based on the configuration of Yuan et al., it would be improper in hindsight to modify Kim et al. so that the conductive layer closer to the pad area has more contact areas per unit length. Regarding claim 17, the combination of Kim et al. and Yuan et al. teach the display apparatus of claim 15. Kim et al. further teaches the conductive line (215; FIG. 9; paragraph 0110) including a first portion (215; FIG. 9; paragraph 0110) and a second portion (215; FIG. 9; paragraph 0110), wherein the second portion is positioned farther from the pad area (140; FIG.3; paragraph 0043) than the first portion, and the conductive line is electrically connected to the voltage supply line via a plurality of contact areas. Kim et al. does not teach a number of the contact areas per unit length in the first portion of the conductive line being greater than a number of the contact areas per unit length in the second portion of the conductive line. FIG. 14 of Yuan et al. teaches one first power-supply line (21; FIG. 14; paragraph 0051) may be electrically connected to the plurality of conductive sections (41; FIG. 14; paragraph 0051) while a second conductive layer (42; FIG. 14; paragraph 088) connected to the flexible circuit board (FCP; FIG. 14; paragraph 0088) may be electrically connected to the plurality of conductive sections, but not to the power-supply line. Yuan et al. does not disclose the conductive layer closer to the pad area as represented by the flexible circuit board has a greater than a number of the contact areas per unit length. Based on the configuration of Yuan et al., it would be improper in hindsight to modify Kim et al. so that the conductive layer closer to the pad area has more contact areas per unit length. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Jo et al. (US 20200175917 A1) concerns display apparatus with a display area, non-display areas, and fan-out lines. Jeong et al. (US 20190095007 A1) concerns a display apparatus with a display area and a non-display area with a bent portion.. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACOB A VLCEK whose telephone number is (571)272-9665. The examiner can normally be reached Mon-Fri, 9:00 AM -5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571) 272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J.A.V./Examiner, Art Unit 2817 /RATISHA MEHTA/Primary Examiner, Art Unit 2817
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Prosecution Timeline

Sep 14, 2023
Application Filed
Jan 06, 2026
Non-Final Rejection — §102, §103
Mar 27, 2026
Interview Requested
Apr 02, 2026
Applicant Interview (Telephonic)
Apr 02, 2026
Examiner Interview Summary

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Prosecution Projections

1-2
Expected OA Rounds
100%
Grant Probability
0%
With Interview (-100.0%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 1 resolved cases by this examiner. Grant probability derived from career allow rate.

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