DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim and Specification Status
The Examiner acknowledges the amendments to claims 1, 6, 10-11 and 20 in the Applicant’s response dated 15 July 2026. The claim amendments have been addressed below.
The Examiner acknowledges the amendments to claims 12-13 in the Applicant’s response dated 15 July 2026 in lieu of the 35 U.S.C. 112(a) rejection presented in the previous office action. The 35 U.S.C. 112(a) rejection to claims 12-13 have therefore been withdrawn.
The Examiner acknowledges the amendments to claims 5, 13, 18 and 20 in the Applicant’s response dated 15 July 2026 in lieu of the 35 U.S.C. 112(b) rejection presented in the previous office action. The 35 U.S.C. 112(b) rejection to claims 5, 13, 18 and 20 have therefore been withdrawn.
The Examiner acknowledges the cancellation of claim 2 in the Applicant’s response dated 15 July 2026.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 11-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding Claim 11, the claim recites in lines 11-13, “a first separation sub-region having a first dopant concentration and a second separation sub-region having a second dopant concentration less then the first dopant concentration of the first separation sub-region” and further recites in lines 14-17 ”a first separation sub-region comprising a first dopant concentration; and a second separation sub-region having a second dopant concentration, wherein the first dopant concentration of each first separation sub-region is greater than the second dopant concentration of each second separation sub-region”. The claim is rendered indefinite because it is unclear to one of ordinary skill in the art how a first separation sub-region and its corresponding doping concentration and a second separation sub-region and its corresponding dopant concentration are defined with respect to one another and then what appears to be the same first separation sub-region and its corresponding doping concentration and what appears to be the same second separation sub-region and its corresponding dopant concentration are redefined with respect to one another later in the claim in a similar manner. Lines 14-17 appear to be a duplication of previously defined lines 11-13 of the claim therefore rendering the claim indefinite. Claims 12-19 are rejected due to their dependence on claim 11.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 3-9 are rejected under 35 U.S.C. 103 as being unpatentable over Friedhelm Bauer et al (US 2019/0035884 A1; hereinafter “Bauer”) in view of Akimasa Kinoshita (US 2022/0344475 A1; hereinafter “Kinoshita”).
Regarding Claim 1, Bauer teaches a power semiconductor device, comprising:
a substrate (6, Fig. 1, para [0034] describes a substrate layer 6);
a drift layer formed in the substrate (5, Fig. 1, para [0034] describes a drift layer 6) including an active area having doped regions (AR and 4, Fig. 1, para [0034] describes an active area AR having a doped anode layer 4) and a termination area configured to surround the active area (TR, Fig. 1, para [0034] describes a termination region TR laterally surrounding the active region AR); and
a junction termination extension (JTE) in the termination area (JTE, annotated Fig. 1, para [0036] a termination region wherein an area comprising blocking regions BR and separation regions SR comprises a junction termination extension JTE),
wherein the substrate and the drift layer comprise a first conductivity type (6 and 5, Fig. 1, para [0034] describes wherein the substrate 6 and drift layer 5 are n-doped),
wherein the doped regions and the JTE comprise a second conductivity type (4 and 10, Fig. 1, para [0034] describes wherein the doped region 4 is p-doped and para [0035] describes wherein the JTE structure comprises p-doped floating field rings 10),
wherein the JTE comprises at least one blocking region adjacent to an edge of the active area (BR, annotated Fig. 1, para [0035] describes self-contained floating rings 10 wherein a first floating ring 10 comprises one blocking region BR as shown in annotated Fig. 1) and a plurality of separation regions (SR, annotated Fig. 1, para [0035] describes self-contained floating rings 10 wherein a plurality of floating rings 10 adjacent to one blocking region BR comprise a plurality of separation regions SR as shown in annotated Fig. 1),
wherein each separation region of the plurality of separation regions comprises two or more separation sub-regions (10 and 30, Fig. 6, para [0047] describes an embodiment in Fig. 6 that is a continuation of the first embodiment of Fig. 1, wherein the separation regions SR as shown in annotated Fig. 1 comprise a first separation sub-region 10 and a second separation sub-region 30),
wherein the two or more separation sub-regions are configured to have different dopant concentrations (10 and 30, Fig. 6, para [0047] describes wherein second separation sub-region 30 has a doping concentration lower than that of the first separation sub-region 10),
wherein each separation region (SR, annotated Fig. 1) comprises:
a first separation sub-region comprising a first dopant concentration (10, Fig. 6, para [0035] describes wherein a first separation sub-region 10 comprises a first dopant concentration between 1x10-17 cm-3 to 1x1019 cm-3); and
a second separation sub-region comprising a second dopant concentration (30, Fig. 6, para [0047] describes wherein a second separation sub-region 30 comprises a second dopant concentration that is less than the dopant concentration of the first separation sub-region 10 resulting in a dopant concentration below 1x10-17 cm-3 to 1x1019 cm-3),
wherein the first dopant concentration of each first separation sub-region is greater than the second dopant concentration of each second separation sub-region (30, Fig. 6, para [0047] describes wherein the second separation sub-region 30 comprises the second dopant concentration that is less than the first dopant concentration of the first separation sub-region 10),
wherein the second dopant concentration of each second separation sub-region is equal to a dopant concentration of the at least one blocking region (30 and BR, annotated Fig. 1 and Fig. 6, para [0047] describes wherein each of the second separation sub-regions comprises a second dopant concentration that is less than the dopant concentration of the first separation sub-region 10 resulting in a dopant concentration below 1x10-17 cm-3 to 1x1019 cm-3 wherein the blocking region BR of the embodiment of Fig. 6 would further comprise a second separation sub-region resulting in a dopant concentration of the blocking region corresponding to the p-type extension region 30 being equal to each of the dopant concentrations of the second separation sub-regions 30),
wherein a plurality of separation intervals are defined by a first separation interval and remaining separation intervals (d1, d2, and d3, Fig. 1, para [0037] describes distances d1, d2, and d3 between adjacent field rings 10 comprising blocking region BR and separation regions SR),
wherein the first separation interval is between a first separation sub-region of a first separation region closest to the at least one blocking region among the plurality of separation regions (10 and FSR, annotated Fig. 1 II depicts a first sub-separation region 10 of a first separation region FSR closest to the at least one blocking region BR) and the at least one blocking region (d1, annotated Fig. 1 II depicts wherein the first separation interval d1 is between the blocking region BR and the first sub-separation region 10 of a first separation region FSR).
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Bauer fails to explicitly disclose wherein the first separation interval is 1 micrometer or less.
However, Kinoshita teaches a similar power semiconductor device, wherein the first separation interval is 1 micrometer or less (22a and 31, Fig. 5, para [0051] describes wherein a first separation interval x1 between an outermost body 22a and an inner most guard ring 31 may be between 0.1 μm and 1.0 μm and a separation interval between adjacent guard rings 31 may further be less than 1 μm resulting in a first interval between guard rings being 1 micrometer or less).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the teachings of Bauer with Kinoshita to further disclose a power semiconductor device wherein a first separation interval is 1 micrometer or less in order to provide the advantage of providing a first interval large enough for a lower limit of a mask dimension to be used while further enabling a stable breakdown voltage characteristic and suppressing breakdown voltage variation due to charge in an insulating layer (Kinoshita, para [0091]).
Regarding Claim 3, the combination of Bauer and Kinoshita teaches the power semiconductor device of claim 1, wherein the first separation sub-region is configured to be located closer to the edge of the active area than the second separation sub-region (Bauer, 10 and 30, Fig. 1 and Fig. 6 depicts wherein the first separation sub-region 10 is between an enhanced doping region 15 and the second separation sub-region 30 as shown in Fig. 6 wherein the resulting first separation sub-region 10 as shown in Fig. 1 would be closer to the active region AR than the second separation sub-region 30).
Regarding Claim 4, the combination of Bauer and Kinoshita teaches the power semiconductor device of claim 3,
wherein the plurality of separation regions comprises a first separation region adjacent to the at least one blocking region (Bauer, FSR, annotated Fig. 1 II depicts wherein the plurality of separation regions SR comprises a first separation region FSR adjacent to the at least one blocking region BR) and a second separation region adjacent to the first separation region (SSR, annotated Fig. 1 II depicts wherein the plurality of separation regions SR comprises a second separation region SSR adjacent to the first separation region FSR),
wherein a distance between the first separation region and the at least one blocking region is less than a distance between the first separation region and the second separation region (Bauer, para [0037] describes wherein a distance between the neighboring floating rings 10 increase with increasing distance from the active region AR resulting in a distance d1 between the first separation region FSR and blocking region BR being less than a distance d2 between the second separation region SSR and the first separation region FSR).
Regarding Claim 5, the combination of Bauer and Kinoshita teaches the power semiconductor device of claim 4, wherein distances between adjacent separation regions increase as a distance from the edge of the active area increases (Bauer, Fig. 1, para [0037] describes wherein the distance between the neighboring floating rings 10 increase with increasing distance from the active region AR wherein each distance is measured from an inner separation region side (side closest to AR of floating ring separation region SR) resulting in a distance between adjacent separation regions SR increasing as a distance from the edge of the active area AR increases).
Regarding Claim 6, the combination of Bauer and Kinoshita teaches the power semiconductor device of claim 1, wherein the first separation sub- region and the second separation sub-region are configured to have different depths (Bauer, 10 and 30, Fig. 6, para [0047] describes wherein second separation sub-region 30 extends from the first main side surface 2 to a depth dER, which is larger than a depth of the first separation sub-region 10 resulting in different depths of the first separation sub-region 10 and the second separation sub-region 30).
Regarding Claim 7, the combination of Bauer and Kinoshita teaches the power semiconductor device of claim 6, wherein an upper side of the first separation sub-region and an upper side of the second separation sub-region are configured to be located at a single horizontal line (Bauer, 2, Fig. 1 and Fig. 6, para [0047] describes wherein the second separation sub-region extends from a first main side surface 2 representing a single horizontal line and first separating sub-region 10 can be seen extending from the same horizontal line in Fig. 6), and
wherein a lower side of the second separation sub-region is configured to be located lower than a lower side of the first separation sub-region (Bauer, dER, Fig. 6, para [0047] describes a depth dER representing a distance from the horizontal line 2 to a lower side of the second separation sub-region 30 which is larger than that of the first separation sub-region 10, represented by dFFR in Fig. 2, resulting in a lower side of the second separation sub-region being configured to be located lower than a lower side of the first separation sub-region 10).
Regarding Claim 8, the combination of Bauer and Kinoshita teaches the power semiconductor device of claim 7, wherein each of the plurality of separation regions comprises an overlapping region comprising a part of the first separation sub-region and a part of the second separation sub-region (Bauer, OR, annotated Fig. 6, depicts an overlapping region OR wherein a horizontal portion of the first separation sub-region 10 overlaps with a horizontal portion of the second separation sub-region 30 wherein a portion of the first separation sub-region 10 and a portion of the second separation sub-region 30 are located in the overlapping region OR).
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Regarding Claim 9, the combination of Bauer and Kinoshita teaches the power semiconductor device of claim 8, wherein the lower side of the second separation sub-region is configured to be located below the overlapping region (Bauer, OR, annotated Fig. 6 depicts wherein the lower side of the second separation sub-region 30 at d depth dER is located below a lowest surface of the overlapping region OR).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Friedhelm Bauer et al (US 2019/0035884 A1; hereinafter “Bauer”) in view of Akimasa Kinoshita (US 2022/0344475 A1; hereinafter “Kinoshita”) and in further view of Matthias Sven et al. (EP 2341528 A1; hereinafter “Sven”).
Regarding Claim 10, the combination of Bauer and Kinoshita discloses all the limitations of claim 1.
Bauer and Kinoshita fail to explicitly disclose the power semiconductor device of claim 1, wherein the at least one blocking region comprises a plurality of sub-blocking regions, wherein each of the plurality of sub-blocking regions includes a doping concentration corresponding to contact regions in the active area, wherein the plurality of sub-blocking regions are formed while doping the contact regions.
However, Sven teaches a similar power semiconductor device, wherein the at least one blocking region (50, Fig. 4, para [0025] describes a VLD low doping region 50 comprising a blocking region in a termination area) comprises a plurality of sub-blocking regions (52, 54, 56, 58, Fig. 4, para [0027] describes heavily p-doped shallow regions 52, 54, 56, 58 in the blocking region 50), wherein each of the plurality of sub-blocking regions includes a doping concentration corresponding to contact regions in the active area (42, Fig. 2 and Fig. 4, para [0025] describes a double anode structure comprising a shallow portion 42 wherein shallow portions 42 are contact regions and para [0036] describes wherein a same implantation dose may be used to form the contact regions 42, and the sub-blocking regions 52, 54, 56, and 58 resulting in corresponding doping concentrations), wherein the plurality of sub-blocking regions are formed while doping the contact regions (para [0036] describes wherein a same implantation dose may be used to form the contact regions 42, and the sub-blocking regions 52, 54, 56, and 58).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the teachings of Bauer and Kinoshita with Sven to further disclose a power semiconductor device wherein a blocking structure comprises sub-blocking regions that correspond to device contacts and are formed in a same step in order to provide the advantage of being able to form a blocking structure and an anode layer comprising device contacts in a single ion implantation step so that no further application of a shadow mask or a resist mask may be necessary simplifying the manufacturing process and reducing manufacturing costs (Sven, para [0036]).
Claim 11-19 are rejected under 35 U.S.C. 103 as being unpatentable over Friedhelm Bauer et al (US 2019/0035884 A1; hereinafter “Bauer”) in view of Toru Hiyoshi (US 2018/0012957 A1; hereinafter “Hiyoshi”) and in further view of Akimasa Kinoshita (US 2022/0344475 A1; hereinafter “Kinoshita”).
Regarding Claim 11, Bauer teaches a power semiconductor device, comprising:
a substrate (6, Fig. 1, para [0034] describes a substrate layer 6);
a drift layer in the substrate (5, Fig. 1, para [0034] describes a drift layer 6) including an active area having doped regions (AR and 4, Fig. 1, para [0034] describes an active area AR having a doped anode layer 4) and a termination area configured to surround the active area (TR, Fig. 1, para [0034] describes a termination region TR laterally surrounding the active region AR); and
wherein the termination area comprises at least one blocking region (BR, annotated Fig. 1, para [0035] describes self-contained floating rings 10 wherein a first floating ring 10 comprises one blocking region BR as shown in annotated Fig. 1) and a plurality of separation regions (SR, annotated Fig. 1, para [0035] describes self-contained floating rings 10 wherein a plurality of floating rings 10 adjacent to one blocking region BR comprise a plurality of separation regions SR as shown in annotated Fig. 1),
wherein the plurality of separation regions are configured to be disposed along a lateral direction of the at least one blocking region (SR, annotated Fig. 1 depicts wherein the plurality of separation regions SR are disposed along a lateral direction, parallel to a first main side surface 2, of the at least one blocking region BR), each of the plurality of separation regions including a first separation sub-region having a first dopant concentration (10, Fig. 1 and Fig. 6, para [0035] describes wherein a first separation sub-region 10 of the plurality of separation regions SR comprises a first dopant concentration between 1x10-17 cm-3 to 1x1019 cm-3) and a second separation sub-region having a second dopant concentration less than the first dopant concentration of the first separation sub-region (30, Fig. 6, para [0047] describes wherein a second separation sub-region 30 of a further embodiment of the plurality of separation regions of Fig. 1, comprises a second dopant concentration that is less than the dopant concentration of the first separation sub-region 10 resulting in a dopant concentration below 1x10-17 cm-3 to 1x1019 cm-3),
wherein each separation region (SR, annotated Fig. 1) comprises:
a first separation sub-region comprising a first dopant concentration (10, Fig. 6, para [0035] describes wherein a first separation sub-region 10 comprises a first dopant concentration between 1x10-17 cm-3 to 1x1019 cm-3); and
a second separation sub-region comprising a second dopant concentration (30, Fig. 6, para [0047] describes wherein a second separation sub-region 30 comprises a second dopant concentration that is less than the dopant concentration of the first separation sub-region 10 resulting in a dopant concentration below 1x10-17 cm-3 to 1x1019 cm-3),
wherein the first dopant concentration of each first separation sub-region is greater than the second dopant concentration of each second separation sub-region (30, Fig. 6, para [0047] describes wherein the second separation sub-region 30 comprises the second dopant concentration that is less than the first dopant concentration of the first separation sub-region 10),
wherein the second dopant concentration of each second separation sub-region is equal to a dopant concentration of the at least one blocking region (30 and BR, annotated Fig. 1 and Fig. 6, para [0047] describes wherein each of the second separation sub-regions comprises a second dopant concentration that is less than the dopant concentration of the first separation sub-region 10 resulting in a dopant concentration below 1x10-17 cm-3 to 1x1019 cm-3 wherein the blocking region BR of the embodiment of Fig. 6 would further comprise a second separation sub-region resulting in a dopant concentration of the blocking region corresponding to the p-type extension region 30 being equal to each of the dopant concentrations of the second separation sub-regions 30),
wherein a plurality of separation intervals are defined by a first separation interval and remaining separation intervals (d1, d2, and d3, Fig. 1, para [0037] describes distances d1, d2, and d3 between adjacent field rings 10 comprising blocking region BR and separation regions SR),
wherein the first separation interval is between a first separation sub-region of a first separation region closest to the at least one blocking region among the plurality of separation regions (10 and FSR, annotated Fig. 1 II depicts a first sub-separation region 10 of a first separation region FSR closest to the at least one blocking region BR) and the at least one blocking region (d1, annotated Fig. 1 II depicts wherein the first separation interval d1 is between the blocking region BR and the first sub-separation region 10 of a first separation region FSR).
Bauer fails to explicitly disclose wherein the at least one blocking region contacts a side of at least one doped region disposed at an edge of the active area.
However, Hiyoshi teaches a similar power semiconductor device, wherein the at least one blocking region (2, Fig. 10, para [0055] describes an JTE region 2 comprising a blocking region near an edge of a termination region OR and active region IR) contacts a side of at least one doped region disposed at an edge of the active area (13, Fig. 10, para [0047] describes a p-type doped body region 13 which is disposed at an edge of the active region IR and termination region OR and para [0055] describes wherein the blocking region 2 contacts a side of the doped region 13).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the teachings of Bauer with Hiyoshi to further disclose a power semiconductor device wherein a blocking region contacts a doped region disposed at an edge of the active area in order to provide the advantage of providing a boundary between the element region and termination region so that a voltage breakdown region may be provided as close to the active region as possible preventing undesirable effects in the power semiconductor device (Hiyoshi, para [0055]) and to provide the well-known advantage of providing a junction termination extension region which directly contacts active region components improving the electric field blocked in the termination region.
Bauer and Hiyoshi fail to explicitly disclose wherein the first separation interval is 1 micrometer or less.
However, Kinoshita teaches a similar power semiconductor device, wherein the first separation interval is 1 micrometer or less (22a and 31, Fig. 5, para [0051] describes wherein a first separation interval x1 between an outermost body 22a and an inner most guard ring 31 may be between 0.1 μm and 1.0 μm and a separation interval between adjacent guard rings 31 may further be less than 1 μm resulting in a first interval between guard rings being 1 micrometer or less).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the teachings of Bauer and Hiyoshi with Kinoshita to further disclose a power semiconductor device wherein a first separation interval is 1 micrometer or less in order to provide the advantage of providing a first interval large enough for a lower limit of a mask dimension to be used while further enabling a stable breakdown voltage characteristic and suppressing breakdown voltage variation due to charge in an insulating layer (Kinoshita, para [0091]).
Regarding Claim 12, the combination of Bauer, Hiyoshi and Kinoshita discloses the power semiconductor device of claim 11, wherein the first separation interval is smaller than each of the remaining separation intervals (Bauer, para [0037] describes wherein distances d1, d2, and d3 increase with increasing distance from the active region AR resulting in a first separation interval d1 being smaller than each of the remaining separation intervals d2, and d3), and
Wherein each of the remaining separation intervals is configured between a second separation sub-region of one separation region among the plurality of separation regions and a first separation sub-region of an adjacent separation region located farther from the at least one blocking region than the one separation region (Bauer, d2, and d3, annotated Fig. 1 depicts wherein the remaining separation intervals d2, and d3, are between the plurality of first sub-regions 10 of the plurality of separation regions SR wherein upon adding the second separation sub-region 30 as shown in Fig. 6 the remaining d2, and d3 would be between the second separation sub-region 30 of one separation region among the plurality of separation regions and a first separation sub-region 10 of an adjacent separation region located farther from the at least one blocking region than the one separation region).
Regarding Claim 13, the combination of Bauer, Hiyoshi and Kinoshita discloses the power semiconductor device of claim 12, wherein as a distance from the at least one doped region disposed at the edge of the active area (Bauer, 4, Fig. 1, para [0034] describes a doped anode layer 4 that comprises an outermost doped region) increases, the first separation interval and the remaining separation intervals are configured to increase (Bauer, para [0037] describes wherein distances d1, d2, and d3 increase with increasing distance from the active region AR wherein outermost doped region 4 is comprised at the edge of said active layer AR).
Regarding Claim 14, the combination of Bauer, Hiyoshi and Kinoshita discloses the power semiconductor device of claim 11, wherein the first separation sub-region and the second separation sub-region are configured to have different depths (Bauer, 10 and 30, Fig. 6, para [0047] describes wherein second separation sub-region 30 extends from the first main side surface 2 to a depth dER, which is larger than a depth of the first separation sub-region 10 resulting in different depths of the first separation sub-region 10 and the second separation sub-region 30).
Regarding Claim 15, the combination of Bauer, Hiyoshi and Kinoshita discloses the power semiconductor device of claim 14, wherein an upper side of the first separation sub-region and an upper side of the second separation sub-region are configured to be located on a single horizontal line (Bauer, 2, Fig. 1 and Fig. 6, para [0047] describes wherein the second separation sub-region extends from a first main side surface 2 representing a single horizontal line and first separating sub-region 10 can be seen extending from the same horizontal line in Fig. 6), and
wherein a lower side of the second separation sub-region is configured to be located lower than a lower side of the first separation sub-region (Bauer, dER, Fig. 6, para [0047] describes a depth dER representing a distance from the horizontal line 2 to a lower side of the second separation sub-region 30 which is larger than that of the first separation sub-region 10, represented by dFFR in Fig. 2, resulting in a lower side of the second separation sub-region being configured to be located lower than a lower side of the first separation sub-region 10).
Regarding Claim 16, the combination of Bauer, Hiyoshi and Kinoshita discloses the power semiconductor device of claim 15, wherein each of the plurality of separation regions comprises an overlapping region comprising a part of the first separation sub-region and a part of the second separation sub-region (Bauer, OR, annotated Fig. 6, depicts an overlapping region OR wherein a horizontal portion of the first separation sub-region 10 overlaps with a horizontal portion of the second separation sub-region 30 wherein a portion of the first separation sub-region 10 and a portion of the second separation sub-region 30 are located in the overlapping region OR).
Regarding Claim 17, the combination of Bauer, Hiyoshi and Kinoshita discloses the power semiconductor device of claim 16, wherein the lower side of the second separation sub-region is configured to be located below the overlapping region (Bauer, OR, annotated Fig. 6 depicts wherein the lower side of the second separation sub-region 30 at d depth dER is located below a lowest surface of the overlapping region OR).
Regarding Claim 18, the combination of Bauer, Hiyoshi and Kinoshita discloses all the limitations of claim 11.
The combination of Bauer and Hiyoshi fail to explicitly disclose the power semiconductor device of claim 11, wherein a first dopant concentration of the first separation sub-region or the second dopant concentration of the second separation sub-region is configured to be equal to a dopant concentration of at least one of the doped regions.
However, Bauer discloses wherein the dopant concentration of at least one of the doped regions may be 5x1016 cm-3 or more (Bauer, para [0034]) and the dopant concentration of the first separation sub-region may be in a range between 1x1017 cm-3 and 1x1019 cm-3 (Bauer, para [0035]) and the dopant concentration of the second separation sub-region has a dopant concentration lower than that of the first separation sub-region (Bauer, para [0047]).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to try different doping concentrations for the doped regions, first separation sub-region and second separation sub-region, and specifically to try a dopant concentration for the second separation sub-region which is lower than the first separation sub-region and equal to or above the dopant concentration of the doped regions, as discloses by Bauer, to result in a second separation sub-region and a doped region having a same doping concentration in order to provide the well-known advantage of providing a single doping concentration profile for both the second separation sub-region and the doped regions to enable both regions to be doped in a single doping step, simplifying the device manufacturing process and reducing device manufacturing costs.
Regarding Claim 19, the combination of Bauer, Hiyoshi and Kinoshita discloses the power semiconductor device of claim 11, wherein the at least one blocking region and the plurality of separation regions are configured to have a ring shape (10, annotated Fig. 1, para [0035] describes wherein the floating field rings 10, comprising the at least one blocking region BR and the plurality of separation regions SR, are ring-shaped).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Yuan Bu (US 2018/0151514 A1; hereinafter “Bu”) in view of Friedhelm Bauer et al (US 2019/0035884 A1; hereinafter “Bauer”) and in further view of Akimasa Kinoshita (US 2022/0344475 A1; hereinafter “Kinoshita”).
Regarding Claim 20, Bu teaches a power converter (CON, Fig. 2, para [0033] and para [0034] describe a power converter CON), comprising:
a plurality of power semiconductor modules (PSM, annotated Fig. 2 depicts wherein the power converter CON comprises a plurality of power semiconductor modules PSM),
wherein each of the plurality of power semiconductor modules comprises a plurality of power semiconductor devices (PSD, annotated Fig. 2 depicts wherein each of the power semiconductor modules comprises power semiconductor devices PSD),
wherein each of the plurality of power semiconductor devices (PSD, annotated Fig. 1) comprises:
a substrate (1S, Fig. 16, para [0047] describes wherein an SiC-pn junction diode, such as those found in the semiconductor devices PSD, comprises a substrate 1S);
a drift layer formed in the substrate (EPI, Fig. 18, para [0043] describes a drift layer EPI formed in the substrate 1S) including an active area having doped regions (RR and EIR, Fig. 16 and Fig. 18, para [0053] describes p-type doped regions RR and EIR formed in an active area under a cathode electrode CE) and a termination area configured to surround the active area (LR and ERR, Fig. 17 and Fig. 18, para [0046] describes a leakage reduction region LR and electric field relaxation region ERR forming a termination region surrounding an active area doped region RR); and
a junction termination extension (JTE) in the termination area (LR and ERR, Fig. 18, para [0046] describes a leakage reduction region LR and electric field relaxation region ERR which form a junction termination extension in the termination area),
wherein the substrate and the drift layer comprise a first conductivity type (1S and EPI, Fig. 16 and Fig. 18, para [0047] describes wherein the substrate 1S and drift layer EPI are doped with n-type impurities),
wherein the doped regions (RR and EIR, Fig. 16 and Fig. 18, para [0053] describes wherein the doped regions RR and EIR are doped with p-type impurities) and the JTE comprise a second conductivity type (LR and ERR, Fig. 18, para [0105] describes wherein the JTE comprises a leakage reduction region LR doped with p-type impurities and para [0076] describes wherein the JTE further comprises an electric relaxation region ERR doped with p-type impurities),
wherein the JTE comprises at least one blocking region (LR, Fig. 18, para [0105] describes wherein the JTE comprises a leakage reduction region LR functioning as a blocking region) and a plurality of separation regions located farther from at least one doped region disposed at the edge of the active area than the at least one blocking region (ERR, Fig. 18, para [0076] describes wherein the JTE further comprises an electric relaxation region ERR comprising a plurality of separation region rings as shown in Fig. 17 wherein said rings are further from a doped region RR disposed at the edge of the active area than the at least one blocking region LR).
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Bu fails to explicitly disclose wherein each of the plurality of separation regions comprises two or more separation sub-regions, wherein the two or more separation sub-regions are configured to have different doping concentrations wherein each separation region comprises: a first separation sub-region comprising a first dopant concentration; and a second separation sub-region comprising a second dopant concentration, wherein the first dopant concentration of each first separation sub-region is greater than the second dopant concentration of each second separation sub-region, wherein the second dopant concentration of each second separation sub-region is equal to a dopant concentration of the at least one blocking region, wherein a plurality of separation intervals are defined by a first separation interval and remaining separation intervals, wherein the first separation interval is between a first separation sub-region of a first separation region closest to the at least one blocking region among the plurality of separation regions and the at least one blocking region.
However, Bauer discloses a power semiconductor device, wherein each of the plurality of separation regions comprises two or more separation sub-regions (10 and 30, Fig. 6, para [0047] describes an embodiment in Fig. 6 that is a continuation of the first embodiment of Fig. 1, wherein a separation regions SR as shown in annotated Fig. 1 comprise a first separation sub-region 10 and a second separation sub-region 30), and
wherein the two or more separation sub-regions are configured to have different doping concentrations (10 and 30, Fig. 6, para [0047] describes wherein second separation sub-region 30 has a doping concentration lower than that of the first separation sub-region 10),
wherein each separation region (SR, annotated Fig. 1) comprises:
a first separation sub-region comprising a first dopant concentration (10, Fig. 6, para [0035] describes wherein a first separation sub-region 10 comprises a first dopant concentration between 1x10-17 cm-3 to 1x1019 cm-3); and
a second separation sub-region comprising a second dopant concentration (30, Fig. 6, para [0047] describes wherein a second separation sub-region 30 comprises a second dopant concentration that is less than the dopant concentration of the first separation sub-region 10 resulting in a dopant concentration below 1x10-17 cm-3 to 1x1019 cm-3),
wherein the first dopant concentration of each first separation sub-region is greater than the second dopant concentration of each second separation sub-region (30, Fig. 6, para [0047] describes wherein the second separation sub-region 30 comprises the second dopant concentration that is less than the first dopant concentration of the first separation sub-region 10),
wherein the second dopant concentration of each second separation sub-region is equal to a dopant concentration of the at least one blocking region (30 and BR, annotated Fig. 1 and Fig. 6, para [0047] describes wherein each of the second separation sub-regions comprises a second dopant concentration that is less than the dopant concentration of the first separation sub-region 10 resulting in a dopant concentration below 1x10-17 cm-3 to 1x1019 cm-3 wherein the blocking region BR of the embodiment of Fig. 6 would further comprise a second separation sub-region resulting in a dopant concentration of the blocking region corresponding to the p-type extension region 30 being equal to each of the dopant concentrations of the second separation sub-regions 30),
wherein a plurality of separation intervals are defined by a first separation interval and remaining separation intervals (d1, d2, and d3, Fig. 1, para [0037] describes distances d1, d2, and d3 between adjacent field rings 10 comprising blocking region BR and separation regions SR),
wherein the first separation interval is between a first separation sub-region of a first separation region closest to the at least one blocking region among the plurality of separation regions (10 and FSR, annotated Fig. 1 II depicts a first sub-separation region 10 of a first separation region FSR closest to the at least one blocking region BR) and the at least one blocking region (d1, annotated Fig. 1 II depicts wherein the first separation interval d1 is between the blocking region BR and the first sub-separation region 10 of a first separation region FSR).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the teachings of Bu with Bauer to further disclose a power semiconductor device wherein a separation region comprises two or more separation regions configured to have different doping concentrations in order to provide the advantage of providing an extension region in addition to the first separation sub-region which may reduce the maximum electric field peak (Bauer, para [0047]) and to further disclose a separation interval between the between a first separation sub-region closest to a blocking region and the blocking region in order to provide the advantage of allowing a more area efficient floating field ring termination structure (Bauer, para [0021]).
Bu and Bauer fail to explicitly disclose wherein the first separation interval is 1 micrometer or less.
However, Kinoshita teaches a similar power semiconductor device, wherein the first separation interval is 1 micrometer or less (22a and 31, Fig. 5, para [0051] describes wherein a first separation interval x1 between an outermost body 22a and an inner most guard ring 31 may be between 0.1 μm and 1.0 μm and a separation interval between adjacent guard rings 31 may further be less than 1 μm resulting in a first interval between guard rings being 1 micrometer or less).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the teachings of Bauer and Hiyoshi with Kinoshita to further disclose a power semiconductor device wherein a first separation interval is 1 micrometer or less in order to provide the advantage of providing a first interval large enough for a lower limit of a mask dimension to be used while further enabling a stable breakdown voltage characteristic and suppressing breakdown voltage variation due to charge in an insulating layer (Kinoshita, para [0091]).
Response to Arguments
Applicant's arguments filed 15 July 2026 have been fully considered but they are not persuasive.
The Applicant argues on page 11, lines 5-17 of the Applicant’s remarks that the prior art of record, Bauer, does not disclose the newly claimed relationship requiring the second separation sub-region to have the same dopant concentration as the blocking region. The Examiner respectfully disagrees. The blocking region of Bauer has a same composition as the separation sub-regions of the separation region. Therefore, as disclosed in the 35 U.S.C. 103 rejection above, Bauer discloses wherein the second dopant concentration of each second separation sub-region is equal to a dopant concentration of the at least one blocking region (30 and BR, annotated Fig. 1 and Fig. 6, para [0047] describes wherein each of the second separation sub-regions comprises a second dopant concentration that is less than the dopant concentration of the first separation sub-region 10 resulting in a dopant concentration below 1x10-17 cm-3 to 1x1019 cm-3 wherein the blocking region BR of the embodiment of Fig. 6 would further comprise a second separation sub-region resulting in a dopant concentration of the blocking region corresponding to the p-type extension region 30 being equal to each of the dopant concentrations of the second separation sub-regions 30).
The Applicant further argues on page 11, lines 25-29 and page 12, lines 1-8 of the Applicant’s remarks that the prior art of record, Bauer, does not disclose the claimed blocking region. The Examiner respectfully disagrees. Currently, the limitations of at least claim 1, 11 and 20 do not require the blocking region to differ from the separation regions. Furthermore, the separation regions of Bauer block leakage current in such a way as to be considered a blocking region. Additionally, claims 1, 11 and 20 as they are currently amended, require the blocking regions and the plurality of separation regions to be similar in at least their doping concentration, therefore in response to applicant's argument that the examiner's conclusion of obviousness is based upon improper hindsight reasoning, it must be recognized that any judgment on obviousness is in a sense necessarily a reconstruction based upon hindsight reasoning. But so long as it takes into account only knowledge which was within the level of ordinary skill at the time the claimed invention was made, and does not include knowledge gleaned only from the applicant's disclosure, such a reconstruction is proper. See In re McLaughlin, 443 F.2d 1392, 170 USPQ 209 (CCPA 1971).
The Applicant further argues on page 12, lines 9-24 of the Applicant’s remarks that the prior art of record, Bauer, employ a fundamentally different junction termination structure. The Examiner respectfully disagrees. The Applicant relies upon the argument that Bauer does not disclose the newly claimed relationship requiring the second separation sub-region to have the same dopant concentration as the blocking region to argue that Bauer employs a fundamentally different junction termination structure. As indicated above, the blocking region of Bauer has a same composition as the separation sub-regions of the separation region. Therefore, as disclosed in the 35 U.S.C. 103 rejection above, Bauer discloses wherein the second dopant concentration of each second separation sub-region is equal to a dopant concentration of the at least one blocking region (30 and BR, annotated Fig. 1 and Fig. 6, para [0047] describes wherein each of the second separation sub-regions comprises a second dopant concentration that is less than the dopant concentration of the first separation sub-region 10 resulting in a dopant concentration below 1x10-17 cm-3 to 1x1019 cm-3 wherein the blocking region BR of the embodiment of Fig. 6 would further comprise a second separation sub-region resulting in a dopant concentration of the blocking region corresponding to the p-type extension region 30 being equal to each of the dopant concentrations of the second separation sub-regions 30). Furthermore, Applicant argues that Bauer does not disclose a first separation interval of 1 micrometer or less. This argument is moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument, as indicated below.
Applicant’s arguments with respect to claims 1 and 3-20 with further respect to argument that the first separation interval is 1 micrometer or less has been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/ALEXANDER MICHAEL MILLER/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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