Prosecution Insights
Last updated: April 19, 2026
Application No. 18/369,474

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Non-Final OA §103
Filed
Sep 18, 2023
Examiner
ONUTA, TIBERIU DAN
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
3y 2m
To Grant
96%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allow Rate
44 granted / 60 resolved
+5.3% vs TC avg
Strong +23% interview lift
Without
With
+22.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
51 currently pending
Career history
111
Total Applications
across all art units

Statute-Specific Performance

§103
65.6%
+25.6% vs TC avg
§102
22.2%
-17.8% vs TC avg
§112
11.0%
-29.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 60 resolved cases

Office Action

§103
DETAILED ACTION This Office action responds to Applicant’s election filed on 12/11/2025. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Amendment Status The Applicant’s response on 12/11/2025 in reply to the restriction mailed on 11/14/2025 has been entered. The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-25. Election/Restriction The Applicant’s response on 12/11/2025 in reply to the restriction/election requirements mailed on 11/14/2025 has been entered. Applicant’s election of Group I (claims 1-20, drawn to a semiconductor package), is acknowledged. Election was made without traverse in the reply filed on 11/14/2025. Applicant’s election with traverse of Species 1 corresponding to figs. 1, 2(left), 2(right), and 7A-7I, drawn to claims 1-12 and 18-20, is acknowledged. Examiner agrees. Claims 13-17 are withdrawn by corresponding to non-elected species. Claims 13-17 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 10/17/2025. The traversals of the Species restriction respectively are on the grounds that “Claim 1 is a generic claim that reads on all of the species identifying by the Examiner” (see, e.g., Response to Restriction, Paragraph 1). This is not found persuasive. See. MPEP 808.01(a), where it specified that in applications where only generic claims are presented, restriction cannot be required unless the generic claims recite or encompass such a multiplicity of species that an unduly extensive and burdensome search would be necessary to search the entire scope of the claim. See MPEP § 803.02 and § 809.02(a). However, if applicant presents species claims to more than one patentably distinct species of the invention after an Office action on only generic claims, with no restriction requirement, the Office may require the applicant to elect a single species for examination. Because of the above, and because the applicant failed to distinctly and specifically point out that the species are not patentably distinct (emphasis added), and did not present evidence or identify evidence on record showing the species to be obvious variations of one another, the requirement is still deemed proper and is, therefore, made FINAL. Information Disclosure Statement (IDS) Acknowledgement is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. The IDS has been considered. Specification Objection The specification has been checked to the extend necessary to determine the presence of possible minor errors. However, the Applicant’s cooperation is requested in correcting any errors of which Applicant may become aware in the specification. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-3, and 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Jang (US 2021/0020505) in view of Chen (US 2020/0118960). Regarding claim 1, Jang shows (see, e.g., Jang: fig. 1) most aspects of the instant invention including a semiconductor package 10, comprising: A first redistribution structure 100 A first semiconductor chip 101 on the first redistribution structure 100 A first molding layer 103 on the first redistribution structure 100, the first molding layer 103 being disposed on the first semiconductor chip 101 Connection structures 102 on the first redistribution structure 101, the connection structures 102 extending in a vertical direction and passing through the first molding layer 103 A first insulating layer 104 on the first molding layer 103 A second redistribution structure 105 However, Jang fails (see, e.g., Jang: fig. 1) to show that the molding layer 103 comprises at least one lower recess at the top surface. Chen, in a similar device to Jang, shows (see, e.g., Chen: fig. 3) that the molding layer 108’ comprises at least one lower recess Rc1/Rc2 at the top surface (see, e.g., Chen: par. [0013]). Chen also shows (see, e.g., Chen: fig. 3) that, after grinding and polishing, at least one recess Rc1/Rc2 is formed on the upper surface 108-1 of the insulating encapsulant 108′ and recesses are randomly formed on the upper surface 108-1 of the insulating encapsulant 108′, and the recesses are to improve the adherence of the insulating layer 114 formed on the top of the insulating encapsulant 108’ by filling the recesses with the insulating material 114 (see, e.g., Chen: par. [0013] and [0016]). It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the recesses of Chen in the device of Jang, in order to improve the adherence of the insulating layer formed on the top of the insulating encapsulant by filling the recesses with the insulating layer material. Jang in view of Chen shows (see, e.g., Chen: fig. 8) that the second redistribution structure 130 comprises a lower redistribution insulating layer 130B on the first insulating layer 114. Also, Jang in view of Chen shows (see, e.g., Chen: fig. 4) that the first insulating layer 114 at least partially fills the at least one lower recess Rc1/Rc2 of the first molding layer 108’. Regarding claim 2, Jang in view of Chen shows (see, e.g., Chen: fig. 8) that a vertical thickness of the first insulting layer 114’ is smaller than a vertical thickness of the lower redistribution insulating layer 130B. However, the differences in the thicknesses will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). Accordingly, since the applicant has not established the criticality (see next paragraph below) of the mentioned thicknesses, and Chen has identified such thickness of the leads as result-effective variables subject to optimization (see, e.g., Chen: par. [0015]), it would have been obvious to one of ordinary skill in the art to use these thickness values in the device of Jang in view of Chen. CRITICALITY The specification contains no disclosure of either the critical nature of the claimed thickness values or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Regarding claim 3, Jang in view of Chen shows (see, e.g., Jang: fig. 1) that the first insulating layer 104 comprises a non-photo-imageable dielectric (see, e.g., Jang: par. [0052]). Also, Jang in view of Chen shows (see, e.g., Chen: fig. 8) that the lower redistribution insulating layer 130B comprises a photo-imageable dielectric (see, e.g., Chen: par. [0019], where the elements of phenol resin, benzocyclobutene (BCB), and polybenzooxazole (PBO) are photo-imageable dielectrics). Regarding claim 5, Jang in view of Chen shows (see, e.g., Chen: fig. 8) that a glass transition temperature of the first insulating layer 114’ is higher than a glass transition temperature of the lower redistribution insulating layer 130B (see, e.g., Chen: par. [0014] and [0019]) (for example, the first insulating layer 114’ is made of polybenzooxazole (PBO), and lower redistribution insulating layer 130B is made of benzocyclobutene (BCB)). However, the differences in the glass transition temperature will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). Accordingly, since the applicant has not established the criticality (see paragraph 22) of the mentioned glass transition temperature, and Chen has identified such glass transition temperature as a result-effective variable subject to optimization (see, e.g., Chen: par. [0014] and [0019]), it would have been obvious to one of ordinary skill in the art to use these glass transition temperature values in the device of Jang in view of Chen. Regarding claim 6, Jang in view of Chen shows (see, e.g., Chen: fig. 8) that a 5 % weight loss temperature of the first insulating layer 114’ is higher than a 5 % weight loss temperature of the lower redistribution insulating layer 130B (see, e.g., Chen: par. [0014] and [0019]) (for example, the first insulating layer 114’ is made of polybenzooxazole (PBO), and lower redistribution insulating layer 130B is made of benzocyclobutene (BCB)). However, the differences in the 5% weight loss temperature will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). Accordingly, since the applicant has not established the criticality (see paragraph 22) of the mentioned 5% weight loss temperature, and Chen has identified such 5% weight loss temperature as a result-effective variable subject to optimization (see, e.g., Chen: par. [0014] and [0019]), it would have been obvious to one of ordinary skill in the art to use these 5% weight loss temperature values in the device of Jang in view of Chen. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Jang in view of Chen in further view of Wakizaka (JP 3952560 B2). Regarding claim 4, Jang in view of Chen shows (see, e.g., Jang: fig. 1) most aspects of the instant invention including the first insulating layer 104 on the first molding layer 103. However, Jang in view of Chen fails (see, e.g., Jang: fig. 1) to show that a viscosity of the first insulating layer is in a range from about 1000 cP to about 2000 cP. Wakizaka, in a similar insulating layer used for a semiconductor device to Jang in view of Chen, shows an insulating layer that has a viscosity of 20 P (or 20 Poise) (that is 2000 cP or centiPoise) or less (see, e.g., Wakizaka: par. [0059]). Wakizaka also shows that the film with this viscosity has handling and process advantages such as that this film can be stretched after molding (see, e.g., Wakizaka: par. [0059] – [0060]). It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the viscosity of the insulating film of Wakizaka in the device of Jang in view of Chen, in order to bring handling and process advantages such as an insulating layer that can be stretched after molding. However, the differences in the viscosity will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). Accordingly, since the applicant has not established the criticality (see paragraph 22) of the mentioned viscosity, and Wakizaka has identified such viscosity as a result-effective variable subject to optimization (see, e.g., Wakizaka: par. par. [0059] – [0060]), it would have been obvious to one of ordinary skill in the art to use these thickness values in the device of Jang in view of Chen. Claims 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Jang in view of Chen in further view of Lu (US 2019/0363064). Regarding claim 7, Jang in view of Chen shows (see, e.g., Chen: figs. 3-4) most aspects of the instant invention including the at least one lower recess Rc1/Rc2 that is formed on the upper surface 108-1 of the insulating encapsulant 108′. Jang in view of Chen shows (see, e.g., Chen: figs. 3-4) that the one lower recess Rc1/Rc2 comprises a second lower recess Rc1/Rc2, and the second lower recess Rc1/Rc2 is at the top of the first molding layer 108’. However, Jang in view of Chen fails (see, e.g., Chen: figs. 3-4) to show that the at least one lower recess comprises a first lower recess that is at an interface between the first molding layer and each of the connection structures. Lu, in a similar device to Jang in view of Chen, shows (see, e.g., Lu: fig. 1) a first lower recess that is at an interface between the first molding layer 12c (that covers the semiconductor device 11) and each of the connection structures 13 (see, e.g., Lu: par. [0023]). Lu also shows (see, e.g., Lu: fig. 1) that a first lower recess that is at an interface between the first molding layer 12c and each of the connection structures 13 is to expose the conductive pillar 13 for providing electrical connections (see, e.g., Lu: par. [0028]). It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the recesses of Lu in the device of Jang, in order to expose the connection structures for providing electrical connections. Jang in view of Chen in view of Lu shows (see, e.g., Lu: fig. 1) that a first lower recess that is at an interface between the first molding layer 12c and each of the connection structures 13. Regarding claim 8, Jang in view of Chen in view of Lu shows (see, e.g., Lu: fig. 1) that the first insulating layer 12b comprises at least one upper recess, and the lower redistribution insulating layer 12a. Regarding claim 9, Jang in view of Chen in view of Lu shows (see, e.g., Lu: fig. 1) that the at least one upper recess overlaps with the at least one lower recess in the vertical direction. Regarding claim 10, Jang in view of Chen in view of Lu shows (see, e.g., Lu: fig. 1) a length in a horizontal direction of the at least one upper recess, a length in the horizontal direction of the at least one lower recess, a length in the vertical direction of the at least one upper recess, and a length in the vertical direction of the at least one lower recess that overlaps with the at least one upper recess in the vertical direction. Jang in view of Chen in view of Lu shows (see, e.g., Lu: fig. 1) that a length in a horizontal direction of the at least one upper recess is equal to a length in the horizontal direction of the at least one lower recess, and a length in the vertical direction of the at least one upper recess is equal to a length in the vertical direction of the at least one lower recess that overlaps with the at least one upper recess in the vertical direction Jang in view of Chen in view of Lu shows (see, e.g., Lu: fig. 1) fails to show that a length in a horizontal direction of the at least one upper recess is smaller than a length in the horizontal direction of the at least one lower recess that overlaps with the at least one upper recess in the vertical direction, and wherein a length in the vertical direction of the at least one upper recess is smaller than a length in the vertical direction of the at least one lower recess that overlaps with the at least one upper recess in the vertical direction However, the differences in the lengths in a horizontal direction and in a vertical direction of the at least one upper recess and of one lower recess will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). Accordingly, since the applicant has not established the criticality (see paragraph 22) of the mentioned lengths, and Chen and Lu has identified such viscosity as a result-effective variable subject to optimization (see, e.g., Chen: par. [0013] and [0016], and see, e.g., Lu: par. [0028]), it would have been obvious to one of ordinary skill in the art to use these thickness values in the device of Jang in view of Chen in view of Lu. Claims 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Jang in view of Chen in further view of Yu (US 2019/0115311). Regarding claim 11, Jang in view of Chen shows (see, e.g., Jang: fig. 1) most aspects of the instant invention including the first insulating layer 104 on the first molding layer 103, and a second redistribution structure 105. However, Jang in view of Chen fails (see, e.g., Jang: fig. 1, and see, e.g., Chen: fig. 8) to show that the second redistribution structure 105 further comprises a lower redistribution via passing through the first insulating layer 103 and the lower redistribution insulating layer (the lower redistribution insulating layer is part of element 105). Yu, in a similar device to Jang in view of Chen, shows (see, e.g., Yu: fig. 2I) that the second redistribution structure 12/78/71 comprises a lower redistribution via 76/49 passing through the first insulating layer 12 and the lower redistribution insulating layer 78 (see, e.g., Yu: par. [0051]). Yu also shows that the lower redistribution via 76/49 passing through the first insulating layer 12 and the lower redistribution insulating layer 78 is to expose a portion of the TIV 24 for electrically coupling the package structure (see, e.g., Yu: par. [0051]). It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the lower redistribution via of Yu passing through the first insulating layer and the lower redistribution insulating layer in the device of Jang in view of Chen, in order to expose a portion of the TIV for electrically coupling the package structure. Regarding claim 12, Jang in view of Chen in view of Yu shows (see, e.g., Yu: fig. 2I) that a horizontal width of the lower redistribution via 76/49 decreases toward the connection structures 24. Claims 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Jang (US 2021/0020505) in view of Chen (US 2020/0118960 in view of Lu (US 2019/0363064) in further view of Yu (US 2019/0115311). Regarding claim 18, Jang shows (see, e.g., Jang: fig. 1) most aspects of the instant invention including a semiconductor package 10, comprising: A first redistribution structure 100 A first semiconductor chip 101 on the first redistribution structure 100 A first molding layer 103 on the first redistribution structure 100, the first molding layer 103 being disposed on the first semiconductor chip 101 Connection structures 102 on the first redistribution structure 101, the connection structures 102 extending in a vertical direction and passing through the first molding layer 103 A first insulating layer 104 on the first molding layer 103 A second redistribution structure 105 However, Jang fails (see, e.g., Jang: fig. 1) to show that the molding layer 103 comprises a second lower recess at the top surface. Chen, in a similar device to Jang, shows (see, e.g., Chen: fig. 3) that the molding layer 108’ comprises a second lower recess Rc1/Rc2 at the top surface (see, e.g., Chen: par. [0013]). Chen also shows (see, e.g., Chen: fig. 3) that, after grinding and polishing, at least one lower recess Rc1/Rc2 is formed on the upper surface 108-1 of the insulating encapsulant 108′ and recesses are randomly formed on the upper surface 108-1 of the insulating encapsulant 108′, and the recesses are to improve the adherence of the insulating layer 114 formed on the top of the insulating encapsulant 108’ by filling the recesses with the insulating material 114 (see, e.g., Chen: par. [0013] and [0016]). It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the lower recesses of Chen in the device of Jang, in order to improve the adherence of the insulating layer formed on the top of the insulating encapsulant by filling the recesses with the insulating layer material. Jang in view of Chen shows (see, e.g., Chen: fig. 8) that the second redistribution structure 130 comprises a lower redistribution insulating layer 130B on the first insulating layer 114. Also, Jang in view of Chen shows (see, e.g., Chen: fig. 4) that the first insulating layer 114 at least partially fills the at least second lower recess Rc1/Rc2 of the first molding layer 108’. Jang in view of Chen shows (see, e.g., Jang: fig. 1) that the first insulating layer 104 comprises a non-photo-imageable dielectric (see, e.g., Jang: par. [0052]). Also, Jang in view of Chen shows (see, e.g., Chen: fig. 8) that the lower redistribution insulating layer 130B comprises a photo-imageable dielectric (see, e.g., Chen: par. [0019], where the elements of phenol resin, benzocyclobutene (BCB), and polybenzooxazole (PBO) are photo-imageable dielectrics). However, Jang in view of Chen fails (see, e.g., Chen: figs. 3-4) to show that a first lower in the top surface. Lu, in a similar device to Jang in view of Chen, shows (see, e.g., Lu: fig. 1) a first lower recess that is at an interface between the first molding layer 12c (that covers the semiconductor device 11) and each of the connection structures 13 (see, e.g., Lu: par. [0023]). Lu also shows (see, e.g., Lu: fig. 1) that a first lower recess that is at an interface between the first molding layer 12c and each of the connection structures 13 is to expose the conductive pillar 13 for providing electrical connections (see, e.g., Lu: par. [0028]). It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the recesses of Lu in the device of Jang, in order to expose the connection structures for providing electrical connections. Also, Jang in view of Chen in view of Lu shows (see, e.g., Lu: fig. 1) that the first insulating layer 12b at least partially fills the first lower recess of the first molding layer 12a. However, Jang in view of Chen in view of Lu fails (see, e.g., Jang: fig. 1, and see, e.g., Chen: fig. 8) to show that the second redistribution structure 105 further comprises a lower redistribution via passing through the first insulating layer 103 and the lower redistribution insulating layer (the lower redistribution insulating layer is part of element 105). Yu, in a similar device to Jang in view of Chen in view of Lu, shows (see, e.g., Yu: fig. 2I) that the second redistribution structure 12/78/71 comprises a lower redistribution via 76/49 passing through the first insulating layer 12 and the lower redistribution insulating layer 78 (see, e.g., Yu: par. [0051]). Yu also shows that the lower redistribution via 76/49 passing through the first insulating layer 12 and the lower redistribution insulating layer 78 is to expose a portion of the TIV 24 for electrically coupling the package structure (see, e.g., Yu: par. [0051]). It would have been obvious at the time of filing the invention to one of ordinary skill in the art to include the lower redistribution via of Yu passing through the first insulating layer and the lower redistribution insulating layer in the device of Jang in view of Chen in view of Lu, in order to expose a portion of the TIV for electrically coupling the package structure. Regarding claim 19, Jang in view of Chen in view of Lu in view of Yu shows (see, e.g., Chen: fig. 8) that a vertical thickness of the first insulting layer 114’ is smaller than a vertical thickness of the lower redistribution insulating layer 130B. However, the differences in the thicknesses will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). Accordingly, since the applicant has not established the criticality (see next paragraph below) of the mentioned thicknesses, and Chen has identified such thickness of the leads as result-effective variables subject to optimization (see, e.g., Chen: par. [0015]), it would have been obvious to one of ordinary skill in the art to use these thickness values in the device of Jang in view of Chen in view of Lu in view of Yu. Regarding claim 20, Jang in view of Chen in view of Lu in view of Yu shows (see, e.g., Jang: fig. 1) that the connection structures comprise a conductive pillar comprising copper (see, e.g., Jang: par. [0046]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIBERIU DAN ONUTA whose telephone number is (571) 270-0074 and between the hours of 9:00 AM to 5:00 PM (Eastern Standard Time) Monday through Friday or by e-mail via Tiberiu.Onuta@uspto.gov. If attempts to reach the examiner by telephone or email are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (in USA or Canada) or 571-272-1000. /TIBERIU DAN ONUTA/Examiner, Art Unit 2814 /WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
Read full office action

Prosecution Timeline

Sep 18, 2023
Application Filed
Jan 12, 2026
Non-Final Rejection — §103
Feb 10, 2026
Interview Requested
Feb 17, 2026
Applicant Interview (Telephonic)
Feb 17, 2026
Examiner Interview Summary

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Prosecution Projections

1-2
Expected OA Rounds
73%
Grant Probability
96%
With Interview (+22.9%)
3y 2m
Median Time to Grant
Low
PTA Risk
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