saaryNotice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Currently, claims 1-20 are pending and examined below.
Information Disclosure Statement (IDS)
The information disclosure statement submitted on 04/05/2024 ("04-05-24 IDS") is in compliance with the provisions of 37 CFR 1.97. Accordingly, the 04-05-24 IDS is being considered by the examiner.
Claim Rejections - 35 USC § 1021
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3 and 20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Pub. No. US 2023/0411243 A1 to Kabir et al. ("Kabir").
[AltContent: textbox (AR2)]Fig. 4A of Kabir has been annotated to support the rejection below:
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[AltContent: arrow][AltContent: textbox (AR3)][AltContent: textbox (S2)][AltContent: textbox (S1)][AltContent: textbox (AR1)][AltContent: arrow]
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Regarding independent claim 1, Kabir teaches a transistor comprising:
a first source region 440 and/or 441 (para [0064] - “source contacts 440”; para [0065] - “ancillary source contact 441”);
a first drain region 438-1 (para [0060] - “elongated primary drain contacts 43801 (or drain fingers)…”) disposed on a first side S1 of the first source region 440 and/or 441, a first active region AR1 (underneath primary gate structures 436-1 of each primary transistor element 443; para [0066] - “primary gate structures 436-1”) being formed between the first source region 440 and/or 441 and the first drain region 438-1;
a second drain region 438-1 disposed on a second side S2 of the first source region 440 and/or 441, a second active region AR2 (underneath ancillary gate structure 436-2 of an ancillary transistor element 439. para [0066] - “ancillary gate structures 436-2”) being formed between the first source region 440 and/or 441 and the second drain region 438-1, directions of greatest extension of the first and second active regions AR1, AR2 being non-parallel (see Fig. 4A);
a first gate electrode finger 436-1 disposed over the first active region AR1; and
a second gate electrode finger 436-2 disposed over the second active region AR2.
Regarding claim 2, Kabir teaches the directions of the greatest extension of the first and second active regions AR1, AR2 and of the first and second gate electrode fingers 436-1, 436-2 are orthogonal.
Regarding claim 3, Kabir teaches the first gate electrode finger 436-1 that is continuous with the second gate electrode finger 436-2.
Regarding claim 20, Kabir teaches the first drain region 438-1 (near S1) that includes a portion displaced from the second gate electrode finger 436-2 in a lengthwise direction and the second drain region 438-1 (near S2) that includes a portion displaced from the first gate electrode finger 436-1 in a widthwise direction.
Allowable Subject Matter
The following is a statement of reasons for the indication of allowable subject matter:
Claim 4 is objected to for depending on a rejected base claim 1, but would be allowable if it is rewritten in independent form to include all of the limitations of the base claim 1 or the base claim 1 is amended to include all of the limitations of claim 4.
Claims 5-19 are allowable for depending on the allowable claim 4.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Patent No. US 12,068,216 B1 to Reza
Patent No. US 7,900,176 B2 to Kim et al.
Pub. No. US 2017/0250200 A1 to Lee et al.
Pub. No. US 2015/0129965 A1 to Roy et al.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL JUNG whose telephone number is (408) 918-7554. The examiner can normally be reached on 8:30 A.M. to 7 P.M.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached on (571) 272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MICHAEL JUNG/Primary Examiner, Art Unit 2817 17 November 2025
1 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status