Prosecution Insights
Last updated: April 19, 2026
Application No. 18/371,150

ELECTRONIC COMPONENT

Final Rejection §102
Filed
Sep 21, 2023
Examiner
LEE, CHEUNG
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Koa Corporation
OA Round
2 (Final)
92%
Grant Probability
Favorable
3-4
OA Rounds
2y 0m
To Grant
96%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allow Rate
1045 granted / 1135 resolved
+24.1% vs TC avg
Minimal +4% lift
Without
With
+4.2%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
19 currently pending
Career history
1154
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
39.7%
-0.3% vs TC avg
§102
31.5%
-8.5% vs TC avg
§112
13.0%
-27.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1135 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment In view of applicant’s amendments and arguments filed on March 3, 2026, the objection of the title, and the rejections of claims 2 and 4 under 35 U.S.C. 112(b) or 102 as stated in the Office Action mailed on December 23, 2025 have been withdrawn. The previous rejection of claim 1 rejected under 35 U.S.C. 102(a)(1) is maintained. See below for Response to Arguments. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 and 5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kashiwazaki (US Pub. 2015/0380342). Regarding Claim 1, Kashiwazaki discloses an electronic component comprising: a chip (CH) (page 2, paragraph 36); a die pad (DP) (page 2, paragraph 36) to which the chip (CH) is secured (see fig. 1); a suspension terminal (DPS) extending from the die pad (DP) (page 2, paragraph 37; see fig. 1); a lead terminal (GL) (page 2, paragraph 37) electrically connected to the chip (CH) (electrically connected to the chip by wires BW; page 2, paragraph 36; see fig. 1); and a dummy terminal (DL) (page 2, paragraph 37), wherein the suspension terminal (DPS) is disposed closer to the dummy terminal (DL) than the lead terminal (GL) (left bottom dummy lead DL and right upper dummy lead DL are closer to the suspension leads DPS than the source leads GL; see fig. 1). Regarding Claim 5, Kashiwazaki discloses wherein the suspension terminal (DPS) is a plurality of suspension terminals (top and bottom ones; see fig. 1), wherein the lead terminal (GL) is a plurality of lead terminals (left side terminals; see fig. 1), wherein the dummy terminal (DL) is a plurality of dummy terminals (left bottom dummy lead DL and right upper dummy lead DL; see fig. 1), wherein each one of suspension terminals (DPS) is disposed closer to a corresponding one of the dummy terminals (DL) than a corresponding one of the lead terminals (GL) (the left bottom dummy lead DL is closer to the bottom suspension lead DPS than the plurality of the source leads GL, and the right upper dummy lead DL is closer to the top suspension lead DPS than the plurality of the source leads GL; see fig. 1). Allowable Subject Matter Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claim 3 recites based on a first diagonal and a second diagonal intersecting on a surface of the die pad, the suspension terminal extends from near an end portion of the die pad intersecting the first diagonal, and the lead terminal is disposed near an end portion of the die pad intersecting the second diagonal. These features in combination with the other elements of the base claim are neither disclosed nor suggested by the prior art of record. Claims 2 and 4 are allowed. The following is an examiner’s statement of reasons for allowance: Claim 2 recites the dummy terminal includes: (i) a first dummy terminal that also serves as the suspension terminal, and (ii) a second dummy terminal separated from the die pad. These features in combination with the other elements of the claim are neither disclosed nor suggested by the prior art of record. Claim 4 depends from claim 2, so it is allowed for the same reason. Response to Arguments Applicant’s argument with regard to the rejection under 35 U.S.C. 102 has been fully considered, but it is not deemed to be persuasive for at least the following reasons. With regard to the pending 35 U.S.C. 102 rejection, applicant presents the following argument: As reflected in Fig. 1 of Kashiwazaki, SL is also a lead terminal electrically connected to the chip. Further, the arrangement includes a dummy terminal DL arranged opposite the lead terminal SL. The suspension terminal DPS is centered between the lead terminal SL and the dummy terminal DL. Therefore, this arrangement does not satisfy the requirement that suspension terminal is disposed closer to the dummy terminal than the lead terminal, as encompassed by claim 1. The Applicant relies on the signal leads SL as corresponding to the claimed “lead terminal.” While the signal leads SL may be considered lead terminals in that they are electrically connected to the chip, the rejection specifically identifies the source leads GL as “a lead terminal” as recited in claim 1. The Applicant’s argument is based on selecting a different structure (SL) as the claimed “lead terminal” and analyzing an alternative arrangement that is not relied upon in the rejection. The claim recites “a lead terminal,” which requires only a single corresponding structure to meet the limitation, not every possible lead terminal in the reference. Accordingly, because Kashiwazaki discloses the claimed limitation with respect to the source leads GL, the rejection is maintained. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHEUNG LEE whose telephone number is (571)272-5977. The examiner can normally be reached 9 AM - 5:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, DAVIENNE MONBLEAU can be reached at (571)272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHEUNG LEE/Primary Examiner, Art Unit 2812 March 20, 2026
Read full office action

Prosecution Timeline

Sep 21, 2023
Application Filed
Dec 13, 2025
Non-Final Rejection — §102
Mar 03, 2026
Response Filed
Mar 20, 2026
Final Rejection — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
92%
Grant Probability
96%
With Interview (+4.2%)
2y 0m
Median Time to Grant
Moderate
PTA Risk
Based on 1135 resolved cases by this examiner. Grant probability derived from career allow rate.

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