Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-15 in the reply filed on 13 January 2026 is acknowledged.
Claim Rejections - 35 USC § 103
Claim(s) 1-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fan et al. (US Patent Pub 20170084717) in view of Fukui et al. (US Patent Pub 20180294362).
Regarding Claim 1, Fan teaches a semiconductor device having first and second conductivity regimes, comprising:
a substrate body (Fan, Fig. 11, substrate body (20, 22, 24, 26, 30, 32, and 48));
a source formed along a first sidewall of the substrate body; a drain formed along a second sidewall of the substrate body (Fig. 8, paragraph 0027, source region 34a and drain region 34b. 36, which is part of 34a and 34b ae considered the source and drain of said regions. Fig. 8 is the same device as fig. 11, but details the source and drain location. 36 of 34a is along the left sidewall of 48, and 36 of 34b is along the right sidewall of 48, which is a part of the substrate body);
first and second delta layers disposed on the substrate body and separated by a gap, wherein the first delta layer is in contact with the source and the second delta layer is in contact with the drain (Fan, Fig. 11, first and second delta layers 38 (first delta layer on the left, second delta layer on the right. First delta layer contacts source 36 of 34a and second delta layer contacts drain 36 of 34b. There is a gap (see Fig. 10, gap 48) between the first and second delta layers);
and a cap disposed over the first and second delta layers (Fan, Fig. 11, cap 40)
Fan fails to disclose the semiconductor device operating current in response to applied voltages between the source and the drain, and that the semiconductor device has a first conductivity regime responsive to a first voltage between the drain and the source and a second conductivity regime responsive to a second voltage between the drain and the source.
However, Fukui teaches a semiconductor HEMT device and discloses the device operating current in response to applied voltages between the source and the drain, wherein the semiconductor device has a first conductivity regime responsive to a first voltage between the drain and the source and has the second conductivity regime responsive to a second voltage between the drain and the source (Fukui, Fig. 13B and paragraph 0109 teaches a conductivity regime responsive to a first voltage (between 0 V and 0.05 V) and a second conductivity regime responsive to a second voltage (between 0.075 V and 0.25 V), see annotated figure below).
It would have been obvious to one of ordinary skill in the at the time of invention to incorporate the teachings of Fukui into the method of Fan by forming the semiconductor device having a first conductivity regime responsive to a first voltage between the drain and the source and has the second conductivity regime responsive to a second voltage between the drain and the source. The ordinary artisan would have been motivated to modify Fan in the manner set forth above for at least the purpose of improving the performance of the semiconductor device while also suppressing power consumption (Fukui, paragraph 0017).
Regarding Claim 2, Fan in view of Fukui teaches the semiconductor device of claim 1, wherein the second voltage is higher than the first voltage (Fukui, Fig. 13B and paragraph 0109, second voltage (between 0.075 V and 0.25 V) is higher than the first voltage (between 0 V and 0.05 V)).
Regarding Claim 3, Fan in view of Fukui teaches the semiconductor device of claim 1, wherein a current between the drain and the source is higher in the second conductivity regime than a current between the drain and the source in the first conductivity regime (Fukui, Fig. 13B, a current in the second conductivity regime is higher than in current in the first conductivity regime (See annotated
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figure below)).
Regarding Claim 4, Fan in view of Fukui teaches the semiconductor device of claim 1, wherein the first voltage is between 0 V and 0.05 V, and wherein the second voltage is between 0.075 V and 0.11 V (Fukui, Fig. 13B and paragraph 0109 teaches the first voltage can be between 0 V and 0.05 V and the second voltage can be between 0.075 V and 0.25V, which contains the claimed range).
Regarding Claim 5, Fan in view of Fukui teaches the semiconductor device of claim 1, wherein the first and second delta layers are embedded between the substrate body and the cap (Fan, Fig. 11, first and second dela layers 38 embedded between substrate body (20, 22, 24, 26, 30, 32, and 48) and cap 40).
Regarding Claim 6, Fan in view of Fukui teaches the semiconductor device of claim 1, wherein the first and second delta layers are formed by thin layers of phosphorus (Fan, paragraph 0024 teaches Table 1, which details what materials first and second delta layers 38 can be made of. Table 1 teaches layer 38 can be InP, which contains phosphorous).
Regarding Claim 7, Fan in view of Fukui teaches the semiconductor device of claim 1, wherein the substrate body and the cap are formed of a semiconductor material (Fan, paragraph 0025 teaches cap 40 can be silicon oxide and/or silicon nitride. Paragraphs 0014-0017 and 0031 teach the materials of the other substrate body materials. All layers of the substrate body and cap can be formed of a semiconductor material).
Regarding Claim 8, Fan in view of Fukui teaches the semiconductor device of claim 1, wherein the first delta layer extends from the source into a region between the substrate body and the cap, and wherein the second delta layer extends from the drain into another region between the substrate body and the cap (Fan, Fig. 11, Both first delta layer 38 (the portion which extends from source 36 of 34a) and second delta layer 38 (the portion which extends from drain 36 of 34b) extend into gap region 44 (pointed out in Fig. 10), which is located between substrate body (20, 22, 24, 26, 30, 32, and 48) and cap 40.
Regarding Claim 9, Fan teaches the semiconductor device of claim 1.
Fan fails to specifically teach the gap separating the two delta layers is between 2 nano-meters and 12 nano-meters.
However, Fukui teaches a semiconductor device wherein the gap separating the two delta layers is between 2 nano-meters and 12 nano-meters (Fukui, Fig. 2, delta layers 135 (first delta layer on left side of device, second delta layer on right side of device) separated by layers 131 and 134. Paragraph 0043 teaches 131 has a thickness range of 2 nm to 520 nm. Paragraph 0045 teaches 134 has a thickness range of 0.5 nm to 10 nm. Therefore, layers 131 and 134 can be arranged such that the gap between the first and second delta layers can be between 3 nm and 12 nm, which falls within the claimed gap range.
It would have been obvious to one of ordinary skill in the at the time of invention to incorporate the teachings of Fukui into the method of Fan by forming the semiconductor device wherein the gap separating the two delta layers is between 2 nano-meters and 12 nano-meters. The ordinary artisan would have been motivated to modify Fan in the manner set forth above for at least the purpose of improving the performance of the semiconductor device while also suppressing power consumption (Fukui, paragraph 0017).
Regarding Claim 10, Fan in view of Fukui teaches a semiconductor device having first and second resistive states, comprising:
a substrate body (Fan, Fig. 11, substrate body (20, 22, 24, 26, 30, 32, and 48));
a source formed along a first sidewall of the substrate body; a drain formed along a second sidewall of the substrate body; (Fig. 8, paragraph 0027, source region 34a and drain region 34b. 36, which is part of 34a and 34b ae considered the source and drain of said regions. Fig. 8 is the same device as fig. 11, but details the source and drain location. 36 of 34a is along the left sidewall of 48, and 36 of 34b is along the right sidewall of 48, which is a part of the substrate body);
first and second delta layers disposed on the substrate body and separated by a gap, wherein the first delta layer is in contact with the source and the second delta layer is in contact with the drain(Fan, Fig. 11, first and second delta layers 38 (first delta layer on the left, second delta layer on the right. First delta layer contacts source 36 of 34a and second delta layer contacts drain 36 of 34b. There is a gap (see Fig. 10, gap 48) between the first and second delta layers);
and a cap disposed over the first and second delta layers (Fan, Fig. 11, cap 40).
Fan fails to disclose the semiconductor device operating current in response to applied voltages between the source and the drain, and that the semiconductor device has a first resistive state responsive to a first voltage between the drain and the source and a second resistive state responsive to a second voltage between the drain and the source.
However, Fukui teaches a semiconductor HEMT device and discloses the device operating current in response to applied voltages between the source and the drain, wherein the semiconductor device has a first resistive state responsive to a first voltage between the drain and the source and has the second resistive state responsive to a second voltage between the drain and the source (Fukui, Fig. 13B and paragraph 0109 teaches a conductivity regime responsive to a first voltage (between 0 V and 0.05 V) and a second conductivity regime responsive to a second voltage (between 0.075 V and 0.25 V). Paragraph 0017 of applicant’s own specification teaches that because the semiconductor device has two conductivity regimes, the device also has two resistive states. Therefore, since Fukui teaches a semiconductor device having first and second conductivity regimes responsive to first and second voltages, it also teaches that the device has first and second resistive states responsive to first and second voltages.)
It would have been obvious to one of ordinary skill in the at the time of invention to incorporate the teachings of Fukui into the method of Fan by forming the semiconductor device having a first resistive state responsive to a first voltage between the drain and the source and has the second resistive state responsive to a second voltage between the drain and the source. The ordinary artisan would have been motivated to modify Fan in the manner set forth above for at least the purpose of improving the performance of the semiconductor device while also suppressing power consumption (Fukui, paragraph 0017).
Regarding Claim 11, Fan in view of Fukui teaches the semiconductor device of claim 10, wherein the semiconductor device has a first resistance in the first resistive state and has a second resistance in the second resistive state (Fukui, Fig. 13B and paragraph 0109 teaches a conductivity regime responsive to a first voltage (between 0 V and 0.05 V) and a second conductivity regime responsive to a second voltage (between 0.075 V and 0.25 V). Paragraph 0017 of applicant’s own Because the semiconductor device has two conductivity regimes, the device also has two resistive states. Therefore, since Fukui teaches a semiconductor device having first and second conductivity regimes responsive to first and second voltages, it also teaches that the device has first and second resistive states responsive to first and second voltages. Further, the semiconductor device has a first resistance in the first resistive state and a second resistance in the second resistive state).
Regarding Claim 12, Fan in view of Fukui teaches the semiconductor device of claim 11, wherein the first resistance is higher than the second resistance (Fan, paragraph 0024 and table 1 teaches a semiconductor device having first and second conductivity regimes responsive to first and second voltages that is formed with delta layers that may be formed with materials containing phosphorous. Paragraph 0017 of applicant’s own specification teaches because the semiconductor device has two conductivity regimes, the device also has two resistive states and that the first resistance is higher than the second resistance. Therefore, because the semiconductor device taught by Fan in view of Fukui is of the same structure and has two conductivity regimes, the device also has two resistive states and the first resistance is higher than the second resistance).
Regarding Claim 13, Fan in view of Fukui teaches the semiconductor device of claim 10, wherein the second voltage is higher than the first voltage (Fukui, Fig. 13B and paragraph 0109, second voltage (between 0.075 V and 0.25 V) is higher than the first voltage (between 0 V and 0.05 V)).
Regarding Claim 14, Fan in view of Fukui teaches the semiconductor device of claim 10, wherein the first voltage is between 0 V and 0.05 V, and wherein the second voltage is between 0.075V and 0.11 V (Fukui, Fig. 13B and paragraph 0109 teaches the first voltage can be between 0 V and 0.05 V and the second voltage can be between 0.075 V and 0.25V, which contains the claimed range).
Regarding Claim 15, Fan in view of Fukui teaches the semiconductor device of claim 10, wherein the first and second delta layers are formed by thin layers of phosphorus (Fan, paragraph 0024 teaches Table 1, which details what materials first and second delta layers 38 can be made of. Table 1 teaches layer 38 can be InP, which contains phosphorous).
Conclusion
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/V.R.G./Examiner, Art Unit 2899 /JOHN M PARKER/Examiner, Art Unit 2899