Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-6 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Specifically, the Applicant’s disclosure at the time of the effective filing date provides support for a semiconductor device wherein a conductive path is created upon application of a predetermined voltage (Paragraph 0021 of the Applicant’s specification), which is an anti-fuse device. The Applicant’s disclosure does not provide support for a fuse semiconductor device (Paragraph 0005 of the Applicant’s specification recites a semiconductor device provided with a fuse). Support for an anti-fuse semiconductor device does not show possession of a fuse semiconductor device.
The examiner directs the applicant to replace the term “fuse” with the term “anti-fuse.” For the purposes of this action, the term “fuse” will be interpreted as “anti-fuse.”
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US Patent Pub 20220173045) in view of Kurjanowicz et al. (US Patent Pub 20070257331).
Regarding Claim 1, Chen teaches an anti-fuse semiconductor device comprising:
an insulating substrate (fig. 8, substrate 101) provided with a substrate surface (fig. 8, top of substrate 101)
a first conductive body (fig. 8, first conductive body 107-5) provided on the substrate surface;
a second conductive body (fig. 8, second conductive body 107-1) provided on the substrate surface, the second conductive body being separated from the first conductive body;
an insulating film (fig. 8, insulating film 203) provided at the substrate surface, the insulating film covering the first conductive body and the second conductive body;
and a third conductive body (fig. 8, third conductive body 107-3) provided on a face of the insulating film at an opposite side (fig. 8, top surface of insulating film 205) thereof from a side at which the substrate surface is disposed (fig. 8, bottom surface of insulating film 205), the third conductive body penetrating the insulating film and contacting the second conductive body (fig. 8, third conductive body 107-3 in electrical contact with second conductive body 107-1 through insulating film 203).
While Chen teaches an insulating film disposed between a side at which the third conductive body and the first conductive body is disposed, they fail to specifically teach an insulating film including a thinned portion at which a thickness of the film disposed between both the third conductive body and the first conductive body can be locally fractured by an application of a voltage.
However, Kurjanowicz teaches an anti-fuse semiconductor device with an insulating film including a thinned portion at which a thickness of the insulating film (Kurjanowicz, fig. 4, insulating film 102 having a thinned portion) disposed between two conductive bodies (Kurjanowicz, fig. 4, conductive bodies 106 and 116) is decreased such that the insulating film can be locally fractured by an application of a voltage to the insulating film.
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teaching of Kurjanowicz into the method of Chen by forming an insulating film including a thinned portion at which a thickness of the insulating film, between a side thereof at which the third conductive body is disposed and a side at which the first conductive body is disposed, is decreased such that the insulating film can be locally fractured by application of a voltage to the insulating film between the third conductive body and the first conductive body. The ordinary artisan would have been motivated to modify Chen in the manner set forth above for at least the purpose of providing a region of insulating film where oxide can break down (Kurjanowicz, paragraph 0065).
Regarding Claim 2, Chen in view of Kurjanowicz teaches an anti-fuse semiconductor device wherein the insulating film has recess portions being formed at a side thereof at which the third conductive body is disposed (Chen, fig. 9, a device embodiment showing insulating film 203 has a recessed portion formed at the side at which third conductive body 107-1 is disposed) recessed toward a side at which the substrate surface is disposed (Chen, fig. 9, insulating film 203 having recessed portions in which the insulating film recesses toward a side at which the surface if substrate 101 is disposed).
Chen fails to teach an insulating film with a thinned portion of the insulating film being formed by the recess portion.
However, Kurjanowicz teaches an anti-fuse semiconductor device having an insulating film with the thinned portion of the insulating film being formed by the recess portion (Kurjanowicz, fig. 4, insulating film 102 that is recessed and having a thinned portion).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teaching of Kurjanowicz into the method of Chen by forming an insulating film wherein a recess portion is formed at a portion of the face of the insulating film at the side thereof at which the third conductive body is disposed, the recess portion being recessed toward a side at which the substrate surface is disposed, and the thinned portion of the insulating film being formed by the recess portion. The ordinary artisan would have been motivated to modify Chen in the manner set forth above for at least the purpose of providing a region of insulating film where oxide can break down (Kurjanowicz, paragraph 0065).
Regarding Claim 3, Chen in view of Kurjanowicz teaches the semiconductor device according to claim 2, wherein a side face of the recess portion is inclined relative to the substrate surface (Chen, fig. 9, insulating film 203 is recessed at an incline relative to the substrate surface).
Regarding Claim 4, Chen in view of Kurjanowicz teaches the semiconductor device according to claim 2, wherein a side face of the recess portion is perpendicular to the substrate surface (Kurjanowicz, fig. 4, insulating film 102 is recessed and has a surface perpendicular to substrate surface 104).
Regarding Claim 5, Chen in view of Kurjanowicz teaches the semiconductor device according to claim 2 wherein, when viewed in a normal direction of the substrate surface, some or all of the recess portion is at a position overlapping with the first conductive body (Kurjanowicz, fig. 4 and fig. 5a show first conductive body 106 over the recessed portion of 102).
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Kurjanowicz as applied to claims 1-5 above, and further in view of Bae (US Patent Pub 20110001211).
Regarding Claim 6, Chen in view of Kurjanowicz teaches a semiconductor device with first, second, and third conductive bodies, and an insulating layer with a recessed portion.
Chen in view of Kurjanowicz fails to teach a recess portion at a position between the first conductive body and the second conductive body when viewed in a normal direction of the substrate surface.
However, Bae teaches a semiconductor device with a fuse, which are used similarly to anti-fuse semiconductor devices, wherein the insulating film (Bae, fig. 3a ii, insulating film 52) has a recessed portion at a position between the first conductive body (Bae, fig. 3a ii, element 54 on the left side of the structure) and the second conductive body (Bae, fig. 3a ii, element 54 on the right side of the structure).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teaching of Bae into the method of Chen in view of Kurjanowicz by forming an insulating film wherein when viewed in a normal direction of the substrate surface, the recess portion is at a position between the first conductive body and the second conductive body. The ordinary artisan would have been motivated to modify Chen in view of Kurjanowicz in the manner set forth above for at least the purpose of providing a method for the formation of a Y type fuse, leading to improved reliability under high temperature and high humidity conditions (Bae, paragraphs 0002).
Additionally, Chen discloses the claimed invention except for the recessed portion of the insulating layer being at a position between the first conductive body and the second conductive body when viewed in a normal direction of the substrate surface (Chen, fig. 8, insulating film 203 has recessed portions overlapping the first conductive body 107-5 and second conductive body 107-1). It would have been obvious to one of ordinary skill in the art at the time the invention was made to locate the recessed portion of insulating film 203 between the first conductive body 107-5 and second conductive body 107-1 when viewed in a normal direction of the substrate surface, since it has been held that rearranging parts of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70.
Conclusion
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/V.R.G./Examiner, Art Unit 2899
/CHRISTOPHER A JOHNSON/Primary Examiner, Art Unit 2899