Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action
This office action is in response to applicant’s communication filed on 09/25/23. Claims 1-23 are pending in this application.
Information Disclosure Statements
The information disclosure statements filed on 09/26/23, 01/31/24, 06/26/24, 11/22/24, 02/14/25, 04/24/25 have been received and are being considered.
Claim Rejections Under 35 U.S.C. §103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8, 10-17, 19-23 are rejected under 35 U.S.C. §103 as being unpatentable over Karhade (US 20190006319 A1) and further in view of Kim (US 20180061816 A1).
Regarding claim 1, Karhade discloses an electronic package (see fig. 1), comprising: a first die coupled to a package substrate (120a coupled to 112), the first die having a top surface (top of 120a); a second die coupled to the top surface of the first die (see 120b coupled to 120a), the second die having a top surface (see top surface of 120b); a mold layer on the package substrate (140 0n 120a/b), the mold layer laterally spaced apart from the first die and the second die (see 140 and annumerated sections designated by arrows reproduced below spaced apart from 120a/b), and the mold layer having a top surface co-planar with the top surface of the second die (see layers of 140 next to 114 having coplanar upper surface with 120b).
PNG
media_image1.png
504
612
media_image1.png
Greyscale
However, Karhade does not explicitly disclose a barrier above the second die and the mold layer, at least a portion of the barrier vertically over the mold layer, wherein the barrier comprises a continuous ring in a plan view perspective.
However, Kim, at least at fig 3, discloses a barrier 300 above the second die (over 103)and the mold layer (and mold layer 105), at least a portion of the barrier vertically over the mold layer (see below where 300 overlaps 103 and 105), wherein the barrier comprises a continuous ring in a plan view perspective (see fig 1 of Kim disclosing a circumferential arrangement of 300, i.e. a ring).
PNG
media_image2.png
122
310
media_image2.png
Greyscale
Karhade and Kim are in the same or similar fields of endeavor. It would have been obvious to one having ordinary skill in the art at a time prior to the effective filing date of the present application to combine Karhade with Kim. Karhade and Kim may be combined by forming the device of Karhade with the barrier ring of Kim in order to expose a central zone, to minimize cracks, i.e. maximize chip yield, see para [0053].
Regarding claim 2, Karhade and Kim disclose the electronic package of claim 1, further comprising: a thermal interface material within the continuous ring of the barrier(see fig 4, disclosing second barrier with 340, AG).
Regarding claim 3, Karhade and Kim disclose the electronic package of claim 1, further comprising: a second barrier within the continuous ring of the barrier(see fig 4, disclosing second barrier with 340, AG).
Regarding claim 4, Karhade and Kim disclose the electronic package of claim 3, further comprising: a thermal interface material within the second barrier(see fig 4, disclosing second barrier with 340, AG).
Regarding claim 5, Karhade and Kim disclose the electronic package of claim 1, wherein the barrier is not in contact with the second die(see para [0028] disclosing air gap wherein at least a part of the barrier is not in contact with 103, 300, see fig 3).
Regarding claim 6, Karhade and Kim disclose the electronic package of claim 1, wherein the barrier is dome shaped(see fig 3 where 300 is semicircular).
Regarding claim 7, Karhade and Kim disclose the electronic package of claim 1, wherein the barrier comprises a polymeric material(see para [0028] disclosing polymer resin and para [0032] of Karhade).
Regarding claim 8, Karhade and Kim disclose the electronic package of claim 7, wherein the polymeric material comprises an acrylic polymer(see para [0032] of Karhade and para [0026] of Kim disclosing polymers).
Regarding claim 10, Karhade discloses an electronic package (see fig. 1), comprising: a first die coupled to a package substrate (120a coupled to 112), the first die having a top surface (top surface of 120a); a second die coupled to the top surface of the first die (see 120b coupled to 120a), the second die having a top surface (see top of 120b) with a perimeter(see para [0030], describing 140 surrounding 120b); a mold layer on the package substrate (140), the mold layer laterally spaced apart from the first die and the second die (see 140 and arrows reproduced below), and the mold layer having a top surface co-planar with the top surface of the second die (see 140 layers adjacent to 114 having coplanar upper surface with 120b).
PNG
media_image1.png
504
612
media_image1.png
Greyscale
However, Karhade does not explicitly disclose a barrier above the second die and the mold layer, at least a portion of the barrier vertically over the mold layer, wherein the barrier comprises a continuous ring around the perimeter of the top surface of the second die.
However, Kim, at least at fig 3, discloses a barrier 300 above the second die (over 103)and the mold layer (and mold layer 105), at least a portion of the barrier vertically over the mold layer (see below where 300 overlaps 103 and 105), wherein the barrier comprises a continuous ring around the perimeter of the top surface of the second die (see fig 1 of Kim disclosing a circumferential arrangement of 300, i.e. a ring).
PNG
media_image2.png
122
310
media_image2.png
Greyscale
Karhade and Kim are in the same or similar fields of endeavor. It would have been obvious to one having ordinary skill in the art at a time prior to the effective filing date of the present application to combine Karhade with Kim. Karhade and Kim may be combined by forming the device of Karhade with the barrier ring of Kim in order to expose a central zone, to minimize cracks, i.e. maximize chip yield, see para [0053].
Regarding claim 11, Karhade and Kim disclose the electronic package of claim 10, further comprising: a thermal interface material within the continuous ring of the barrier (see fig 4, disclosing second barrier with 340, AG).
Regarding claim 12, Karhade and Kim disclose the electronic package of claim 10, further comprising: a second barrier within the continuous ring of the barrier(see fig 4, disclosing second barrier with 340, AG).
Regarding claim 13, Karhade and Kim disclose the electronic package of claim 12, further comprising: a thermal interface material within the second barrier(see fig 4, disclosing second barrier with 340, AG).
Regarding claim 14, Karhade . The electronic package of claim 10, wherein the barrier is not in contact with the second die (see para [0028] disclosing air gap wherein at least a part of the barrier is not in contact with 103, 300, see fig 3).
Regarding claim 15, Karhade and Kim disclose the electronic package of claim 10, wherein the barrier is dome shaped.
Regarding claim 16, Karhade and Kim disclose the electronic package of claim 10, wherein the barrier comprises a polymeric material (see para [0028] disclosing polymer resin and para [0032] of Karhade).
Regarding claim 17, Karhade and Kim disclose the electronic package of claim 16, wherein the polymeric material comprises an acrylic polymer.
Regarding claim 19, Karhade discloses an electronic package (see fig. 1), comprising: a first die coupled to a package substrate (120a coupled to 112), the first die having a top surface (top of 120a); a second die coupled to the top surface of the first die (see 120b coupled to 120a), the second die having a top surface (see top surface of of 120b); a mold layer on the package substrate, the mold layer laterally spaced apart from the first die and the second die (see 140 and arrows reproduced below), and the mold layer having a top surface co-planar with the top surface of the second die (see layers next to 140 having coplanar upper surface with 120b).
a conductive post in the mold layer (see 114/156), the conductive post laterally spaced apart from the first die and the second die (see 114/156 spaced apart from 140); and a second electronic package coupled to the first electronic package by the conductive post(see 160a/b coupled by 114/156), wherein the second electronic package comprises a third die (see 160a/b), the third die vertically over the second die of the first electronic package(see 160a/b).
PNG
media_image1.png
504
612
media_image1.png
Greyscale
However, Karhade does not explicitly disclose a barrier above the second die and the mold layer, at least a portion of the barrier vertically over the mold layer, wherein the barrier comprises a continuous ring in a plan view perspective.
However, Kim, at least at fig 3, discloses a barrier 300 above the second die (over 103)and the mold layer (and mold layer 105), at least a portion of the barrier vertically over the mold layer (see below where 300 overlaps 103 and 105), wherein the barrier comprises a continuous ring in a plan view perspective (see fig 1 of Kim disclosing a circumferential arrangement of 300, i.e. a ring).
PNG
media_image2.png
122
310
media_image2.png
Greyscale
Karhade and Kim are in the same or similar fields of endeavor. It would have been obvious to one having ordinary skill in the art at a time prior to the effective filing date of the present application to combine Karhade with Kim. Karhade and Kim may be combined by forming the device of Karhade with the barrier ring of Kim in order to expose a central zone, to minimize cracks, i.e. maximize chip yield, see para [0053].
Regarding claim 20, Karhade and Kim disclose the system of claim 19, further comprising: a thermal interface material within the continuous ring of the barrier(see fig 4, disclosing second barrier with 340).
Regarding claim 21, Karhade and Kim disclose the system of claim 19, further comprising: a second barrier within the continuous ring of the barrier(see fig 4, disclosing second barrier with 340.
Regarding claim 22, Karhade and Kim disclose the system of claim 21, further comprising: a thermal interface material within the second barrier (see fig 4, disclosing second barrier with 340, AG).
Regarding claim 23, Karhade and Kim disclose the system of claim 19, and Kim further discloses wherein the barrier is dome shaped (see fi 3, disclosing semicircular arrangement of 300).
Claims 9 and 18 are rejected under 35 U.S.C. §103 as being unpatentable over Karhade and Kim and further in view of Doan (US 20140087499 A1).
Regarding claim 9, Karhade and Kim disclose the electronic package of claim 7, but does not explicitly disclose wherein the polymeric material comprises TiO2 particles. However, Doan is directed towards stacked semiconductor features and at least at para [0012] discloses wherein the polymeric material comprises TiO2 particles.
Karhade, Kim and Doan are in the same or similar fields of endeavor. It would have been obvious to one having ordinary skill in the art at a time prior to the effective filing date of the present application to combine Karhade, Kim and Doan. Karhade, Kim and Doan may be combined by forming the barrier film of Karhade and Kim in accordance with Doan, in order to, for example, increase structural stability.
Regarding claim 18, Karhade and Kim disclose the electronic package of claim 16, but does not explicitly disclose wherein the polymeric material comprises TiO2 particles. However, Doan is directed towards stacked semiconductor features and at least at para [0012] discloses wherein the polymeric material comprises TiO2 particles.
Karhade, Kim and Doan are in the same or similar fields of endeavor. It would have been obvious to one having ordinary skill in the art at a time prior to the effective filing date of the present application to combine Karhade, Kim and Doan. Karhade, Kim and Doan may be combined by forming the barrier film of Karhade and Kim in accordance with Doan, in order to, for example, increase structural stability.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EDWARD CHIN whose telephone number is (571)270-1827. The examiner can normally be reached M-F 9AM-5PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at (571) 270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/EDWARD CHIN/Primary Examiner, Art Unit 2893