DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-20 are pending.
Claims 1-20 are original.
Claims 1-20 are rejected herein.
Drawings
Figure 1A should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Note, the present specification explicitly recites “The conventional field effect transistor layout illustrated in FIG. 1A.” Page 5, line 13.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3-4 and 12-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites the limitation "a source contact" in line 2. However, claim 1, from which claim 3 depends, already recites the limitation “a source contact.” It is unclear if “a source contact” as recited in claim 3 refers to the same source contact already recited in claim 1 or a different source contact. Correction is required. For examination purposes, “a source contact” as recited in line 2 of claim 3 shall be read as “the source contact.”
Claim 3 also recites the limitation "a fingers" in line-3. However, claim 1, from which claim 3 depends, also already recites the limitation “a number of source contact fingers.” It is unclear if “a number of source contact fingers” as recited in claim 3 refers to the same source contact fingers already recited in claim 1 or different source contact fingers. Correction is required. For examination purposes, “a number of source contact fingers” as recited in line 2 of claim 3 shall be read as “the number of source contact fingers.”
Claim 4 depends from claim 3 and is likewise rejected for the same reasons as claim 3.
Claim 12 recites the limitation "a source contact" in line 2. However, claim 10, from which claim 12 depends, already recites the limitation “a source contact.” It is unclear if “a source contact” as recited in claim 12 refers to the same source contact already recited in claim 10 or a different source contact. Correction is required. For examination purposes, “a source contact” as recited in line 2 of claim 12 shall be read as “the source contact.”
Claim 12 also recites the limitation "a fingers" in line-3. However, claim 10, from which claim 12 depends, also already recites the limitation “a number of source contact fingers.” It is unclear if “a number of source contact fingers” as recited in claim 12 refers to the same source contact fingers already recited in claim 10 or different source contact fingers. Correction is required. For examination purposes, “a number of source contact fingers” as recited in line 2 of claim 12 shall be read as “the number of source contact fingers.”
Claim 13 depends from claim 12 and is likewise rejected for the same reasons as claim 12.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4 and 6-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Vorhaus (US 20120086497 A1).
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ANNOTATED FIG. 13 OF VORHAUS
Regarding claim 1, Vorhaus discloses (see generally, e.g., FIG. 7 and annotated FIG. 13 herein):
A field effect transistor (Abstract) integrated within an associated transistor area (i.e., the area in which the transistor is located), the field effect transistor comprising: a contact configuration (see, e.g., FIG. 13) with interleaved contact fingers (502, 504, 506) including a number of source contact fingers (502_1 and 502_2) connected to a source contact (542) by through wafer vias (512_1 and 512_2) staggered at alternating ends (END1 and END2) of the source contact fingers (502_1 and 502_2).
Regarding claim 2, Vorhaus discloses:
The field effect transistor of claim 1 wherein the through wafer vias (512_1 and 512_2) are provided outside an active transistor area of the field effect transistor.
Note, the “active transistor area of the field effect transistor” is read as the area under the gate fingers (506) between neighboring drain fingers (506) and source fingers (502). See, e.g., FIG. 3 and paragraph [0025] describing an “’active’ device area.” As illustrated in FIG. 13, the through wafer vias (512_1 and 512_2) are positioned over the source fingers (502_1 and 502_2) and are hence outside the active transistor area as claimed.
Regarding claim 3, Vorhaus discloses:
The field effect transistor of claim 1 wherein the contact configuration comprises transistor contacts (542, 504, 506) including a source contact (542) connected by through wafer vias (512_1 and 512_2) to a number of source contact fingers (502_1 and 502_2), a drain contact (504) including a number of drain contact fingers (504), and a gate contact (506) including a number of gate contact fingers (506).
Regarding claim 4, Vorhaus discloses:
The field effect transistor of claim 3 wherein each gate contact finger (506) is provided between a source contact finger (502_1 and 502_2) and a drain contact finger (504). See, e.g., FIG. 13.
Regarding claim 6, Vorhaus discloses:
The field effect transistor of claim 1 wherein the field effect transistor comprises a Gallium Nitride transistor (see, e.g., claim 9).
Regarding claim 7, Vorhaus discloses:
The field effect transistor of claim 1 wherein the field effect transistor comprises a Gallium Arsenide transistor (see, e.g., claim 9).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 5, 9-16 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Vorhaus.
Regarding claim 5, Vorhaus as applied to claim 1 discloses the field effect transistor of claim 1.
In the embodiment of FIG. 13, Vorhaus may not explicitly disclose wherein the contact fingers of the contact configuration comprise rectangular shaped contact fingers.
However, in the embodiment of FIG. 8, Vorhaus discloses the contact fingers (502, 504, 506) of the contact configuration comprise rectangular shaped contact fingers (502, 504, 506). Vorhaus further explicitly discloses that “embodiments illustrated in the figures may be used in various combinations.” Paragraph [0059].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the contact fingers (502, 504, 506) of the contact configuration shown in the embodiment of FIG. 13 of Vorhaus comprise rectangular shaped contact fingers as taught by Vorhaus (e.g., in the embodiment of FIG. 8) according to known methods to yield predictable results, for example, in order to simplify forming of the contact fingers using a simplified rectangular shape.
The conclusion of obviousness is further support by the “obvious to try” rational. See, e.g., MPEP §2143(I)(E). In particular, it is found that:
at the relevant time, there had been a recognized problem or need in the art, e.g., reducing the size and cost of FET devices while increasing yield and maintaining current handling capabilities (see Abstract);
there had been a finite number of identified, predictable potential solutions to the recognized need or problem – note, Vorhaus discloses a finite number of embodiments with a finite number of different contact finger shapes as predictable potential solutions to the recognized need or problem; and
one of ordinary skill in the art could have pursued the known potential solutions with a reasonable expectation of success – note, Vorhaus in fact pursued the known potential solutions with success.
Regarding claim 9, Vorhaus as applied to claim 1 discloses the field effect transistor of claim 1.
Vorhaus may not explicitly disclose wherein the field effect transistor comprises a metal-oxide-semiconductor field effect transistor.
However, while Vorhaus may not explicitly disclose that various embodiments of the field effect transistor (FET) comprise a metal-oxide-semiconductor field effect transistor (MOSFET), Vorhaus does explicitly disclose MOSFETS as a common type of FET and that MOSFETS can be less expensive to manufacture than other types of FETS. See, e.g., paragraph [0003].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used a MOSFET as taught by Vorhaus for the FET of Vorhaus according to known methods to yield predictable results, for example, in order to employ a common type of FET with less expensive manufacturing (see, e.g., paragraph [0003]).
Regarding claim 10, Vorhaus discloses (see generally, e.g., FIG. 7 and annotated FIG. 13 herein):
A field effect transistor (Abstract) integrated within an associated transistor area (i.e., the area in which the transistor is located), the field effect transistor comprising: a contact configuration (see, e.g., FIG. 13) with interleaved contact fingers (502, 504, 506) including a number of source contact fingers (502_1 and 502_2) connected to a source contact (542) by through wafer vias (512_1 and 512_2) staggered at alternating ends (END1 and END2) of the source contact fingers (502_1 and 502_2).
Vorhaus may not explicitly disclose a power amplifier comprising the field effect transistor.
However, while Vorhaus may not explicitly disclose that various embodiments of the field effect transistor (FET) are included in a power amplifier, Vorhaus does explicitly disclose that FET devices make very good amplification devices, and that among these devices are large-signal or power amplifiers. See, e.g., paragraph [0003].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used have used the FET of Vorhaus in a power amplifier taught by Vorhaus according to known methods to yield predictable results, for example, in order to employ a readily available and well known type of device (namely, a FET) which makes a “very good” amplification device (see, e.g., paragraph [0003]). When so configured, Vorhaus discloses a power amplifier comprising at least one field effect transistor as claimed.
Regarding claim 11, Vorhaus discloses:
The power amplifier of claim 10 wherein the through wafer vias (512_1 and 512_2) are provided outside an active transistor area of the field effect transistor.
Note, the “active transistor area of the field effect transistor” is read as the area under the gate fingers (506) between neighboring drain fingers (506) and source fingers (502). See, e.g., FIG. 3 and paragraph [0025] describing an “’active’ device area.” As illustrated in FIG. 13, the through wafer vias (512_1 and 512_2) are positioned over the source fingers (502_1 and 502_2) and are hence outside the active transistor area as claimed.
Regarding claim 12, Vorhaus discloses:
The power amplifier of claim 10 wherein the contact configuration comprises transistor contacts (542, 504, 506) including a source contact (542) connected by through wafer vias (512_1 and 512_2) to a number of source contact fingers (502_1 and 502_2), a drain contact (504) including a number of drain contact fingers (504), and a gate contact (506) including a number of gate contact fingers (506).
Regarding claim 13, Vorhaus discloses:
The power amplifier of claim 12 wherein each gate contact finger (506) is provided between a source contact finger (502_1 and 502_2) and a drain contact finger (504). See, e.g., FIG. 13.
Regarding claim 14, Vorhaus as applied to claim 10 discloses the field effect transistor of claim 10.
In the embodiment of FIG. 13, Vorhaus may not explicitly disclose wherein the contact fingers of the contact configuration comprise rectangular shaped contact fingers.
However, in the embodiment of FIG. 8, Vorhaus discloses the contact fingers (502, 504, 506) of the contact configuration comprise rectangular shaped contact fingers (502, 504, 506). Vorhaus further explicitly discloses that “embodiments illustrated in the figures may be used in various combinations.” Paragraph [0059].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the contact fingers (502, 504, 506) of the contact configuration shown in the embodiment of FIG. 13 of Vorhaus comprise rectangular shaped contact fingers as taught by Vorhaus (e.g., in the embodiment of FIG. 8) according to known methods to yield predictable results, for example, in order to simplify forming of the contact fingers using a simplified rectangular shape.
The conclusion of obviousness is further support by the “obvious to try” rational. See, e.g., MPEP §2143(I)(E). In particular, it is found that:
at the relevant time, there had been a recognized problem or need in the art, e.g., reducing the size and cost of FET devices while increasing yield and maintaining current handling capabilities (see Abstract);
there had been a finite number of identified, predictable potential solutions to the recognized need or problem – note, Vorhaus discloses a finite number of embodiments with a finite number of different contact finger shapes as predictable potential solutions to the recognized need or problem; and
one of ordinary skill in the art could have pursued the known potential solutions with a reasonable expectation of success – note, Vorhaus in fact pursued the known potential solutions with success.
Regarding claim 15, Vorhaus discloses:
The power amplifier of claim 10 wherein the field effect transistor comprises a Gallium Nitride transistor (see, e.g., claim 9).
Regarding claim 16, Vorhaus discloses:
The power amplifier of claim 10 wherein the field effect transistor comprises a Gallium Arsenide transistor (see, e.g., claim 9).
Regarding claim 18, Vorhaus as applied to claim 10 discloses the power amplifier of claim 10.
Vorhaus may not explicitly disclose wherein the field effect transistor comprises a metal-oxide-semiconductor field effect transistor.
However, while Vorhaus may not explicitly disclose that various embodiments of the field effect transistor (FET) comprise a metal-oxide-semiconductor field effect transistor (MOSFET), Vorhaus does explicitly disclose MOSFETS as a common type of FET and that MOSFETS can be less expensive to manufacture than other types of FETS. See, e.g., paragraph [0003].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used a MOSFET as taught by Vorhaus for the FET of Vorhaus according to known methods to yield predictable results, for example, in order to employ a common type of FET with less expensive manufacturing (see, e.g., paragraph [0003]).
Regarding claim 19, Vorhaus discloses:
The power amplifier of claim 10 wherein the through wafer vias (512_1 and 512_2) are provided outside an active transistor area of said field effect transistor.
Note, the “active transistor area of the field effect transistor” is read as the area under the gate fingers (506) between neighboring drain fingers (506) and source fingers (502). See, e.g., FIG. 3 and paragraph [0025] describing an “’active’ device area.” As illustrated in FIG. 13, the through wafer vias (512_1 and 512_2) are positioned over the source fingers (502_1 and 502_2) and are hence outside the active transistor area as claimed.
Claims 8 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Vorhaus in view of Inoue (US 20120012858 A1).
Regarding claim 8, Vorhaus as applied to claim 1 discloses the field effect transistor of claim 1.
Vorhaus does not explicitly disclose wherein the field effect transistor comprises a high-electron-mobility transistor including an epitaxial layer structure grown on a substrate beneath the contact configuration.
However, in analogous art, Inoue discloses a field effect transistor (see, e.g., FIG. 2) comprising a contact configuration with interleaved contact fingers (12, 14, 16) including a number of source contact fingers (12). Inoue further discloses wherein the field effect transistor comprises a high-electron-mobility transistor (paragraph [0033]) including an epitaxial layer structure (32, 34, 36, 38) grown on a substrate (30) beneath the contact configuration. See, e.g., FIG. 3A and paragraph [0025].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the FET of Vorhaus to comprise a high-electron-mobility transistor including an epitaxial layer structure grown on a substrate beneath the contact configuration as taught by Inoue according to known methods to yield predictable results, for example, in order to achieve a FET device, namely, a HEMT, suitable for amplification in a high-frequency or RF (Radio Frequency) band. See, e.g., paragraph [0005] of Inoue.
Regarding claim 17, Vorhaus as applied to claim 10 discloses the power amplifier of claim 10.
Vorhaus does not explicitly disclose wherein the field effect transistor comprises a high-electron-mobility transistor including an epitaxial layer structure grown on a substrate beneath the contact configuration.
However, in analogous art, Inoue discloses a field effect transistor (see, e.g., FIG. 2) comprising a contact configuration with interleaved contact fingers (12, 14, 16) including a number of source contact fingers (12). Inoue further discloses wherein the field effect transistor comprises a high-electron-mobility transistor (paragraph [0033]) including an epitaxial layer structure (32, 34, 36, 38) grown on a substrate (30) beneath the contact configuration. See, e.g., FIG. 3A and paragraph [0025].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have made the FET of Vorhaus to comprise a high-electron-mobility transistor including an epitaxial layer structure grown on a substrate beneath the contact configuration as taught by Inoue according to known methods to yield predictable results, for example, in order to achieve a FET device, namely, a HEMT, suitable for amplification in a high-frequency or RF (Radio Frequency) band. See, e.g., paragraph [0005] of Inoue.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Blin (US 20190206863 A1) in view of Vorhaus.
Regarding claim 17, Blin discloses (see, e.g., FIG. 26):
A wireless device (900) comprising:
a transceiver (914) configured to process radio frequency signals;
a radio frequency module (810) including at least one field effect transistor (see, e.g., paragraph [0029]) integrated within an associated transistor area (i.e., the area occupied by the field effect transistor); and
an antenna (924) connected to the radio frequency module (810).
Blin further disclose at least one field effect transistor (300) (see, e.g., FIG. 1B) comprising a contact configuration with interleaved contact fingers (S, D, 304) including a number of source contact fingers (S) connected to a source contact (IN).
Blin may not explicitly disclose that the at least one field effect transistor comprises a contact configuration with the number of source contact fingers connected to the source contact by through wafer vias staggered at alternating ends of the source contact fingers.
However, in analogous art, Vorhaus discloses (see generally, e.g., FIG. 7 and annotated FIG. 13 herein):
A field effect transistor (Abstract) integrated within an associated transistor area (i.e., the area in which the transistor is located), the field effect transistor comprising: a contact configuration (see, e.g., FIG. 13) with interleaved contact fingers (502, 504, 506) including a number of source contact fingers (502_1 and 502_2) connected to a source contact (542) by through wafer vias (512_1 and 512_2) staggered at alternating ends (END1 and END2) of the source contact fingers (502_1 and 502_2).
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used the FET of Vorhaus as the at least one field effect transistor of Blin according to known methods to yield predictable results, for example, in order to use a FET manufactured with reduced size and cost while increasing yield and maintaining current handling capabilities. See, e.g., Vorhaus, Abstract.
Conclusion
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JOHN P. CORNELY
Examiner
Art Unit 2812
/J.P.C./Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812