Prosecution Insights
Last updated: May 29, 2026
Application No. 18/373,488

VERTICALLY STACKED LIGHT-EMITTING DIODE STRUCTURE

Non-Final OA §103
Filed
Sep 27, 2023
Examiner
ERDEM, FAZLI
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rayleigh Vision Limited
OA Round
2 (Non-Final)
85%
Grant Probability
Favorable
2-3
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
907 granted / 1062 resolved
+17.4% vs TC avg
Strong +16% interview lift
Without
With
+15.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
28 currently pending
Career history
1089
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
62.5%
+22.5% vs TC avg
§102
30.7%
-9.3% vs TC avg
§112
3.7%
-36.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1062 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claims 1 and 6 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-10 are rejected under 35 U.S.C. 103 as being unpatentable over Xu et al. (20210384181) in view of Chen et al. (20220246670) further in view of Chae et al. (20190165037). Regarding Claim 1, in Fig. 2 and paragraphs 0227-0261, Xu et al. discloses vertically stacked light-emitting diode structure, comprising: a substrate 104, including a first pad, a second pad, a third pad (there are three color device in this Fig. 2, Red, Green and Blue and each has a pad associated with it, and a common pad disposed thereon separately, including a first bump, a second bump, a third bump) (see paragraphs 0185 and 0218, where pads are eventually connected to bumps on the other/back/rear side of the substrate), and a common bump disposed therebelow substrate separately, said first pad connected electrically to said first bump, said second pad connected electrically to said second bump, said third pad connected electrically to said third bump, and said common pad connected electrically to said common bump again see paragraphs 0185, 0186, 0218 and 0245); a first light-emitting device 112/130/136 disposed on said substrate, connected electrically to said common pad via a common electrode at the bottom, and connected electrically to said first pad via a first electrode thereon (see paragraphs 0194, 0202, 0211); a first reflection layer 202/204/206, disposed on said first light-emitting device; a second light-emitting device, disposed on said first reflection layer, connected electrically to said common electrode from the bottom; a second reflection layer 202/204/206, disposed on said second light-emitting device; and a third light-emitting device 112/130/136, disposed on said second reflection layer 202/204/206, connected electrically to said common electrode from the bottom, wherein a first area of said first light-emitting device is greater than a second area of said second light-emitting device (claim language does not define what the area is, and hence examiner takes the view that even side portion of the individual light emitting elements could read on the “area” limitation. However, from paragraphs 0273 and 0369, areas of the individual tri-color LED devices can be designed same, smaller or greater than each other. From Fig. 2, it appears that the top surface area of individual devices are smaller than the bottom surface area of individual devices because of the tapered device configurations); and said second area of said second light-emitting device is greater than a third area of said third light-emitting device. Xu et al. fails to disclose the limitations, (second light emitting device) connected electrically to said second pad via a second electrode thereon and (third light emitting device) connected electrically to said third pad via a third electrode thereon (i.e. examiner interprets these limitations to mean second and third light emitting devices are independently/individually interconnected); However, Chen et al. discloses a vertically stacked micro-led device structure where in Figs. 1, 5, 8a and 8b and paragraphs 0035, 0039, 0060, 0076 and 0077, the required limitation with second light emitting device) connected electrically to said second pad via a second electrode thereon and (third light emitting device) connected electrically to said third pad via a third electrode thereon is disclosed. It would have been obvious to one of having ordinary skill in the art before the effective filing date of the claimed invention in Xu et al to have the required connection structure as taught by Chen et al. in order to individually interconnect and hence individually control the tri-color micro-led devices. Xu et al. and Chen et al. combination fails to disclose the newly added limitations with respect to first and second surfaces. However, Chae et al. discloses a semiconductor device where in paragraphs 0180, 0245,0246, 0280, 0285 and 0553 and in Figs. 59A, 59B, 60A, 60B, 60C and 60D, the required amended first and second surfaces are disclosed It would have been obvious to one of having ordinary skill in the art before the effective filing date of the claimed invention to have the required surfaces in Xu et al. and Chen et al. as taught by Chae et al in order to have a compact stacked LED stack configuration. Regarding Claim 2 in Fig. 2 of Xu et al first pad, said second pad, said third pad 104/142/144/146/148, and said common pad 116/118/120 /126/128 are disposed on said substrate, respectively, and located on the edges (left or right edges) of said substrate. Regarding Claim 3, in Fig. 2 of Xu et al. first light-emitting device, said second light-emitting device and said third light-emitting device 112/130/136 emits red, green, or blue light (i.e. tri-color) Regarding Claim 4, in Fig, 2 of Xu et al, second area is 75% (see paragraphs 00273 and 0369) (see also the fact that the limitation “area” is not defined in the claim language and hence one can even take side surface area as the “area”) Regarding Claim 5, in paragraphs 0193, 0199, 0201, 0210, 0284 and 0294 of Xu et all, a first transparent glue layer and a second transparent glue layer. said first transparent glue layer disposed between said first reflection layer and said second light-emitting device; said second transparent glue layer disposed between said second reflection layer and said third light-emitting. (please also see paragraphs 0043, 0044, 0050 and 0066 of Chen et al.) Regarding Claim 6, in Fig. 2 and 0227-0261, Xu et al. discloses a vertically stacked light-emitting diode structure, comprising: a substrate 104, including a first pad, a second pad, a third pad, and a common pad disposed thereon separately, including a first bump, a second bump, a third bump, and a common bump disposed therebelow substrate separately, said first pad connected electrically to said first bump, said second pad connected electrically to said second bump, said third pad connected electrically to said third bump, and said common pad connected electrically to said common bump (there are three color device in this Fig. 2, Red, Green and Blue and each has a pad associated with it, and a common pad disposed thereon separately, including a first bump, a second bump, a third bump (see paragraphs 0185 and 0218, where pads are eventually connected to bumps on the other/back/rear side of the substrate) a first light-emitting device 112/130/136, disposed on said substrate, connected electrically to said common pad via a common electrode at the bottom, and connected electrically to said first pad via a first electrode thereon; a first reflection layer 202/204/206, disposed on said first light-emitting device; a second light-emitting device, disposed on said first reflection layer, connected electrically to said common electrode from the bottom, and connected electrically to said second pad via a second electrode thereon; a second reflection layer 202/204/206, disposed on said second light-emitting device 112/130/136; and a third light-emitting device 112/130/136, disposed on said second reflection layer 202/204/206, connected electrically to said common electrode from the bottom, wherein a first area of said first light-emitting device is smaller than a second area of said second light-emitting device; and said second area of said second light-emitting device is smaller than a third area of said third light-emitting device (claim language does not define what the area is, and hence examiner takes the view that even side portion of the individual light emitting elements could read on the “area” limitation. However, from paragraphs 0273 and 0369, areas of the individual tri-color LED devices can be designed same, smaller or greater than each other. From Fig. 2, it appears that the top surface area of individual devices is smaller than the bottom surface area of individual devices because of the tapered device configurations). Xu et al. fails to disclose the limitation where “connected electrically to said third pad via a third electrode thereon” (i.e. examiner interprets these limitations to mean second and third light emitting devices are independently/individually interconnected) However, Chen et al. discloses a vertically stacked micro-led device structure where in Figs. 1, 5, 8a and 8b and paragraphs 0035, 0039, 0060, 0076 and 0077, the required limitation where “connected electrically to said third pad via a third electrode thereon” is disclosed. It would have been obvious to one of having ordinary skill in the art before the effective filing date of the claimed invention in Xu et al to have the required connection structure as taught by Chen et al. in order to individually interconnect and hence individually control the tri-color micro-led devices. Xu et al. and Chen et al. combination fails to disclose the newly added limitations with respect to first and second surfaces. However, Chae et al. discloses a semiconductor device where in paragraphs 0180, 0245,0246, 0280, 0285 and 0553 and in Figs. 59A, 59B, 60A, 60B, 60C and 60D, the required amended first and second surfaces are disclosed It would have been obvious to one of having ordinary skill in the art before the effective filing date of the claimed invention to have the required surfaces in Xu et al. and Chen et al. as taught by Chae et al in order to have a compact stacked LED stack configuration. Regarding Claim 7, in Fig. 2 of Xu et al first pad, said second pad, said third pad 104/142/144/146/148, and said common pad 116/118/120 /126/128 are disposed on said substrate, respectively, and located on the edges (left or right edges) of said substrate. Regarding Claim 8, in Fig. 2 of Xu et al, first light-emitting device, said second light-emitting device and said third light-emitting device 112/130/136 emits red, green, or blue light (i.e. tri-color) Regarding Claim 9, in Fig, 2 of Xu et al, second area is 125% (see paragraphs 00273 and 0369) (see also the fact that the limitation “area” is not defined in the claim language and hence one can even take side surface area as the “area”) Regarding Claim 10, in paragraphs 0193, 0199, 0201, 0210, 0284 and 0294 of Xu et all, a first transparent glue layer and a second transparent glue layer. said first transparent glue layer disposed between said first reflection layer and said second light-emitting device; said second transparent glue layer disposed between said second reflection layer and said third light-emitting. (please also see paragraphs 0043, 0044, 0050 and 0066 of Chen et al.) Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FAZLI ERDEM whose telephone number is (571)272-1914. The examiner can normally be reached M-F, 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FAZLI ERDEM/Primary Examiner, Art Unit 2812 4/16/2026
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Prosecution Timeline

Sep 27, 2023
Application Filed
Nov 29, 2025
Non-Final Rejection (signed) — §103
Jan 15, 2026
Non-Final Rejection mailed — §103
Apr 15, 2026
Response Filed
Apr 21, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+15.8%)
2y 5m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1062 resolved cases by this examiner. Grant probability derived from career allowance rate.

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