Prosecution Insights
Last updated: July 17, 2026
Application No. 18/374,200

LATERAL HIGH VOLTAGE SCR WITH INTEGRATED NEGATIVE STRIKE DIODE

Non-Final OA §102§103§112
Filed
Sep 28, 2023
Priority
Jan 13, 2021 — provisional 63/136,841 +1 more
Examiner
LI, MEIYA
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
1 (Non-Final)
69%
Grant Probability
Favorable
1-2
OA Rounds
9m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 69% — above average
69%
Career Allowance Rate
641 granted / 931 resolved
+0.9% vs TC avg
Strong +26% interview lift
Without
With
+25.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
50 currently pending
Career history
982
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
65.6%
+25.6% vs TC avg
§102
15.9%
-24.1% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 931 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of species II, claim 1-20, in the reply filed on February 17, 2026 is acknowledged. Claims 5, 11 and 12 have been withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species. There is no support in the elected embodiment of Figs. 4 and 7 for the claim limitations of “the trench region including a conductive material”, as recited in claim 5, “the first concentric semiconductor region and the second concentric semiconductor region are in a third concentric semiconductor region of the concentric semiconductor regions”, as recited in claim 11; and these features are found on unelected embodiment of Figs. 10 and 11, respectively. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the ‘first distance” (claim 8), “third distance” and “fourth distance” (claim 10) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters "206" and "208" have both been used to designate “trench region”; reference characters "1002" and "1004" have both been used to designate “p-type junction isolation region”. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The disclosure is objected to because of the following informalities: “218/222 region” should read “region 218/222” (page 10, line 5); “216/220 region” should read “region 216/220” (page 10, line 3). Appropriate correction is required. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-4, 6-10 and 13-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation "the first and second semiconductor regions" in lines 8-9. There is insufficient antecedent basis for this limitation in the claim. Also, it is unclear as to whether said limitation is the same as or different from “a first semiconductor region” and/or “a second semiconductor region”, as recited in claim 1, lines 2 and 3. Claim 17 recites the limitation "the n-type and p-type second semiconductor regions" in lines 9-10. There is insufficient antecedent basis for this limitation in the claim. Also, it is unclear as to whether said limitation is the same as or different from “an n-type semiconductor region” and/or “a p-type second semiconductor region”, as recited in claim 17, lines 2 and 3. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 6, 7, 9, 10, 13, 16-20, as best understood, is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yam et al. (2018/0301445). As for claims 1 and 17, Yam et al. show in Figs. 5-8, 9A-9C, 12 and related text a silicon controlled rectifier (SCR), comprising: (a first) an n-type semiconductor region 30; a (second) p-type semiconductor region 54, the (second) p-type semiconductor region circumscribing the (first) n-type semiconductor region; an n-type electrically non-contacted semiconductor region (left one of) 38 adjacent to a first side of the (second) p-type semiconductor region; an n-type electrically contacted semiconductor region (right one of) 32 adjacent to a second side of the (second) p-type semiconductor region opposite the first side; and concentric semiconductor regions 62/34 surround the (first) n-type and (second) p-type semiconductor regions, the n-type electrically non-contacted semiconductor region, and the n-type electrically contacted semiconductor region. As for claims 2 and 18, Yam et al. show the n-type electrically non-contacted semiconductor region has a first linear shape from a plan perspective; and the n-type electrically contacted semiconductor region has a second linear shape from the plan perspective, wherein the first linear shape is parallel to the second linear shape (Fig. 12). As for claim 3, Yam et al. show the first linear shape has a first dimension parallel to the first side of the second semiconductor region; and the second linear shape has a second dimension parallel to the second side of the second semiconductor region, wherein the first dimension is greater than the second dimension (Fig. 12). As for claim 4, Yam et al. show an anode A of the SCR is coupled to the first semiconductor region and (electrically) to the electrically contacted semiconductor region; and a cathode K of the SCR is coupled to the concentric semiconductor regions (Fig. 5). As for claims 6 and 19, Yam et al. show the (second) p-type semiconductor region provides an emitter for a PNP bipolar junction transistor (BJT) of the SCR; a (first) p-type concentric semiconductor region 34 of the concentric semiconductor regions provides a collector of the PNP BJT; and the n-type electrically non-contacted semiconductor region is positioned between the (first) p-type concentric semiconductor region and the (second) p-type semiconductor region (Figs. 5 and 7). As for claims 7 and 20, Yam et al. show the (first) n-type semiconductor region provides a collector for an NPN bipolar junction transistor (BJT) of the SCR; (a second) an n-type concentric semiconductor region 62 of the concentric semiconductor regions provides an emitter of the NPN BJT; and the n-type electrically non-contacted semiconductor region is positioned between the n-type semiconductor region and the n-type concentric semiconductor region (Figs. 5 and 7. As for claim 8, Yam et al. show the electrically non-contacted semiconductor region is positioned at a first distance from a first concentric semiconductor region of the concentric semiconductor regions; and the electrically contacted semiconductor region is positioned at a second distance from the first concentric semiconductor region, the second distance greater than the first distance (Fig. 12). As for claim 10, Yam et al. show the electrically non-contacted semiconductor region is positioned at a third distance from a second concentric semiconductor region of the concentric semiconductor regions, the third distance greater than the first distance; and the electrically contacted semiconductor region is positioned at a fourth distance from the second concentric semiconductor region of the concentric semiconductor regions, the fourth distance greater than the second distance and the third distance (Fig. 12). As for claim 13, Yam et al. show the electrically non-contacted semiconductor region is configured to facilitate a snapback operation of the SCR; and the electrically contacted semiconductor region is configured to facilitate a diodic operation of the SCR (Figs. 5-8, 9A-9C). As for claim 16, Yam et al. show the snapback operation is in response to a first electrostatic discharge pulse at the first semiconductor region, the first electrostatic discharge pulse having a first polarity; and the diodic operation is in response to a second electrostatic discharge pulse at the first semiconductor region, the second electrostatic discharge pulse having a second polarity opposite the first polarity (Fig. 8). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 9, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Yam et al. (2018/0301445). Yam et al. disclosed substantially the entire claimed invention, as applied to claim 8 above, except the second distance is greater than the first distance by a factor of two to three. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include the second distance being greater than the first distance by a factor of two to three, in order to optimize the performance of the device. Furthermore, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Furthermore, it has been held in that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art. Claim(s) 14, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Yam et al. (2018/0301445) in view of Huang et al. (2018/0323184). Yam et al. disclosed substantially the entire claimed invention, as applied to claim 13 above, including the snapback operation includes a breakdown of a junction between a first concentric semiconductor region of the concentric semiconductor regions and a layer 64 in which the first concentric semiconductor region is located. Yam et al. do not disclose the layer is an epi layer. Huang et al. teach in Figs. 2A-2B and related text an epi layer 202. Yam et al. and Huang et al. are analogous art because they are directed to a SCR and one of ordinary skill in the art would have had a reasonable expectation of success to modify Yam et al. with the specified feature(s) of Huang et al. because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, at the time the invention was made to include an epi layer, as taught by Huang et al., in Yam et al.'s device, in order to reduce latch-up susceptibility and improve the performance of the device. Allowable Subject Matter Claim 15 is allowed. The following is a statement of reasons for the indication of allowable subject matter: The prior art of record does not teach or suggest, singularly or in combination, at least the limitations of “the diodic operation includes forward-biasing a diode formed between a first concentric semiconductor region of the concentric semiconductor regions and the electrically contacted semiconductor region”, as recited in claim 15. Claim 15 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MEIYA LI whose telephone number is (571)270-1572. The examiner can normally be reached Monday-Friday 7AM-3PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LYNNE GURLEY can be reached at (571)272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MEIYA LI/Primary Examiner, Art Unit 2811
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Prosecution Timeline

Sep 28, 2023
Application Filed
May 20, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
69%
Grant Probability
94%
With Interview (+25.5%)
3y 7m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 931 resolved cases by this examiner. Grant probability derived from career allowance rate.

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