Prosecution Insights
Last updated: May 29, 2026
Application No. 18/374,205

SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF

Non-Final OA §102
Filed
Sep 28, 2023
Priority
Sep 30, 2022 — CN 202211211339.7
Examiner
BOOTH, RICHARD A
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Semiconductor Manufacturing International (Shanghai) Corporation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
887 granted / 1038 resolved
+17.5% vs TC avg
Moderate +8% lift
Without
With
+8.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
32 currently pending
Career history
1076
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
83.1%
+43.1% vs TC avg
§102
5.9%
-34.1% vs TC avg
§112
3.6%
-36.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1038 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of group I in the reply filed on 01/15/26 is acknowledged. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wu, US 2021/0083041. Wu shows the invention as claimed including a semiconductor structure, comprising: A substrate (121/122), wherein the substrate includes a first region (a region extending larger than Wa in the left direction), a second region (a region at least slightly smaller than Wc at both the left and right boundaries), and a third region (extending larger than region Wb in the right direction), and the second region is located between the first region and the third region; A first electrode layer 21 disposed over the first region and the second region; A first dielectric layer 10 disposed on a top surface and sidewall surfaces of the first electrode layer as well as on a surface of the third region; A second electrode layer 23 disposed on a surface of the first dielectric layer over the third region and the second region, wherein the second electrode layer exposes the first electrode layer over the first region; A second dielectric layer 10 disposed on a top surface and sidewall surfaces of the second electrode layer as well as over a surface of the first electrode layer over the first region; A third electrode layer 29 disposed on a surface of the second dielectric layer, wherein the third electrode layer is located over the second region and is extended to a portion of each of the third region and the first region, and the third electrode layer exposes a portion of the first electrode layer over the first region and a portion of the second electrode layer over the third region; and A first plug 93a disposed over the first region and a second plug 93b disposed over the third region, wherein: The first plug 93a is electrically connected with the first electrode layer 21, and the second plug 93b is electrically connected with the second electrode 23 and the third electrode layer 29 (see, for example, fig. 2b and paragraphs 0035-0046). Concerning dependent claim 2, note that in Wu the first dielectric layer is made of a dielectric material which can be hafnium oxide or aluminum oxide and the second dielectric layer is made of a dielectric material which can also be hafnium oxide or aluminum oxide (see paragraph 0020). With respect to dependent claim 3, note that the first-third electrode layers can be composed of copper (see paragraph 0016). Concerning dependent claim 4, note that Wu discloses an etch stop layer 123 disposed between the first electrode and the substrate, wherein the etch stop layer is formed of silicon nitride (see paragraph 0017). As to dependent claim 5, Wu discloses wherein a thickness of the first and second dielectric layers can be, for example, sixty angstroms (see paragraph 0020) which is a point within the claimed range and therefore anticipates the claim. Concerning dependent claim 6, note that Wu discloses a dielectric structure disposed over the substrate, wherein: The first electrode layer, the second electrode layer, and the third electrode layer are located in the dielectric structure, The dielectric structure 125 includes a first opening over the first region (see plug 93a) and a second opening (see plug 93b) over the third region, wherein: the first opening exposes a portion of the surface of the first electrode layer 21, and the second opening exposes a portion of the surface of the second electrode layer 23 and a portion of the surface of the third electrode layer 29, and the first plug is located in the first opening, and the second plug is located in the second opening (see fig. 2B and its description). As to dependent claim 7, note that Wu discloses the first plug includes a first adhesion layer 95 on sidewall and bottom surfaces of the first opening, and a first metal layer 93a on the first adhesion layer; and the second plug includes a second adhesion layer 95 on sidewall and bottom surfaces of the second opening, and a second metal layer 93b on the second adhesion layer (see fig. 2B and its description and paragraph 0025). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to RICHARD A BOOTH whose telephone number is (571)272-1668. The examiner can normally be reached Monday to Friday, 8:30 to 5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at 571-272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RICHARD A BOOTH/ Primary Examiner, Art Unit 2812 March 20, 2026
Read full office action

Prosecution Timeline

Sep 28, 2023
Application Filed
Apr 01, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
94%
With Interview (+8.3%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1038 resolved cases by this examiner. Grant probability derived from career allowance rate.

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