DETAILED ACTION
This is in response to communication received on 10/3/23.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, and 4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chatterjee et al. US PGPub 2014/0073144 hereinafter CHATTERJEE.
As for claim 1, CHATTERJEE teaches “The method deposits a silicon-containing film by chemical vapor deposition using a local plasma… A silicon precursor (e.g. a silylamine, higher order silane or halogenated silane) is delivered to the substrate processing region and excited in a local plasma” (abstract, lines 1-7), i.e. A semiconductor processing method comprising: providing a silicon-containing precursor to a processing region of a semiconductor processing chamber.
CHATTERJEE teaches “The patterned substrate may have a plurality of gaps for the spacing and structure of device components (e.g., transistors) formed on the substrate” (paragraph 31, lines 1-3), i.e. wherein a substrate comprising one or more features is housed within the processing region.
CHATTERJEE teaches “A second plasma vapor or gas is combined with the silicon precursor in the substrate processing region and may include… hydrogen (H2)” (abstract, lines 7-10), i.e. providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber.
CHATTERJEE teaches “Plasma excitation is provided by applying radio-frequency power to capacitive plates on either side of the substrate processing region 106” (paragraph 17, lines 9-12), and “The method deposits a silicon-containing film by chemical vapor deposition using a local plasma” (abstract, lines 1-3), i.e. forming plasma effluents of the silicon-containing precursor and the hydrogen- containing precursor; and depositing a silicon-containing material on the substrate.
CHATTERJEE teaches “The process produces transient species which result in a flowable film during deposition before the film solidifies to fill gaps in a patterned substrate” (paragraph 7, lines 15-17), i.e. wherein the silicon-containing material extends into the one or more features.
As for claim 2, CHATTERJEE Teaches “A silicon precursor (e.g. a silylamine, higher order silane or halogenated silane) is delivered to the substrate processing region and excited in a local plasma” (abstract, lines 4-7) and “wherein the silicon precursor comprises a higher order silane containing three or more silicon atoms” (claim 5), i.e. wherein the silicon-containing precursor comprises… trisilane (Si3H8).
As for claim 4, CHATTERJEE teaches “A second plasma vapor or gas is combined with the silicon precursor in the substrate processing region and may include… hydrogen (H2)” (abstract, lines 7-10), i.e. wherein the hydrogen-containing precursor comprises diatomic hydrogen (H2).
Claim(s) 1, 2, 4, 7, 9, 10 and 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jiang et al. US PGPub 2022/0020594 hereinafter JIANG.
As for claim 1, JIANG teaches “A processing method comprising: forming a plasma of a silicon-containing precursor; depositing a flowable film on a semiconductor substrate with plasma eflluents of the silicon-containing precursor, wherein the semiconductor substrate is housed in a processing region of a semiconductor processing chamber, wherein the semiconductor substrate defines a feature within the semiconductor substrate” (claim 1, lines 1-8), i.e. a semiconductor processing method comprising: providing a silicon-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate comprising one or more features is housed within the processing region… forming plasma effluents of the silicon-containing precursor… depositing a silicon-containing material on the substrate.
JIANG teaches “forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber” (claim 1, lines 12-14), i.e. providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber; forming plasma effluents of… the hydrogen- containing precursor.
JIANG teaches “The deposited materials may at least partially flow into the features on the substrate to provide a bottom-up type of gap fill” (paragraph 36, lines 5-7), i.e. depositing a silicon-containing material on the substrate… wherein the silicon-containing material extends into the one or more features.
As for claim 2, JIANG teaches “Silicon-containing precursors that may be used during either of the silicon oxide formation, silicon formation, or the silicon nitride formation may include, but are not limited to, silane (SiH4), disilane (Si2H6)” (paragraph 47, lines 3-7), i.e. wherein the silicon-containing precursor comprises silane (SiH4), disilane (Si2H6).
As for claim 4, JIANG teaches “Although any hydrogen-containing material may be used, in some embodiments diatomic hydrogen may be used as the hydrogen-containing precursor to produce the treatment plasma” (paragraph 39, lines 7-10), i.e. wherein the hydrogen-containing precursor comprises diatomic hydrogen (H2).
As for claim 7, JIANG teaches “A bias power may be applied to the substrate support from a bias power source at a second power level less than the first power level” (paragraph 4, lines 15-17), i.e. applying a bias power while forming plasma effluents of the silicon-containing precursor and the hydrogen-containing precursor, while depositing the silicon-containing material on the substrate, or both.
As for claim 9, JIANG teaches “The material may be a flowable silicon-containing material in some embodiments, which may be or include amorphous silicon” (paragraph 36, lines 3-5), i.e. wherein the silicon-containing material is amorphous silicon.
As for claim 10, JIANG teaches “Pressure within the chamber may be kept relatively low for any of the processes as well, such as at a chamber pressure of… less than or about 5 Torr” (paragraph 48, lines 10-14), i.e. wherein a pressure in the semiconductor processing chamber is maintained at leass than or about 5 torr.
As for claim 18, JIANG teaches “A processing method comprising: forming a plasma of a silicon-containing precursor; depositing a flowable film on a semiconductor substrate with plasma eflluents of the silicon-containing precursor, wherein the semiconductor substrate is housed in a processing region of a semiconductor processing chamber, wherein the semiconductor substrate defines a feature within the semiconductor substrate” (claim 1, lines 1-8), i.e. a semiconductor processing method comprising: providing a silicon-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate comprising one or more features is housed within the processing region… forming plasma effluents of the silicon-containing precursor.
JIANG teaches “forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber” (claim 1, lines 12-14), i.e. providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber; forming plasma effluents of… the hydrogen- containing precursor.
JIANG teaches “A bias power may be applied to the substrate support from a bias power source at a second power level less than the first power level” (paragraph 4, lines 15-17), i.e. applying a bias power to a pedestal supporting the substrate.
JIANG teaches “The deposited materials may at least partially flow into the features on the substrate to provide a bottom-up type of gap fill” (paragraph 36, lines 5-7), and “The material may be a flowable silicon-containing material in some embodiments, which may be or include amorphous silicon” (paragraph 36, lines 3-5), i.e. depositing amorphous silicon on the substrate, wherein the amorphous silicon extends into the one or more features.
As for claim 19, JIANG teaches “Additionally, aspects of the bias power may also be adjusted. For example, while in some treatment operations, a bias power may be higher than a plasma source power, in some embodiments of the present technology the bias power may be maintained below the plasma power” (paragraph 40, lines 12-17), i.e. wherein the bias power is greater than or about a source power used to form plasma effluents of the silicon- containing precursor and the hydrogen-containing precursor.
As for claim 20, JIANG is silent on including halogen in the deposition of the amorphous silicon and thus, wherein the processing region is maintained halogen-free while depositing the amorphous silicon on the substrate.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 3 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Jiang et al. US PGPub 2022/0020594 hereinafter JIANG.
As for claim 3, JIANG teaches “the features may be characterized by narrow widths or diameters across the feature including between two sidewalls, such as a dimension less than or about 20 nm” (paragraph 34, lines 11-13), i.e. a range that overlaps with wherein the one or more features are characterized by a critical dimension of less than or about 50 nm. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d, 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
As for claim 6, JIANG teaches “The plasma power in some embodiments may be greater than a plasma power used during the deposition. For example, the plasma power delivered may be greater than or about 100 W” (paragraph 40, lines 4-7), i.e. a range that overlaps wherein the plasma effluents of the silicon-containing precursor and the hydrogen-containing precursor are formed at a plasma power of less than or about 500 W. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d, 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
As for claim 8, JIANG teaches “the bias power may be maintained below the plasma power, such as below or about 500 W” (paragraph 40, lines 16-17), i.e. a range that overlaps with wherein the bias power is greater than or about 250 W. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d, 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
Claim(s) 5, and 11-17 are rejected under 35 U.S.C. 103 as being unpatentable over Jiang et al. US PGPub 2022/0020594 hereinafter JIANG as applied to claim 1 above, and further in view of Li et al. US PGPub 2022/0375747 hereinafter LI.
As for claim 5, JIANG is silent on wherein a flow rate ratio of the silicon-containing precursor relative to the hydrogen-containing precursor is less than or about 1:8.
LI teaches “Processing methods disclosed herein comprise forming a nucleation layer and a flowable chemical vapor deposition (FCVD) film on a substrate surface by exposing the substrate surface to a silicon-containing precursor and a reactant. By controlling at least one of a precursor/reactant pressure ratio, a precursor/reactant flow ratio and substrate temperature formation of miniature defects is minimized” (abstract, lines 1-7) and “In some embodiments, the FCVD film is formed by plasma-enhanced chemical vapor deposition (PECVD)” (paragraph 27, lines 3-5).
LI teaches “In one or more embodiments, initial nucleation smoothness can be further improved by changing the order in which the reactants are introduced, changing the flow ratio of the reactants, and by changing the reactants retention time in the chamber during deposition” (paragraph 18, lines 8-13), and “As used herein, "process parameter" includes at least one of a precursor/reactant pressure ratio, a precursor/reactant flow ratio and substrate temperature. The method 300 comprises at operation 340 curing the FCVD film” (paragraph 35, lines 8-12), i.e. wherein the ratio of reactants is a result effective variable.
It would have been obvious to one of ordinary skill in the art before the effective filing date to design the flow rate ratio such that the desired smoothness is achieved. Discovery of optimum value of result effective variable in known process is ordinarily within the skill of the art. In re Boesch, CCPA 1980, 617 F.2d 272, 205 USPQ215.
As for claim 11, JIANG teaches “A processing method comprising: forming a plasma of a silicon-containing precursor; depositing a flowable film on a semiconductor substrate with plasma eflluents of the silicon-containing precursor, wherein the semiconductor substrate is housed in a processing region of a semiconductor processing chamber, wherein the semiconductor substrate defines a feature within the semiconductor substrate” (claim 1, lines 1-8), i.e. a semiconductor processing method comprising: providing a silicon-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate comprising one or more features is housed within the processing region… forming plasma effluents of the silicon-containing precursor… depositing a silicon-containing material on the substrate.
JIANG teaches “forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber” (claim 1, lines 12-14), i.e. providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber; forming plasma effluents of… the hydrogen- containing precursor.
JIANG is silent on wherein a flow rate ratio of the silicon-containing precursor relative to the hydrogen-containing precursor is less than or about 1:8.
LI teaches “Processing methods disclosed herein comprise forming a nucleation layer and a flowable chemical vapor deposition (FCVD) film on a substrate surface by exposing the substrate surface to a silicon-containing precursor and a reactant. By controlling at least one of a precursor/reactant pressure ratio, a precursor/reactant flow ratio and substrate temperature formation of miniature defects is minimized” (abstract, lines 1-7) and “In some embodiments, the FCVD film is formed by plasma-enhanced chemical vapor deposition (PECVD)” (paragraph 27, lines 3-5).
LI teaches “In one or more embodiments, initial nucleation smoothness can be further improved by changing the order in which the reactants are introduced, changing the flow ratio of the reactants, and by changing the reactants retention time in the chamber during deposition” (paragraph 18, lines 8-13), and “As used herein, "process parameter" includes at least one of a precursor/reactant pressure ratio, a precursor/reactant flow ratio and substrate temperature. The method 300 comprises at operation 340 curing the FCVD film” (paragraph 35, lines 8-12), i.e. wherein the ratio of reactants is a result effective variable.
It would have been obvious to one of ordinary skill in the art before the effective filing date to design the flow rate ratio such that the desired smoothness is achieved. Discovery of optimum value of result effective variable in known process is ordinarily within the skill of the art. In re Boesch, CCPA 1980, 617 F.2d 272, 205 USPQ215.
JIANG teaches “The deposited materials may at least partially flow into the features on the substrate to provide a bottom-up type of gap fill” (paragraph 36, lines 5-7), i.e. depositing a silicon-containing material on the substrate… wherein the silicon-containing material extends into the one or more features.
As for claim 12, JIANG is silent on the flow rate.
LI teaches “In one or more embodiments, initial nucleation smoothness can be further improved by changing the order in which the reactants are introduced, changing the flow ratio of the reactants, and by changing the reactants retention time in the chamber during deposition” (paragraph 18, lines 8-13), and “As used herein, "process parameter" includes at least one of a precursor/reactant pressure ratio, a precursor/reactant flow ratio and substrate temperature. The method 300 comprises at operation 340 curing the FCVD film” (paragraph 35, lines 8-12), i.e. wherein the ratio of reactants is a result effective variable.
It would have been obvious to one of ordinary skill in the art before the effective filing date to design the flow rate such that the desired smoothness is achieved. Discovery of optimum value of result effective variable in known process is ordinarily within the skill of the art. In re Boesch, CCPA 1980, 617 F.2d 272, 205 USPQ215.
As for claim 13, JIANG teaches “A bias power may be applied to the substrate support from a bias power source at a second power level less than the first power level” (paragraph 4, lines 15-17), i.e. wherein forming plasma effluents of the silicon-containing precursor and the hydrogen-containing precursor comprises applying a source power to a pedestal supporting the substrate.
As for claim 14, JIANG teaches “A bias power may be applied to the substrate support from a bias power source at a second power level less than the first power level” (paragraph 4, lines 15-17), and “The duty cycle of the bias power may be less than or about 75%, and the bias power may be operated at a duty cycle of less than or about 70%, less than or about 60%, less than or about 50%, less than or about 40%, less than or about 30%, less than or about 200/o, less than or about 10%, less than or about 5%, or less” (paragraph 42, lines 16-21), i.e. a range that overlaps with applying a bias power to a pedestal supporting the substrate, wherein the bias 3 power is pulsed at a duty cycle less than or about 25%. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d, 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
As for claim 15, JIANG teaches “Applying greater bias may increase a directionality of delivery perpendicular to a plane across the substrate. Accordingly, by reducing the bias power supplied, the amount of directionality may reduce, which may increase interaction of the plasma effluents within the feature. The plasma effluents may then etch the flowable film at operation 220” (paragraph 41, lines 1-7), i.e. wherein etching silicon-containing material from sidewalls of the one or more features with the plasma effluents of the hydrogen-containing precursor while depositing the silicon-containing material on the substrate.
As for claim 16, JIANG teaches “The deposited materials may at least partially flow into the features on the substrate to provide a bottom-up type of gap fill” (paragraph 36, lines 5-7), i.e. wherein depositing the silicon-containing material on the substrate fills the one or more features in a single operation.
As for claim 17, JIANG teaches “Additionally, in some embodiments where the silicon may be sought to be converted within the feature, the cycling may also include a conversion operation” (paragraph 44, lines 1-3) and “At optional operation 230, plasma effluents of the conversion precursor may interact with the amorphous silicon material within the trench, and convert the material to silicon nitride, silicon oxide, silicon carbide, silicon oxynitride, silicon oxycarbide, silicon carbon nitride, or silicon oxycarbonitride, along with any other materials that may be used to convert amorphous silicon films” (paragraph 45, lines 11-18), i.e. converting the silicon-containing material to a silicon-and-oxygen-containing material, a silicon-and-carbon-containing material, or a silicon-and-nitrogen-containing material.
Claim(s) 3, 5, 6, 10-12, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Chatterjee et al. US PGPub 2014/0073144 hereinafter CHATTERJEE as applied to claim 1 above.
As for claim 3, CHATTERJEE teaches “The gaps may have a height and width that define an aspect ratio (AR) of the height to the width (i.e., H/W) that is significantly greater than 1: 1 (e.g., 5:1 or more, 6:1 or more, 7:1 or more, 8:1 or more, 9:1 many instances the high AR is due to small gap widths of that range from about 90 nm to about 22 nm or less ( e.g., less than 90 nm, 65 nm, 50 nm, 45 nm, 32 nm, 22 nm, 16 nm, etc.)” (paragraph 31, lines 3-10), i.e. a range that overlaps with wherein the one or more features are characterized by a critical dimension of less than or about 50 nm. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d, 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
As for claim 5, CHATTERJEE teaches “The flow rates of a silicon precursor may be greater than or about 40 sccm, greater than or about 60 sccm or greater than or about 100 sccm in different embodiments” (paragraph 19, lines 11-13) and “The flow rate of the plasma vapor/gas may be greater than or about 25 sccm, greater than or about 40 sccm or greater than or about 50 sccm in disclosed embodiments” (paragraph 20, lines 11-13). It is expected that a person of ordinary skill in the art at the time of the invention could have converted the separate flow rates to a ratio of flowrates, which overlap with the instant claimed range. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d, 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
As for claim 6, CHATTERJEE teaches “The plasma power is relatively low to cause the formation of flow-inducing chemical transients in the forming film. For a 300 mm substrate, the power may be in the 10-350 W” (paragraph 21, lines 8-10), i.e. a range that overlaps with wherein the plasma effluents of the silicon-containing precursor and the hydrogen-containing precursor are formed at a plasma power of less than or about 500 W. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d, 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
As for claim 10, CHATTERJEE teaches “The pressure in the substrate processing region during the deposition may be greater than or about 5 Torr” (paragraph 28, lines 1-2), i.e. a range that touches with wherein a pressure in the semiconductor processing chamber is maintained at less than or about 5 Torr. When a composition with a touching or overlapping range is found in the prior art, this is considered sufficient to support a holding of obviousness. In re Malagari. 182 USPQ 549.
As for claim 11, CHATTERJEE teaches “The method deposits a silicon-containing film by chemical vapor deposition using a local plasma… A silicon precursor (e.g. a silylamine, higher order silane or halogenated silane) is delivered to the substrate processing region and excited in a local plasma” (abstract, lines 1-7), i.e. A semiconductor processing method comprising: providing a silicon-containing precursor to a processing region of a semiconductor processing chamber.
CHATTERJEE teaches “The patterned substrate may have a plurality of gaps for the spacing and structure of device components (e.g., transistors) formed on the substrate” (paragraph 31, lines 1-3), i.e. wherein a substrate comprising one or more features is housed within the processing region.
CHATTERJEE teaches “A second plasma vapor or gas is combined with the silicon precursor in the substrate processing region and may include… hydrogen (H2)” (abstract, lines 7-10), i.e. providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber.
CHATTERJEE teaches “The flow rates of a silicon precursor may be greater than or about 40 sccm, greater than or about 60 sccm or greater than or about 100 sccm in different embodiments” (paragraph 19, lines 11-13) and “The flow rate of the plasma vapor/gas may be greater than or about 25 sccm, greater than or about 40 sccm or greater than or about 50 sccm in disclosed embodiments” (paragraph 20, lines 11-13). It is expected that a person of ordinary skill in the art at the time of the invention could have converted the separate flow rates to a ratio of flowrates, which overlap with the instant claimed range. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d, 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
CHATTERJEE teaches “Plasma excitation is provided by applying radio-frequency power to capacitive plates on either side of the substrate processing region 106” (paragraph 17, lines 9-12), and “The method deposits a silicon-containing film by chemical vapor deposition using a local plasma” (abstract, lines 1-3), i.e. forming plasma effluents of the silicon-containing precursor and the hydrogen- containing precursor; and depositing a silicon-containing material on the substrate.
CHATTERJEE teaches “The process produces transient species which result in a flowable film during deposition before the film solidifies to fill gaps in a patterned substrate” (paragraph 7, lines 15-17), i.e. wherein the silicon-containing material extends into the one or more features.
As for claim 12, CHATTERJEE teaches “The flow rates of a silicon precursor may be greater than or about 40 sccm, greater than or about 60 sccm or greater than or about 100 sccm in different embodiments” (paragraph 19, lines 11-13), i.e. a range that overlaps with a flow rate of the silicon-containing precursor is less than or about 400 sccm. It is expected that a person of ordinary skill in the art at the time of the invention could have converted the separate flow rates to a ratio of flowrates, which overlap with the instant claimed range. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d, 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
As for claim 16, CHATTERJEE teaches “The flowable dielectric layer is desirable since it can fill the exemplary narrow gaps more easily than non-flowablefilms or bulk flowable films using spin-on techniques, such as spin-on glass (SOG) and spin-on dielectric (SOD)” (paragraph 31, lines 10-14), i.e. wherein depositing the silicon-containing material on the substrate fills the one or more features in a single operation.
Claim(s) 7, 8, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Chatterjee et al. US PGPub 2014/0073144 hereinafter CHATTERJEE as applied to claim 1 and 11 above in view of Gadre et al. US PGPub 2018/0350596 hereinafter GADRE.
As for claim 7, CHATTERJEE is silent on applying a bias power while forming plasma effluents of the silicon-containing precursor and the hydrogen-containing precursor, while depositing the silicon-containing material on the substrate, or both.
However, CHATTERJEE does teach “As described in the example, the plasma may be ignited using a capacitively coupled plasma (CCP) configuration using radio frequencies near 13.56 MHz” (paragraph 21, lines 1-3)
GADRE teaches “Implementations described herein will be described below in reference to a thermal CVD and/or plasma-enhanced chemical vapor deposition (PECVD) process that can be carried out using any suitable thin film deposition system” (paragraph 18, lines 1-5).
GADRE teaches “One or more RF power sources 140 provide a bias potential through a matching network 138 to the showerhead 120 to facilitate generation of plasma between the showerhead 120 and the support pedestal 150. Alternatively, the RF power sources 140 and matching network 138 may be coupled to the showerhead 120, the support pedestal 150, or coupled to both the showerhead 120 and the support pedestal 150, or coupled to an antenna (not shown) disposed exterior to the process chamber 100” (paragraph 26, lines 3-11), i.e. wherein applying a bias power from a source is a part of forming a plasma for producing plasma effluents.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include applying a bias power while forming plasma effluents of the silicon-containing precursor and the hydrogen-containing precursor, while depositing the silicon-containing material on the substrate, or both in the process of CHATTERJEE because GADRE teaches that such a step is necessary for producing the plasma.
As for claim 8, CHATTERJEE is silent on wherein the bias power is greater than or about 250 W.
However, CHATTERJEE does teach “As described in the example, the plasma may be ignited using a capacitively coupled plasma (CCP) configuration using radio frequencies near 13.56 MHz” (paragraph 21, lines 1-3)
GADRE teaches “Implementations described herein will be described below in reference to a thermal CVD and/or plasma-enhanced chemical vapor deposition (PECVD) process that can be carried out using any suitable thin film deposition system” (paragraph 18, lines 1-5).
GADRE teaches “One or more RF power sources 140 provide a bias potential through a matching network 138 to the showerhead 120 to facilitate generation of plasma between the showerhead 120 and the support pedestal 150. Alternatively, the RF power sources 140 and matching network 138 may be coupled to the showerhead 120, the support pedestal 150, or coupled to both the showerhead 120 and the support pedestal 150, or coupled to an antenna (not shown) disposed exterior to the process chamber 100. In one implementation, the RF power sources 140 may provide between about 100 Watts and about 3,000 Watts at a frequency of about 50 kHz to about 13.6 MHz.” (paragraph 26, lines 3-14), i.e. a range that overlaps with wherein the bias power is greater than or about 250 W. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d, 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include a range that overlaps with wherein the bias power is greater than or about 250 W in the process of CHATTERJEE because GADRE teaches that such a step is necessary for producing the plasma and capable of producing a plasma at the frequency desired by CHATTERJEE.
As for claim 13, CHATTERJEE is silent on wherein forming plasma effluents of the silicon-containing precursor and the hydrogen-containing precursor comprises applying a source power to a pedestal supporting the substrate.
However, CHATTERJEE does teach “As described in the example, the plasma may be ignited using a capacitively coupled plasma (CCP) configuration using radio frequencies near 13.56 MHz” (paragraph 21, lines 1-3).
GADRE teaches “Implementations described herein will be described below in reference to a thermal CVD and/or plasma-enhanced chemical vapor deposition (PECVD) process that can be carried out using any suitable thin film deposition system” (paragraph 18, lines 1-5).
GADRE teaches “One or more RF power sources 140 provide a bias potential through a matching network 138 to the showerhead 120 to facilitate generation of plasma between the showerhead 120 and the support pedestal 150. Alternatively, the RF power sources 140 and matching network 138 may be coupled to the showerhead 120, the support pedestal 150, or coupled to both the showerhead 120 and the support pedestal 150, or coupled to an antenna (not shown) disposed exterior to the process chamber 100” (paragraph 26, lines 3-11), i.e. wherein applying a bias power from a source is a part of forming a plasma for producing plasma effluents including a pedestal supporting the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include wherein forming plasma effluents of the silicon-containing precursor and the hydrogen-containing precursor comprises applying a source power to a pedestal supporting the substrate in the process of CHATTERJEE because GADRE teaches that such a step is necessary for producing the plasma and that sources can be coupled to the substrate to do so.
Claim(s) 9, 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chatterjee et al. US PGPub 2014/0073144 hereinafter CHATTERJEE as applied to claim 1 and 11 above in view of Jiang et al. US PGPub 2022/0020594 hereinafter JIANG.
As for claim 9, CHATTERJEE is silent on wherein the silicon-containing material is amorphous silicon.
JIANG teaches “Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor” (abstract, liens 1-5).
JIANG further teaches “Amorphous silicon may be used in semiconductor device manufacturing for a number of structures and processes, including as a sacrificial material, for example as a dummy gate material, or as a trench fill material” (paragraph 17, lines 1-4), i.e. wherein filling is with amorphous silicon.
It would have been obvious to one of ordinary skill in the art before the effective filing date to apply amorphous silicon in the process of CHATTERJEE because JIANG teaches that such a material was a known gapfill material.
As for claim 18, CHATTERJEE teaches “The method deposits a silicon-containing film by chemical vapor deposition using a local plasma… A silicon precursor (e.g. a silylamine, higher order silane or halogenated silane) is delivered to the substrate processing region and excited in a local plasma” (abstract, lines 1-7), i.e. A semiconductor processing method comprising: providing a silicon-containing precursor to a processing region of a semiconductor processing chamber.
CHATTERJEE teaches “The patterned substrate may have a plurality of gaps for the spacing and structure of device components (e.g., transistors) formed on the substrate” (paragraph 31, lines 1-3), i.e. wherein a substrate comprising one or more features is housed within the processing region.
CHATTERJEE teaches “A second plasma vapor or gas is combined with the silicon precursor in the substrate processing region and may include… hydrogen (H2)” (abstract, lines 7-10), i.e. providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber.
CHATTERJEE teaches “Plasma excitation is provided by applying radio-frequency power to capacitive plates on either side of the substrate processing region 106” (paragraph 17, lines 9-12), and “The method deposits a silicon-containing film by chemical vapor deposition using a local plasma” (abstract, lines 1-3), i.e. forming plasma effluents of the silicon-containing precursor and the hydrogen- containing precursor; and depositing a silicon-containing material on the substrate.
CHATTERJEE teaches “The process produces transient species which result in a flowable film during deposition before the film solidifies to fill gaps in a patterned substrate” (paragraph 7, lines 15-17), i.e. wherein the silicon-containing material extends into the one or more features.
CHATTERJEE is silent on applying a bias power to the pedestal supporting the substrate and depositing amorphous silicon on the substrate.
JIANG teaches “Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor” (abstract, liens 1-5).
JIANG further teaches “Amorphous silicon may be used in semiconductor device manufacturing for a number of structures and processes, including as a sacrificial material, for example as a dummy gate material, or as a trench fill material” (paragraph 17, lines 1-4), i.e. wherein filling is with amorphous silicon.
JIANG further teaches “A bias power may be applied to the substrate support from a bias power source at a second power level less than the first power level” (paragraph 4, lines 15-17), i.e. wherein applying a bias power to a pedestal supporting the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date to depositing amorphous silicon on the substrate in the process of CHATTERJEE and applying a bias power to a pedestal supporting the substrate because JIANG teaches that such a material was a known gapfill material and that applying a bias to the pedestal produces the desired plasma of CHATTERJEE.
As for claim 19, CHATTERJEE is silent on wherein the bias power is greater than or about a source power used to form plasma effluents of the silicon- containing precursor and the hydrogen-containing precursor.
JIANG teaches “Applying greater bias may increase a directionality of delivery perpendicular to a plane across the substrate. Accordingly, by reducing the bias power supplied, the amount of directionality may reduce, which may increase interaction of the plasma effluents within the feature. The plasma effluents may then etch the flowable film at operation 220, and may remove the flowable film from the sidewalls of the trench” (paragraph 41, lines 1-8), i.e. wherein the bias is a result effective variable.
It would have been obvious to one of ordinary skill in the art before the effective filing date to design the bias of the pedestal such that the desired directionality and interaction is achieved. Discovery of optimum value of result effective variable in known process is ordinarily within the skill of the art. In re Boesch, CCPA 1980, 617 F.2d 272, 205 USPQ215.
As for claim 20, CHATTERJEE teaches “A silicon precursor (e.g. a silylamine, higher order silane or halogenated silane) is delivered to the substrate processing region and excited in a local plasma” (abstract, lines 4-7), i.e. wherein when the precursor is siliamine or a higher order silane wherein the processing region is maintained halogen-free while depositing the amorphous silicon on the substrate.
Claim(s) 14 is rejected under 35 U.S.C. 103 as being unpatentable over Chatterjee et al. US PGPub 2014/0073144 hereinafter CHATTERJEE as applied to claim 1 and 11 above in view of Jha et al. US PGpub 2016/0293609 hereinafter JHA and Gadre et al. US PGPub 2018/0350596 hereinafter GADRE.
As for claim 14, CHATTERJEE is silent on applying a bias power to a pedestal supporting the substrate, wherein the bias power is pulsed at a duty cycle less than or about 25%.
However, CHATTERJEE does teach “As described in the example, the plasma may be ignited using a capacitively coupled plasma (CCP) configuration using radio frequencies near 13.56 MHz” (paragraph 21, lines 1-3)
GADRE teaches “Implementations described herein will be described below in reference to a thermal CVD and/or plasma-enhanced chemical vapor deposition (PECVD) process that can be carried out using any suitable thin film deposition system” (paragraph 18, lines 1-5).
GADRE teaches “One or more RF power sources 140 provide a bias potential through a matching network 138 to the showerhead 120 to facilitate generation of plasma between the showerhead 120 and the support pedestal 150. Alternatively, the RF power sources 140 and matching network 138 may be coupled to the showerhead 120, the support pedestal 150, or coupled to both the showerhead 120 and the support pedestal 150, or coupled to an antenna (not shown) disposed exterior to the process chamber 100” (paragraph 26, lines 3-11), i.e. wherein applying a bias power from a source is a part of forming a plasma for producing plasma effluents.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include applying a bias power to a pedestal supporting the substrate in the process of CHATTERJEE because GADRE teaches that such a step is necessary for producing the plasma.
JHA teaches “The inventors have devised a unique deposition scheme that compensates for etch performance degradation in deep trenches by a novel plasma-enhanced chemical vapor deposition (PECVD) film deposition method” (paragraph 22, lines 5-8) and “At operation 222, the first film layer 3081 is formed on the substrate 302. The first film layer 3081 may be a silicon oxide-containing layer, a silicon nitride-containing layer, a silicon-containing layer, such as amorphous silicon, polycrystalline silicon or any suitable crystalline silicon layers” (paragraph 42, lines 1-6).
JHA further teaches “The RF source and/or bias power energizes the deposition gas mixture within the processing volume 120 such that the plasma may be sustained. In one implementation,
the first source of electric power 142 may be operated to provide RF power at a frequency between 0.3 MHz and about 14 MHz, such as about 13.56 MHz… In one implementation, the RF bias power may be pulsed with a duty cycle between about 10 to about 95 percent at a RF frequency between about 500 Hz and about 10 kHz” (paragraph 51), i.e. a range that overlaps with wherein the bias power is pulsed at a duty cycle less than or about 25%. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d, 1362, 1365-66 (Fed. Cir. 1997). See MPEP 2144.05.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include a range that overlaps with wherein the bias power is pulsed at a duty cycle less than or about 25% in the process of CHATTERJEE because JHA teaches that such a process produces a plasma as desired in CHATTERJEE.
Claim(s) 15-17 is rejected under 35 U.S.C. 103 as being unpatentable over Chatterjee et al. US PGPub 2014/0073144 hereinafter CHATTERJEE as applied to claim 1 and 11 above in view of Shanker et al. US Patent Number 7,514,375 hereinafter SHANKER.
As for claim 15, CHATTERJEE is silent on etching silicon-containing material from sidewalls of the one or more features with the plasma effluents of the hydrogen-containing precursor while depositing the silicon-containing material on the substrate.
SHANKER teaches “During bottom filling of high aspect ratio gaps and trenches in an integrated circuit substrate using HDP-CVD, a pulsed HF bias is applied to the substrate” (abstract, lines 1-3).
SHANKER teaches “In a HDP-CVD process, dielectric material deposited on the wafer surface is simultaneously sputter-etched, thereby helping to keep gaps open during the deposition process, which allows higher aspect ratio gaps to be filled” (column 3, lines 7-10), i.e. etching silicon-containing material from sidewalls of the one or more features with the plasma effluents of the hydrogen-containing precursor while depositing the silicon-containing material on the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date to include etching silicon-containing material from sidewalls of the one or more features with the plasma effluents of the hydrogen-containing precursor while depositing the silicon-containing material on the substrate in the process of CHATTERJEE because SHANKER teaches that such an etching step helps keep gaps open for more filling.
As for claim 16, CHATTERJEE teaches “The process produces transient species which result in a flowable film during deposition before the film solidifies to fill gaps in a patterned substrate” (paragraph 7, lines 15-17), i.e. wherein depositing the silicon-containing material on the substrate fills the one or more features in a single operation.
Claim(s) 17 is rejected under 35 U.S.C. 103 as being unpatentable over Chatterjee et al. US PGPub 2014/0073144 hereinafter CHATTERJEE and Shanker et al. US Patent Number 7,514,375 hereinafter SHANKER as applied to claim 11 and 15 above, and further in view of Jiang et al. US PGPub 2022/0020594 hereinafter JIANG.
As for claim 16, CHATTERJEE and SHANKER are silent on converting the silicon-containing material to a silicon-and-oxygen-containing material, a silicon-and-carbon-containing material, or a silicon-and-nitrogen-containing material.
JIANG teaches “Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The semiconductor substrate may define a feature within the semiconductor substrate. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber” (abstract, lines 1-9).
JIANG teaches “At optional operation 230, plasma effluents of the conversion precursor may interact with the amorphous silicon material within the trench, and convert the material to silicon nitride, silicon oxide, silicon carbide, silicon oxynitride, silicon oxycarbide, silicon carbon nitride, or silicon oxycarbonitride, along with any other materials that may be used to convert amorphous silicon films” (paragraph 45, lines 11-18) and “By converting during each cycle, penetration issues through the feature may be fully resolved” (paragraph 44, lines 3-5).
It would have been obvious to one of ordinary skill in the art before the effective filing date to include converting the silicon-containing material to a silicon-and-oxygen-containing material, a silicon-and-carbon-containing material, or a silicon-and-nitrogen-containing material in the process of CHATTERJEE because JIANG teaches that such a process allows for the reduction and removal of penetration issues.
Conclusion
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/KRISTEN A DAGENAIS/Examiner, Art Unit 1717