Prosecution Insights
Last updated: April 19, 2026
Application No. 18/376,823

APPARATUS FOR FABRICATING DISPLAY PANEL AND METHOD FOR FABRICATING THE SAME

Non-Final OA §101§102§112
Filed
Oct 04, 2023
Examiner
LAU, TUNG S
Art Unit
2857
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
3y 0m
To Grant
97%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
921 granted / 1112 resolved
+14.8% vs TC avg
Moderate +14% lift
Without
With
+14.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
38 currently pending
Career history
1150
Total Applications
across all art units

Statute-Specific Performance

§101
20.9%
-19.1% vs TC avg
§103
23.1%
-16.9% vs TC avg
§102
27.9%
-12.1% vs TC avg
§112
14.3%
-25.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1112 resolved cases

Office Action

§101 §102 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. DETAILED ACTION Claims status Claims 1-20 are pending as the applicant filed on 10/04/2023. Claim Rejections - 35 USC § 112 2. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claims 1-20, the terms “primary operation” “channel type” “primary learning parameters” “primary learning model” “secondary” “information is minimized” “primary” are vague and a relative term that renders the claim indefinite. The terms “primary operation” “channel type” “primary learning parameters” “primary learning model” “secondary” “information is minimized” “primary” are not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably appraised of the scope of the invention. An artisan doing measuring and testing would not know at what point “primary operation” “channel type” “primary learning parameters” “primary learning model” “secondary” “information is minimized” “primary” within the scope of the claim had been accomplished because nothing within the disclosure establishes when a sufficient “primary operation” “channel type” “primary learning parameters” “primary learning model” “secondary” “information is minimized” “primary” occur. Note: In view of the PTO compact prosecution, the Examiner notes that due to the indefiniteness issues described above all consideration of the merits of the claims in view of prior art is as best understood. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more. Claim 1, Step 1 the claim is a process (or machine) (Yes), Step 2A Prong One, does the claim recite an abstract idea? current claim related to an apparatus for fabricating a display panel, the apparatus comprising: a correction learning unit configured to classify the learning result data containing the primary operation characteristic information according to fabrication characteristics of sample switching transistors and a list of classifications appears is an abstract idea of mental process (MPEP 2106.04(a)) or data gathering equivalent to mathematical concept or mathematical manipulation function (MPEP 2106.04 (a) (2) (concept need not be expressed in mathematical symbols, because "[w]ords used in a claim operating on data to solve a problem can serve the same purpose as a formula), (OR Mathematical Concepts and Mental Processes) Step 2A Prong One: Yes. Step 2A Prong Two, is the claim directed to an abstract idea? In other words, does claim recite additional elements that integrate the Judicial Exception into a practical application? the additional elements of a model learning unit configured to correct at least one of the output current, the output voltage value and the threshold voltage range in the primary operation characteristic information using a learning program comprised in at least one learning model, and to extract correction results as learning result data recited at a high level of generality and merely amount to a particular field of use (see MPEP 2106.05(h)) and/or insignificant post-solution activity (MPEP 2106.05(g)), this does not integrate the Judicial Exception into a practical application, Step 2A Prong Two: NO. Step 2B, Does the claim recite additional element that amount to significantly more than the Judicial exception? the additional element of a sample module in which a switching transistor is formed; a measurement module having input/output terminals electrically connected to the switching transistor of the sample module; a characteristic detecting unit configured to detect primary operation characteristic information comprising an output current, an output voltage value and a threshold voltage range of the switching transistor appears to be field of use (See MPEP 2106.05(h) and MPEP 2106.05(f)) and/or merely amounts to insignificant extra-solution output of the results (see MPEP 2106.05(g)) and therefore fails to integrate the abstract idea into a practical application or amount to significantly more. Step 2B: No. claim 1 not eligible. Claim 15, Step 1 the claim is a process (or machine) (Yes), Step 2A Prong One, does the claim recite an abstract idea? current claim related to a method for fabricating a display panel, the method comprising: using at least one learning program for each learning model in a model learning unit to correct at least one of the output current, the output voltage value and the threshold voltage range in the primary operation characteristic information and extracting correction results as learning result data appears is an abstract idea of mental process (MPEP 2106.04(a)) or data gathering equivalent to mathematical concept or mathematical manipulation function (MPEP 2106.04 (a) (2) (concept need not be expressed in mathematical symbols, because "[w]ords used in a claim operating on data to solve a problem can serve the same purpose as a formula), (OR Mathematical Concepts and Mental Processes) Step 2A Prong One: Yes. Step 2A Prong Two, is the claim directed to an abstract idea? In other words, does claim recite additional elements that integrate the Judicial Exception into a practical application? the additional elements of classifying, by a correction learning unit, the learning result data obtained by interpolating the primary operation characteristic information according to fabrication characteristics of sample switching transistors and a list of classifications to store the classified learning result data recited at a high level of generality and merely amount to a particular field of use (see MPEP 2106.05(h)) and/or insignificant post-solution activity (MPEP 2106.05(g)), this does not integrate the Judicial Exception into a practical application, Step 2A Prong Two: NO. Step 2B, Does the claim recite additional element that amount to significantly more than the Judicial exception? the additional element of electrically connecting the at least one switching transistor in the sample module with input/output terminals in a measurement module; detecting, by a characteristic detecting unit, primary operation characteristic information comprising an output current, an output voltage value and a threshold voltage range of the at least one switching transistor appears to be field of use (See MPEP 2106.05(h) and MPEP 2106.05(f)) and/or merely amounts to insignificant extra-solution output of the results (see MPEP 2106.05(g)) and therefore fails to integrate the abstract idea into a practical application or amount to significantly more. Step 2B: No. claim 15 not eligible. Claim 2 related to a database configured to store the primary operation characteristic information for the switching transistor formed in the sample module, and to create a database of the primary operation characteristic information according to the list of classifications comprising type of the switching transistor, channel size, and applied panel model; a first monitoring unit configured to display the primary operation characteristic information for each switching transistor as images or graphics on a monitor; and a second monitoring unit configured to, after the primary operation characteristic information is interpolated by encoding, decoding, compression and interpolation process, display correction results of interpolated learning result data and parameter data as graphics appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 2 not eligible. Claim 3 related to wherein the characteristic detecting unit provides a gate voltage with a variable voltage level to a gate electrode of the switching transistor and a source voltage to a source electrode of the switching transistor, and accumulatively detects changes in a level of a drain voltage output from a drain electrode of the switching transistor relative to a level of the source voltage and a variable range of the gate voltage to detect the primary operation characteristic information containing drain voltage values appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 3 not eligible. Claim 4 related to wherein the model learning unit applies a predetermined list of classifications and classification information containing the channel type and channel size of the switching transistor, and applied panel model information as primary learning parameters of the learning program, and performs the learning program of the primary learning model comprising the encoding, the decoding, the compression and the interpolation process using the source voltage value of the switching transistor, the gate voltage value, the variable range of the gate voltage, the output voltage value of the drain electrode, the output current, and the threshold voltage range as variables appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 4 not eligible. Claim 5 related to wherein the model learning unit performs a secondary learning program using the primary operation characteristic information interpolated according to the results of the first learning program, the primary learning parameters, cumulative operation characteristic information of the switching transistor as variables for the secondary learning program, and outputs the secondary operation characteristic information on the switching transistor derived by a learning program of a secondary learning model of the least one learning model as secondary learning result data appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 5 not eligible. Claim 6 related to wherein the correction learning unit compares the first operation characteristic information extracted by running a learning program of the first learning model with the second operation characteristic information extracted by running the secondary learning program, and corrects parameter data or parameter input values of the primary or secondary learning program according to comparison results appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 6 not eligible. Claim 7 related to wherein the correction learning unit compares the first operation characteristic information extracted through the learning program of a primary learning model of the at least one learning model with the secondary operation characteristic information extracted through the secondary learning program, and corrects the source voltage value, the gate voltage value, the variable range of gate voltage of the switching transistor input to the primary or secondary learning program so that a difference between the primary operation characteristic information and the secondary operation characteristic information is minimized based on comparison results appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 7 not eligible. Claim 8 related to wherein the model learning unit uses a source voltage value of the switching transistor, a gate voltage value of the switching transistor, a variable range of gate voltage, an output voltage value of the drain electrode, an output current and a threshold voltage range sampled from the characteristic detecting unit as variables, to perform a learning program of a primary learning model including encoding, decoding, compression and interpolation process appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 8 not eligible. Claim 9 related to when the model learning unit comprises: a parameter input configured to receive channel type, channel size of the switching transistor, and applied panel model information as respective parameter data, and store a source voltage value, a gate voltage value, a variable range of gate voltage of the switching transistor, a sampled output voltage value of the drain electrode, output current, threshold voltage range information as variables; a first bit converter configured to convert the parameter data and the variables into a predetermined bit unit according to the learning model; a first data aligner configured to align the parameter data and variables converted into bits according to normalization information of each learning model; a primary learning model configured to perform primary learning with a primary learning program and extract the primary operation characteristic information containing output voltage values and threshold voltage range of the switching transistor as primary learning result data; and a secondary learning model configured to perform secondary learning with a secondary learning program to extract secondary operation characteristic information with corrected output voltage values and threshold voltage range as secondary learning result data appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 9 not eligible. Claim 10 related to wherein the primary learning model uses the parameter data and the variables to perform learning with the learning program of the primary learning model containing the encoding, the decoding, the compression and the interpolation process, and interpolates the sampled output voltage values of the drain electrode to extract the primary operation characteristic information containing the interpolated output voltage values of the drain electrode and threshold voltage range as the primary learning result data appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 10 not eligible. Claim 11 related to wherein the primary first learning model comprises: a variable input portion configured to store variables comprising the parameter data and the sampled output voltage values of the drain electrode as variables for the primary learning program; an encoding learning portion configured to encode the variables separately for each parameter data; a data learning portion configured to compares the input voltage values and current values contained in the encoded variables sequentially, perform loss compression that has the values in a similar range belong to certain values based on comparison results, and store them in a predetermined latent space; a decoding learning portion configured to decode the input voltage values and current values stored in the latent space according to a list of classifications of the parameter data, and decode to output the output voltage values of the drain electrode separately; and an interpolation learning portion configured to extracting values between the output voltage values of the drain electrode output from the decoding learning unit, interpolate the values between the output voltage values of the drain electrode, and extract the primary operation characteristic information containing the interpolated output voltage values of the drain electrode and threshold voltage range as the primary learning result data appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 11 not eligible. Claim 12 related to wherein the secondary learning model reads the output voltage values and current value of the drain electrode, and threshold voltage range information that have been accumulated as a result of the detection of the primary operation characteristic information as cumulative operation characteristic information and sets it as cumulative variables, and uses the cumulative variables and the primary operation characteristic information as variables to perform the secondary learning program appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 12 not eligible. Claim 13 related to wherein the secondary learning model has the output voltage values and the current values in a predetermined similar range belong to a same value or substitute them with an average value, compresses and then decompress them, and outputs the decompressed output voltage values of the drain electrode and the threshold voltage range as the secondary operation characteristics information appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 13 not eligible. Claim 14 related to wherein the secondary learning model uses cumulative operation characteristic information on the switching transistor accumulated as a result of the detection of the primary operation characteristic information and the primary operation characteristic information as variables for a predetermined learning model to perform the secondary learning program, and extracts the secondary operation characteristic information in which the output voltage values of the drain electrode and the threshold voltage range are corrected as the secondary learning result data appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 14 not eligible. Claim 16 related to storing the primary operation characteristic information for each switching transistor of the at least one switching transistor formed in the sample module, and creating a database of the primary operation characteristic information according to a list of classifications comprising type of each switching transistor, channel size, and applied panel model; displaying the primary operation characteristic information comprising a change in amount of output current, a change in level of output voltage and threshold voltage range for each switching transistor as images or graphics on a monitor; and displaying correction results of learning result data and parameter data comprising the primary operation characteristic information as graphics appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 16 not eligible. Claim 17 related to wherein the detecting, by the characteristic detecting unit, the primary operation characteristic information comprises: providing a gate voltage with a variable voltage level to a gate electrode of each switching transistor; providing a source voltage to a source electrode; and accumulatively detecting changes in a level of a drain voltage output from a drain electrode of each switching transistor relative to a level of the source voltage and a variable range of the gate voltage to detect the primary operation characteristic information containing drain voltage values appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 17 not eligible. Claim 18 related to wherein the extracting the correction results as the learning result data comprises: applying a predetermined list of classifications and classification information containing the channel type and channel size of each switching transistor, and applied panel model information as primary learning parameters of the learning program, and performing the learning program of the primary learning model comprising the encoding, the decoding, the compression and the interpolation process using the source voltage value of each switching transistor, the gate voltage value, the variable range of the gate voltage, the output voltage value of the drain electrode, the output current, and the threshold voltage range as variables appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 18 not eligible. Claim 19 related to wherein the extracting the correction results as the learning result data further comprises: performing a second learning program using the primary operation characteristic information interpolated according to the results of the first learning program, the primary learning parameters, cumulative operation characteristic information of each switching transistor as variables for the secondary learning program; and outputting the secondary operation characteristic information on each switching transistor derived by a learning program of the secondary learning model as secondary learning result data appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 19 not eligible. Claim 20 related to wherein the extracting the correction results as the learning result data comprises: receiving channel type, channel size of each switching transistor, and applied panel model information as respective parameter data, and storing a source voltage value, a gate voltage value, a variable range of gate voltage of each switching transistor, a sampled output voltage value of the drain electrode, output current, threshold voltage range information as variables in a parameter input;c onverting the parameter data and the variables into a predetermined bit unit according to the learning model; aligning the parameter data and variables converted into bits according to normalization information of each learning model; performing primary learning with a primary learning program and extracting the primary operation characteristic information containing output voltage values and threshold voltage range of each switching transistor as primary learning result data; and performing second learning with a second learning program to extract secondary operation characteristic information with corrected output voltage values and threshold voltage range as secondary learning result data appears recite further data characterization and mathematical concepts that are part of the abstract idea, claim 20 not eligible. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-8 and 15-19 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by Nathan et al. (US Patent Application Publication US 2016/0104411 A1, Date Published: 2016-04-14). Regarding claim 1: Nathan described an apparatus for fabricating a display panel, the apparatus (0007, display (TFTLCD) fabrication) comprising: a sample module in which a switching transistor is formed (0007, transistor liquid crystal display (TFTLCD) fabrication.); a measurement module having input/output terminals electrically connected to the switching transistor of the sample module (0029, module for modifying the pixel data applied to one or more than one pixel circuit); a characteristic detecting unit configured to detect primary operation characteristic information comprising an output current, an output voltage value and a threshold voltage range of the switching transistor (0031, threshold compensation value); a model learning unit configured to correct at least one of the output current (, 0036, driving current through a light emitting device, 0314, fuzzy logic), the output voltage value and the threshold voltage range in the primary operation characteristic (0037, voltage threshold of the at least one TFT or due to a shift in the voltage threshold of the at least one TFT.) information using a learning program comprised in at least one learning model, and to extract correction results as learning result data (0051, module for correcting the compressed luminance data); and a correction learning unit configured to classify the learning result data containing the primary operation characteristic information according to fabrication characteristics of sample switching transistors and a list of classifications (0051, module for correcting the compressed luminance data, 0083, threshold voltage). Regarding claim 15: Nathan described a method for fabricating a display panel (0007, display (TFTLCD) fabrication), the method comprising: forming at least one switching transistor in a sample module (0007, transistor liquid crystal display (TFTLCD) fabrication.); electrically connecting the at least one switching transistor in the sample module with input/output terminals in a measurement module (0029, module for modifying the pixel data applied to one or more than one pixel circuit); ; detecting, by a characteristic detecting unit, primary operation characteristic information comprising an output current, an output voltage value and a threshold voltage range of the at least one switching transistor (0031, threshold compensation value, 0009, transistors (TFTs)); using at least one learning program for each learning model in a model learning unit to correct at least one of the output current (0036, driving current through a light emitting device, 0314, fuzzy logic),the output voltage value (0037, voltage threshold of the at least one TFT or due to a shift in the voltage threshold of the at least one TFT.) and the threshold voltage range in the primary operation characteristic information (0037, voltage threshold of the at least one TFT or due to a shift in the voltage threshold of the at least one TFT.) and extracting correction results as learning result data (0314, fuzzy logic); and classifying, by a correction learning unit, the learning result data obtained by interpolating the primary operation characteristic information according to fabrication characteristics of sample switching transistors and a list of classifications to store the classified learning result data (0051, module for correcting the compressed luminance data, 0083, threshold voltage). Regarding claim 2, Nathan further described a database configured to store the primary operation characteristic information for the switching transistor formed in the sample module (0009, transistors (TFTs), 0015, luminance data), and to create a database of the primary operation characteristic information according to the list of classifications (0015, luminance data) comprising type of the switching transistor, channel size (0171, drain terminal of the switch transistor 164 is connected to VDATA.), and applied panel model (0209, contrast and the brightness of the panel); a first monitoring unit configured to display the primary operation characteristic information for each switching transistor as images or graphics on a monitor (0209, contrast and the brightness of the panel); and a second monitoring unit configured to, after the primary operation characteristic information is interpolated by encoding, decoding, compression and interpolation process, display correction results of interpolated learning result data and parameter data as graphics (0314, fuzzy logic ,0279, data to correct non-uniformities in the display, 0286, switching circuit having TFTs). Regarding claim 3, Nathan further described wherein the characteristic detecting unit provides a gate voltage with a variable voltage level to a gate electrode of the switching transistor (0287, gate of the reference TFT) and a source voltage to a source electrode of the switching transistor (0266, gate-source voltage), and accumulatively detects changes in a level of a drain voltage output from a drain electrode of the switching transistor relative to a level of the source voltage and a variable range of the gate voltage to detect the primary operation characteristic information containing drain voltage values (0172, drain terminal of the driving transistor 163). Regarding claim 4, Nathan further described wherein the model learning unit applies a predetermined list of classifications and classification information containing the channel type and channel size of the switching transistor (0007,film transistor liquid crystal display TFTLCD), and applied panel model information as primary learning parameters of the learning program, and performs the learning program of the primary learning model comprising the encoding, the decoding, the compression and the interpolation process using the source voltage value of the switching transistor, the gate voltage value, the variable range of the gate voltage, the output voltage value of the drain electrode, the output current, and the threshold voltage range as variables (0020, range of threshold , 0029, correcting the pixel data applied to the first or a second pixel circuit based on the estimation of the degradation of the first pixel circuit, 0314, fuzzy logic). Regarding claim 5, Nathan further described wherein the model learning unit performs a secondary learning program using the primary operation characteristic information interpolated according to the results of the first learning program, the primary learning parameters, cumulative operation characteristic information of the switching transistor as variables for the secondary learning program, and outputs the secondary operation characteristic information on the switching transistor derived by a learning program of a secondary learning model of the least one learning model as secondary learning result data (0020, range of threshold , 0029, correcting the pixel data applied to the first or a second pixel circuit based on the estimation of the degradation of the first pixel circuit, 0314, fuzzy logic). Regarding claim 6, Nathan further described wherein the correction learning unit compares the first operation characteristic information extracted by running a learning program of the first learning model with the second operation characteristic information extracted by running the secondary learning program, and corrects parameter data or parameter input values of the primary or secondary learning program according to comparison results (0051, correcting the compressed luminance data applied to the first or a second pixel circuit based on the estimation of the degradation of the first pixel circuit; and a display driver for receiving the corrected luminance data and supplying the pixel circuit with an analog voltage or current based on the corrected luminance data, 0314, fuzzy logic). Regarding claim 7, Nathan further described wherein the correction learning unit compares the first operation characteristic information extracted through the learning program of a primary learning model of the at least one learning model with the secondary operation characteristic information extracted through the secondary learning program, and corrects the source voltage value, the gate voltage value, the variable range of gate voltage of the switching transistor input to the primary or secondary learning program so that a difference between the primary operation characteristic information and the secondary operation characteristic information is minimized based on comparison results (0051, corrected luminance data and supplying the pixel circuit with an analog voltage or current based on the corrected luminance data, 0314, fuzzy logic). Regarding claim 8, Nathan further described wherein the model learning unit uses a source voltage value of the switching transistor, a gate voltage value of the switching transistor, a variable range of gate voltage, an output voltage value of the drain electrode, an output current and a threshold voltage range sampled from the characteristic detecting unit as variables, to perform a learning program of a primary learning model including encoding, decoding, compression and interpolation process (0051, corrected luminance data and supplying the pixel circuit with an analog voltage or current based on the corrected luminance data, 0314, fuzzy logic). Regarding claim 16, Nathan further described storing the primary operation characteristic information for each switching transistor of the at least one switching transistor formed in the sample module (0023, switch transistor), and creating a database of the primary operation characteristic information according to a list of classifications comprising type of each switching transistor, channel size (0174, drain terminal), and applied panel model; displaying the primary operation characteristic information comprising a change in amount of output current, a change in level of output voltage and threshold voltage range for each switching transistor as images or graphics on a monitor; and displaying correction results of learning result data and parameter data comprising the primary operation characteristic information as graphics (0209, gamma-correction data, 0210, threshold voltage, 0215, Video Graphics Array). Regarding claim 17, Nathan further described providing a gate voltage with a variable voltage level to a gate electrode of each switching transistor (0173, gate terminal of the switch); providing a source voltage to a source electrode (fig. 4a, source); and accumulatively detecting changes in a level of a drain voltage output from a drain electrode of each switching transistor relative to a level of the source voltage and a variable range of the gate voltage to detect the primary operation characteristic information containing drain voltage values (fig. 4a, 0019, over time). Regarding claim 18, Nathan further described applying a predetermined list of classifications and classification information containing the channel type and channel size of each switching transistor (fig. 4a), and applied panel model information as primary learning parameters of the learning program (0225, OLED), and performing the learning program of the primary learning model comprising the encoding, the decoding, the compression and the interpolation process using the source voltage value of each switching transistor, the gate voltage value, the variable range of the gate voltage, the output voltage value of the drain electrode, the output current, and the threshold voltage range as variables (fig. 4a, 11a, 0368, threshold values). Regarding claim 19, Nathan further described performing a second learning program using the primary operation characteristic information interpolated according to the results of the first learning program, the primary learning parameters, cumulative operation characteristic information of each switching transistor as variables for the secondary learning program; and outputting the secondary operation characteristic information on each switching transistor derived by a learning program of the secondary learning model as secondary learning result data (fig. 11a, 0108, in real-time). Contact information 5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tung Lau whose telephone number is (571)272-2274, email is Tungs.lau@uspto.gov. The examiner can normally be reached on Tuesday-Friday 7:00 AM-5:00 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TURNER SHELBY, can be reached on 571-272-6334. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see https://ppair-my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll- free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272- 1000. /TUNG S LAU/Primary Examiner, Art Unit 2857 Technology Center 2800 February 11, 2026
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Prosecution Timeline

Oct 04, 2023
Application Filed
Feb 11, 2026
Non-Final Rejection — §101, §102, §112 (current)

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