Prosecution Insights
Last updated: May 29, 2026
Application No. 18/378,810

FLEXIBLE ELECTRONIC SYSTEM FOR FLEXIBLE WEARABLE DEVICES AND OTHER ELECTRONIC DEVICES

Final Rejection §103
Filed
Oct 11, 2023
Priority
Oct 12, 2022 — provisional 63/415,623 +1 more
Examiner
DINH, TUAN T
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Meta Platforms Technologies, LLC
OA Round
2 (Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
925 granted / 1174 resolved
+10.8% vs TC avg
Strong +23% interview lift
Without
With
+22.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
24 currently pending
Career history
1209
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
64.6%
+24.6% vs TC avg
§102
17.9%
-22.1% vs TC avg
§112
2.0%
-38.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1174 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “104” has been used to designate both flexible interposer and interposer. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Objections Claims 2 and 13 are objected to because of the following informalities: Regarding claims 2 and 13, the phrase of “further comprising a flexible barrier material” is not understood because the limitations of “a flexible barrier material al ready recited in claim 1. Please, revise. Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fjestad (‘623) in view of Zehnder et al. (‘668), both references cited in the record. As to claims 1, Fjestad discloses a flexible electronic system (5000) as shown in figures 40-62 comprising: a plurality of island regions (5101a-5101c), wherein at least one island region (5101) of the plurality of island regions comprises: a flexible substrate (5401) comprising an interlayer elastomer dielectric, para- 0092; a plurality of rigid components (2301a, 2301b) disposed within the flexible substrate, at least one rigid component (2301a or 2301b) comprising an electronic component; and a high-density interconnect region comprising one or more routing layers (5602) electrically connected to the plurality of rigid components (2301a, 2301b). Fjestad does not specifically disclose a single-layer flexible interposer layer coupled to the flexible substrate and a flexible barrier material. Zehnder teaches a flexible EL device (100) as shown in figures 1-2 comprising a single-layer flexible interposer layer (124A or 122) coupled to the flexible substrate (102) and a flexible barrier material (124B). It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Zehnder employed in the electronic system of Fjestad in order to provide flexability, fold, twist in a tubular form, prevent functional damage, and excellent protection structure for the flexible device. As best understood to claim 2, Fjestad as modified by Zehnder teaches the flexible barrier material (124B) at least partially encapsulating the flexible electronic system (100). As to claim 12, Fjestad discloses a wearable device (flexible or stretchable circuits capable used in a wearable device or application, para-0003+) comprising: a flexible electronic system (4000 or 5000) as shown in figures 40-62 comprising: a plurality of island regions (5101a-5101c), wherein each island region (5101) comprises: a flexible substrate (5401) comprising an interlayer elastomer dielectric, para- 0092; a plurality of rigid components (2301a, 2301b) disposed within the flexible substrate, at least one rigid component (2301a or 2301b) comprising an electronic component; and a high-density interconnect region comprising one or more routing layers (5602) electrically connected to the plurality of rigid components (2301a, 2301b). Fjestad does not specifically disclose a single-layer flexible interposer layer coupled to the flexible substrate and a flexible barrier material. Zehnder teaches a flexible EL device (100) as shown in figures 1-2 comprising a single-layer flexible interposer layer (124A or 122) coupled to the flexible substrate (102) and a flexible barrier material (124B). It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Zehnder employed in the electronic system of Fjestad in order to provide flexability, fold, twist in a tubular form, prevent functional damage, and excellent protection structure for the flexible device. As best understood to claim 13, Fjestad as modified by Zehnder teaches the flexible barrier material (124B) at least partially encapsulating the flexible electronic system (100). As to claims 4, 15, Fjestad as modified by Zehnder discloses the plurality of rigid components comprises one or more of an integrated circuit, a surface mount device (SMD), para-0004+, or a flexible printed circuit (FPC). As to claims 5, 16, Fjestad as modified by Zehnder discloses the high-density interconnect region (the region of element 5401) further comprises: a plurality of routing layers (5602); and one or more through-vias (5103a-5103c or 5211), wherein at least one through-via of the one or more through-vias electrically couples at least one of (1) two rigid components, (2301) two routing layers, or (5602) a rigid component and a routing layer. As to claims 6, 17, Fjestad as modified by Zehnder discloses at least some of the routing layers (5602) comprise conductive traces. As to claim 8, Fjestad as modified by Zehnder discloses in figure 52, at least some of the plurality of island regions (5201a-5201c) are arranged vertically above another island region. As to claim 9, Fjestad as modified by Zehnder discloses adjacent island regions (5201), figure 52, of the at least some of the plurality of island regions are coupled together via one or more through-vias (5211), wherein each through-via couples at least one of two rigid components, two routing layers, or (5202) a rigid component and a routing layer. As to claim 10, Fjestad as modified by Zehnder discloses in figures 50-51 at least some of the plurality of island regions (4901 or 5101) are arranged laterally with respect to another island region. As to claim 11, Fjestad as modified by Zehnder discloses adjacent island regions (5101 or 5201) of the at least some of the plurality of island regions are coupled together via a flexible routing layer (5102 or 5202) comprising one or more conductive traces. As to claim 19, Fjestad as modified by Zehnder discloses at least some of the plurality of island regions (5101 or 5201) are arranged vertically above another island region, figure 52; and adjacent island regions of the at least some of the plurality of island regions are coupled together via one or more through-vias (5211), wherein each through-via couples at least one of two rigid components, two routing layers (5202), or a rigid component and a routing layer. As to claim 20, Fjestad as modified by Zehnder discloses in figures 50-51, at least some of the plurality of island regions (5101, 5201) are arranged laterally with respect to another island region; and adjacent island regions of the at least some of the plurality of island regions are electrically coupled together via a flexible routing layer comprising one or more conductive traces. Claim(s) 7, 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fjestad in view of Zehnder, and further in view of Morun et al. (U.S. 2015/0141784). As best understood to claims 7 and 18, Fjestad as modified by Zehnder discloses all of the limitations of claimed invention except for a flexible ground plane; and a flexible current collector. Morun teaches a system/EMG sensor (100) as shown in figures 1-2 comprising a substrate (101) having a flexible ground plane (140); and a flexible current collector (122, 123). It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Morun employed in the electronic system of Fjestad and Zehnder in order to provide a ground purpose, good conductivity, and mechanical stability. Response to Arguments Applicant’s arguments with respect to claim(s) 1-2,4-13,15-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUAN T DINH whose telephone number is (571)272-1929. The examiner can normally be reached 8am-5pm, M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TUAN T DINH/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Oct 11, 2023
Application Filed
Dec 18, 2025
Non-Final Rejection mailed — §103
Feb 19, 2026
Applicant Interview (Telephonic)
Feb 21, 2026
Examiner Interview Summary
Mar 05, 2026
Response Filed
May 06, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
79%
Grant Probability
99%
With Interview (+22.9%)
2y 11m (~3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1174 resolved cases by this examiner. Grant probability derived from career allowance rate.

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