DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
The 2/17/2026 "Reply" elects without traverse and identifies claims 1-5, 12-17, and 19-20 as being drawn to Species A. Accordingly, Examiner has withdrawn claims 6-11 and 18 from further consideration as being drawn to a non-elected invention. See, for example, 37 CFR § 1.142(b).
The 1/13/2026 restriction requirement is proper, is maintained, and is hereby made final.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 16 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 16 recites the limitation "the first source/drain layer" and "the second source/drain layer." There is insufficient antecedent basis for this limitation in the claim. In the interest of compact prosecution the above recitations will be interpreted as "a first source/drain layer" and "a second source/drain layer."
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over by Park (US Pub. No. 2015/0028423) in view of Kim (US pub. No. 2012/0083089).
Regarding claim 15, in FIG. 22, Park discloses a semiconductor device, comprising: a substrate (100, paragraph [0042]) including a first region (I) and a second region (II); a first epitaxial layer (200, paragraph [0050]) on the first region of the substrate; a second epitaxial layer (170, paragraph [0047]) on the second region of the substrate; a first contact plug including: a first metal silicide pattern (310, paragraph [0064]) on the first epitaxial layer, the first metal silicide pattern including a silicide (NiPtSi) of a first metal and a silicide (NiCoSi) of a second metal different from the first metal; and a first conductive pattern (350, paragraph [0070]) on the first metal silicide pattern; and a second contact plug including: a second metal silicide pattern (320, paragraph [0064]) on the second epitaxial layer; and a second conductive pattern (350/360) on the second metal silicide pattern.
Park appears not to explicitly disclose the second metal silicide pattern including a silicide of the first and second metals, wherein a work function of the first metal silicide pattern and a work function of the second metal silicide pattern are different from each other.
However in FIGs. 6-10, Kim discloses a similar semiconductor device having a first region (I) and a second region (II) wherein silicide regions (120b/120 and 220b/220) are formed in the first and second region comprising the same metals selected from at least one of Ni, Pt, Ti, Co, Hf, and W (paragraph [0051]) wherein a work function of the first metal silicide pattern and a work function of the second metal silicide pattern are different from each other (paragraphs [0060]-[0061]) to advantageously affect an operation of an NMOS transistor while not disadvantageously affecting an operation of a PMOS transistor, (paragraph [0061]).
To advantageously affect an operation of an NMOS transistor while not disadvantageously affecting an operation of a PMOS transistor it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form the second metal silicide pattern to include a silicide of the first and second metals, wherein a work function of the first metal silicide pattern and a work function of the second metal silicide pattern are different from each other.
Regarding claim 16, in FIG. 22, Park discloses that a first source/drain layer (200) includes silicon-germanium doped with a p-type impurity (paragraph [0050]), and a second source/drain layer (170) includes silicon or silicon carbide doped with an n-type impurity (paragraph [0047]).
Allowable Subject Matter
Claims 1-5, 12-14, and 19-20 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claims 1-5 and 12-14, in FIG. 22, Park discloses a semiconductor device, comprising: a substrate (100, paragraph [0042]) including a first region (I) and a second region (II); a first gate structure (241, paragraph [0055]) on the first region of the substrate, a first source/drain layer (200) on a portion of the substrate adjacent to the first gate structure; a second gate (242, paragraph [0056]) structure on the second region of the substrate; a second source/drain layer (170) on a portion of the substrate adjacent to the second gate structure; a first contact plug including: a first metal silicide pattern (310, paragraph [0064]) on the first source/drain layer, the first metal silicide pattern including a silicide (NiPtSi) of a first metal and a silicide (NiCoSi) of a second metal different from the first metal; and a first conductive pattern (350, paragraph [0070]) on the first metal silicide pattern; and a second contact plug including: a second metal silicide pattern (320, paragraph [0064]) on the second source/drain layer, and a second conductive pattern (350) on the second metal silicide pattern.
However, the prior art failed to disclose or reasonably suggest the claimed semiconductor device particularly characterized by the second metal silicide pattern including a silicide of the first and second metals; wherein a first ratio of the first metal to the second metal included in the first metal silicide pattern is different from a second ratio of the first metal to the second metal included in the second metal silicide pattern.
Regarding claims 19-20, in FIG. 22, Park discloses a semiconductor device, comprising: a substrate (100) including a first region (I) and a second region (II); a first active fin (region of I between elements 110) and a second active fin (region of II between elements 110) on the first and second regions of the substrate, respectively; a first transistor including: a first gate structure (241) on the first active fin of the first region of the substrate; and a first source/drain layer (200) on a portion of the first active fin adjacent to the first gate structure, the first source/drain layer including silicon-germanium doped with a p-type impurity (paragraph [0050]); a second transistor including: a second gate structure (242) on the second active fin of the second region of the substrate; and a second source/drain layer (170) on a portion of the second active fin adjacent to the second gate structure, the second source/drain layer including silicon doped with a n-type impurity (paragraph [0047]); a first contact plug including: a first metal silicide pattern (310, paragraph [0064]) on the first source/drain layer; a first conductive pattern (360, paragraph [0070]) on the first metal silicide pattern, the first conductive pattern including a third metal (W); and a first metal layer (350, paragraph [0070]) between the first metal silicide pattern and the first conductive pattern, the first metal layer including a second metal (Ti) having a work function in a range of about 2.0eV to about 4.5eV (see paragraph [0045 of the present application]); and a second contact plug including; a second metal silicide pattern (320, paragraph [0064]) on the second source/drain layer.
However, the prior art failed to disclose or reasonably suggest the claimed semiconductor device particularly characterized by the first metal silicide pattern including a silicide of a first metal having a work function equal to or more than about 4.6eV the first metal silicide pattern including a silicide of the first metal; and a second conductive pattern on the second metal silicide pattern, the second conductive pattern including the third metal, wherein a first ratio of the first metal to the second metal included in the first metal silicide pattern is greater than a second ratio of the first metal to the second metal included in the second metal silicide pattern.
Claim 17 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the prior art failed to disclose or reasonably suggest the claimed semiconductor device particularly characterized by a first metal layer between the first metal silicide pattern and the first conductive pattern, the first metal layer including the second metal, wherein a concentration of the second metal of a first portion of the first metal silicide pattern that is nearer to the first metal layer is greater than a concentration of the second metal of a second portion of the first metal silicide pattern that is farther from the first metal layer.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUCKER J WRIGHT whose telephone number is (571)270-3234. The examiner can normally be reached 8:30am-5:00pm.
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/TUCKER J WRIGHT/ Primary Examiner, Art Unit 2891