Prosecution Insights
Last updated: April 19, 2026
Application No. 18/379,555

METHODS AND APPARATUS TO PROTECT CIRCUITRY FROM OVERCURRENT CONDITIONS

Non-Final OA §102
Filed
Oct 12, 2023
Examiner
PATEL, DHARTI HARIDAS
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
95%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
1079 granted / 1239 resolved
+19.1% vs TC avg
Moderate +8% lift
Without
With
+7.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
23 currently pending
Career history
1262
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
42.3%
+2.3% vs TC avg
§102
43.5%
+3.5% vs TC avg
§112
2.2%
-37.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1239 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claims 1 and 8 are objected to because of the following informalities: Claim 1 line 2, the words “programmable circuitry” should read – a programmable circuitry – Claim 8 line 2, the words “filter circuitry” should read – a filter circuitry – Claim 8 line 5, the words “protection circuitry” should read – a protection circuitry – Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 6, and 15 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kou et al. Publication No. US 2022/0225026. Regarding claims 1, 15, Kou discloses an apparatus comprising: programmable circuitry [Fig. 1, processor 110; par. 0309] configured to execute machine-readable instructions [par. 0069-0071] to: receive an input signal [Fig. 4, Input signal] having first voltages; receive second voltages and currents [par. 0272, par. 0294], the second voltages and currents representative of voltages and currents of filter circuitry responsive to the first voltages; and determine a transfer function based on the first voltages and the second voltages and currents, the transfer function having coefficients representing the filter circuitry [par. 0046, 0267, 0270]. Regarding claim 6, Kou discloses that the programmable circuitry is further configured to modify the coefficients of the transfer function to modify the transfer function [par. 0267: “a feedback signal (a feedback voltage) that is of the speaker and that exists at a previous moment may be input into a linear parameter identification model, to obtain a linear parameter of the speaker, and further, the displacement transfer function is updated based on the linear parameter.”] Allowable Subject Matter Claims 2-5, 7, 16-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for allowance of claim 2: The prior art does not disclose that the input signal is a first input signal, the currents are first currents, and the programmable circuitry is further configured to predict second currents based on third voltages and the coefficients of the transfer function, the third voltages represent a second input signal subsequent to the first input signal. This feature in combination with the rest of the claim limitations is not anticipated or rendered obvious by the prior art of record. The following is an examiner’s statement of reasons for allowance of claim 7: The prior art does not further comprise an amplifier having an input and an output, the input of the amplifier coupled to the programmable circuitry; the filter circuitry having a first terminal, a second terminal, and a third terminal, the first terminal of the filter circuitry coupled to the programmable circuitry, the second terminal of the filter circuitry coupled to the output of the amplifier; and a speaker having a terminal coupled to the third terminal of the filter circuitry. The following is an examiner’s statement of reasons for allowance of claim 16: The prior art does not disclose that the instructions are to cause the programmable circuitry to receive second voltages and second currents of the filter circuitry responsive to supplying a second input signal to the amplifier. This feature in combination with the rest of the claim limitations is not anticipated or rendered obvious by the prior art of record. The following is an examiner’s statement of reasons for allowance of claim 19: The prior art does not disclose that the instructions are to cause the programmable circuitry to: receive a second input signal having second voltages; and determine second currents of the filter circuitry based on the second voltages and the coefficients. This feature in combination with the rest of the claim limitations is not anticipated or rendered obvious by the prior art of record. Claims 8-14 are allowed. The prior art by Kou discloses a system comprising: filter circuitry [Fig. 4, Filtering] having an input and an output; an amplifier [Fig. 4, Amplifier] having an input and an output; and protection circuitry [Fig. 4, processor, signal compensation, Interpolation calculation, speaker model] having an input and an output, the input of the protection circuitry coupled to the output of the filter circuitry, the output of the protection circuitry coupled to the input of the amplifier. However, the prior art does not disclose that the protection circuitry configured to: predict a sense current based on the sense voltages and coefficients of a transfer function that represents the filter circuitry; receive the sense current responsive to supplying the input signal to the filter circuitry; and adjust the coefficients based on differences between the predicted sense current and the sense current of the filter circuitry. This feature in combination with the rest of the claim limitations is not anticipated or rendered obvious by the prior art of record. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DHARTI PATEL whose telephone number is (571)272-8659. The examiner can normally be reached M - F 9 AM - 5 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu Tran can be reached at 571-270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. DHARTI PATEL Primary Examiner Art Unit 2836 /DHARTI H PATEL/Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Oct 12, 2023
Application Filed
Jan 14, 2026
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
95%
With Interview (+7.8%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 1239 resolved cases by this examiner. Grant probability derived from career allow rate.

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