Prosecution Insights
Last updated: April 19, 2026
Application No. 18/380,478

AIR GAP STRUCTURE IN INTERCONNECT WITH TOP VIA

Non-Final OA §102§103
Filed
Oct 16, 2023
Examiner
PARK, SAMUEL
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
International Business Machines Corporation
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
99%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
388 granted / 461 resolved
+16.2% vs TC avg
Strong +26% interview lift
Without
With
+25.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
24 currently pending
Career history
485
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
53.2%
+13.2% vs TC avg
§102
22.9%
-17.1% vs TC avg
§112
21.3%
-18.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 461 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Note by the Examiner 2. For clarity, the reference to specific claim numbers are presented in bold. Cited claim limitations are presented in bold the first time they are associated with a particular prior art disclosing the cited limitations, and subsequent reference to the already disclosed claim limitations are presented un-bolded. Certain elements from prior art which are not required by the claims are also presented un-bolded if they are particularly pertinent to understanding how the references are being combined. Item-to-item matching and Examiner explanations for 102 &/or 103 rejections have been provided in parenthesis. Election/Restrictions 3. Applicant’s election without traverse of Invention I, identified as encompassing claims 1-14 is acknowledged. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 4. Claims 1-5 and 14 are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Kao et al. (US 2015/0262860 A1), hereinafter as K1 5. Regarding Claim 1, K1 discloses a back-end-of-the-line (BEOL) interconnect structure (see Fig. 12 interconnect structure over the substrate 210 and dielectric 212, also see [0012-0013] “The substrate 210 may also include gate stacks formed by dielectric layers and electrode layers” When reading the preamble in the context of the entire claim, the recitation “back end-of-the-line (BEOL) is not limiting because the body of the claim describes a complete invention and the language recited solely in the preamble does not provide any distinct definition of any of the claimed invention' s limitations. Thus, the preamble of the claim(s) is not considered a limitation and is of no significance to claim construction. See Pitney Bowes, Inc. v. Hewlett-Packard Co., 182 F.3d 1298, 1305, 51 USPQ2d 1161, 1165 (Fed. Cir. 1999). See MPEP § 2111.02.) comprising: a top via structure (element 610, see [0024] “metal plug 610”) located on a metal line (element 214A see [0018] “conductive features 214A”, see [0014] “conductive features 214 may include … metal via, or metal line”); and an air gap (element 820,720 see [0029] “enclosure-air-gap 820 all around the metal via 610A and the conductive feature 214A”) located adjacent to, and around, both the metal line and the top via structure (see [0029]), wherein the air gap has a lower air gap portion (element 820 portion which is adjacent to element 214A) that is located adjacent to the metal line and an upper air gap portion (element 720,820 portion that is adjacent to element 610) that is located adjacent the top via structure (see Fig. 12). 6. Regarding Claim 2, K1 discloses the BEOL structure of Claim 1, wherein the lower air gap portion of the air gap has a first width (a width of element 405,820 portion of the air gap), and the upper air gap portion of the air gap has a second width (a width of element 720 area of the air gap), wherein the first width is different from the second width (see Fig. 12). 7. Regarding Claim 3, K1 discloses the BEOL structure of Claim 2, wherein the first width is greater than the second width (see Fig. 12). 8. Regarding Claim 4, K1 discloses the BEOL structure of Claim 1, wherein the air gap extends substantially to a topmost surface of the top via structure (see Fig. 12 substantially to the top). 9. Regarding Claim 5, K1 discloses the BEOL structure of Claim 1, wherein a portion of the air gap is sandwich between a first dielectric liner (element 405, see [0019] “etch-stop-layer (ESL) 405 … may include silicon nitride, silicon oxide …”) and a second dielectric liner (element 810, see [0029] “dielectric layer 810”). 10. Regarding Claim 14, K1 discloses the BEOL structure of Claim 1, further comprising a substrate (element 210, see [0012-0013] “The substrate 210”) located beneath the metal line, wherein the substrate comprises at least one lower interconnect level, a middle-of-the line (MOL) level, a front-end-of-the-line (FEOL) level or any combination of said levels (see [0012-0013] “The substrate 210 may also include gate stacks formed by dielectric layers and electrode layers”). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 11. Claims 6, 9, and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Kao et al. (US 2015/0262860 A1), hereinafter as K1, in view of Cheng et al. (US 9,892,961 B1), hereinafter as C1 12. Regarding Claim 6, K1 discloses the BEOL structure of Claim 5. K1 does not explicitly disclose wherein the first dielectric liner is located on a sidewall of the metal line and a sidewall of the top via structure. C1 discloses (see Fig. 11) wherein the first dielectric liner (element 250, see Column 14 lines 57-60 “insulating material layers 234, 250, 260, and air gap spacers 262”) is located on a sidewall of the air gap and a sidewall of the top via structure (see Fig. 11 entire sidewall of element 262 and element 245, see Column 14 line 54). The first dielectric liner as taught by C1 is incorporated as the first dielectric liner of K1, wherein the combination discloses wherein the first dielectric liner is located on a sidewall of the metal line and a sidewall of the top via structure (see K1 lining along at least sidewall portions of elements 214 and 610 and upper surface of element 212 in the same manner as C1 element 250) It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of C1 with K1 because the combination provides conformal insulating liner material for protection for structural damage or contamination (see C1 Column 14 lines 63-67). 13. Regarding Claim 9, K1 discloses the BEOL structure of Claim 1. K1 does not explicitly disclose wherein the air gap is spaced apart from the metal line and top via structure by a dielectric liner. C1 discloses wherein the air gap is spaced apart from the metal line and top via structure by a dielectric liner (element 250, see Column 14 lines 57-60 “insulating material layers 234, 250, 260, and air gap spacers 262”) (see Fig. 11 element 262 spaced apart from element 230-1 upper and lower portions by element 250). The dielectric liner as taught by C1 is incorporated as the dielectric liner of K1 (see K1 lining along at least sidewall portions of elements 214 and 610 and upper surface of element 212 in the same manner as C1 element 250). It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to incorporate the teachings of C1 with K1 because the combination provides conformal insulating liner material for protection for structural damage or contamination (see C1 Column 14 lines 63-67). 14. Regarding Claim 10, K1, C1 discloses the BEOL structure of Claim 9, further comprising (see K1) an additional metal line (element 214, [0014] “conductive features 214”) located adjacent to the metal line that is located beneath the top via structure (see Fig. 12 adjacent to element 214A). Allowable Subject Matter 15. Claims 7-8 and 11-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reason for indicating allowable subject matter: The prior art made of record, either singularly or in combination, does not disclose or suggest at least the claim limitations of: 16. Claim 7, “an interlayer dielectric layer located on the second dielectric liner and having a topmost surface that is substantially coplanar with a topmost surface of the top via structure” – as instantly claimed and in combination with the additionally claimed limitations. All claims depending on the current claim incorporate the same allowable subject matter. 17. Claim 11, “a dielectric layer located above the additional metal line, wherein dielectric layer has a middle portion having a first thickness, and end portions having a second thickness, wherein the first thickness is greater than the second thickness” – as instantly claimed and in combination with the additionally claimed limitations. All claims depending on the current claim incorporate the same allowable subject matter. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL PARK whose telephone number is (303)297-4277. The examiner can normally be reached Normal Schedule: M-F Sometime between 6:30 a.m. - 7:00 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven H. Loke can be reached at (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SAMUEL PARK/Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Oct 16, 2023
Application Filed
Mar 14, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
99%
With Interview (+25.7%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 461 resolved cases by this examiner. Grant probability derived from career allow rate.

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