DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application is being examined under the pre-AIA first to invent provisions.
This Office Action is in response to the Amendment filed on 05/04/2026.
Response to Arguments
In the instant Amendment, Claim 1 is cancelled. New claims 2-21 are added. 2-21 are pending. Applicant’s arguments on 05/04/2026, with respects to claim 1 has been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, the amendments to the new claims (independent claims and dependent claims) have substantially changed the scope of the claims and necessitate new grounds of rejection.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 2, 3, 7-10, 13-17, 19-20 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Thomas et al. (WO-2018227133-A1) in view of Jin et al. (CA3055231A1).
For claim 2:
Thomas discloses one or more processors (see Thomas, at least abstract; at least one processor), comprising: circuitry to:
receive encoded data that was encoded using a base graph associated with an error correcting code (see Thomas, at least paragraph [0085]; communications systems (e.g., such as NR) use error-correcting codes. Error correcting codes generally compensate for the intrinsic unreliability of information transfer (e.g., over the air medium) in these systems by introducing redundancy into the data stream Low-density parity-check (LDPC) codes are one type of error correcting codes which use an iterative coding system);
cause a first decoder to decode a first portion of the encoded data using a first portion of the base graph (see Thomas, at least paragraph [0117]; The LDPC code (e.g., or a lifted LDPC code) is stored and defined by a base matrix having a first number of columns corresponding to variable nodes of a base graph and a second number of rows corresponding to check nodes of the base graph. For each of the first number of columns, all adjacent rows are orthogonal in a last portion (e.g., the bottom 21 rows) of the second number of rows. For example, in each of the first number of columns, at most one row of each pair of the adjacent orthogonal rows in the last portion of the rows has an entry. The decoding may be based on a decoding schedule. The decoding schedule may include decoding sequentially row by row in the base matrix or by simultaneously decoding pairs of rows (e.g., an column by column) in the base matrix. The receiving device may select from two combinations of two rows from any three sequential rows in the last portion for the simultaneous decoding pairs of the decoding schedule);
cause a second decoder to decode, at least partially in parallel with the first decoder decoding the first portion of the encoded data, a second portion of the encoded data using a second portion of the base graph (see Thomas, at least paragraph [0092]; '"Lifting" enables LDPC codes to be implemented using parallel encoding and/or decoding implementations while also reducing the complexity typically associated with large LDPC codes. Lifting helps enable efficient parallelization of LDPC decoders while still having a relatively compact description); and
generate an output by combining the decoded first portion of the encoded data with the decoded second portion of the encoded data.
Jin, from the same or similar fields of endeavor, discloses what Kim-Cho fails: the encoder may perform encoding and outputting in a plurality of manner (see Jin, at least [0006]-[0007]; [0039]; [0042]; [0044]- [0049]; [0137]; [0149]; [0157]; If the decoding result meets a check equation, decoding succeeds, the iteration ends, and the decision result is output).
Therefore, it would have been obvious statement before the effective filing date of the claimed invention to have a system comprises a method as taught by Jin. The motivation for doing this is to provide a system networks can supports the system information can be provided to the UE on demand.
For claims 3, 10 and 17:
In addition to rejection in claims 3, 10 and 17, Thomas- Jin further discloses wherein the error correcting code is a low-density parity-check (LDPC) code (see Thomas, at least paragraph [0085]; communications systems (e.g., such as NR) use error-correcting codes. Error correcting codes generally compensate for the intrinsic unreliability of information transfer (e.g., over the air medium) in these systems by introducing redundancy into the data stream Low-density parity-check (LDPC) codes are one type of error correcting codes which use an iterative coding system; or see Jin, at least paragraph [0002]; the LDPC code may be used as an error-correcting code in a communication system).
For claims 7 and 20:
In addition to rejection in claims 7 and 20, Thomas- Jin further discloses wherein the circuitry is to decode the first portion of the encoded data and the second portion of the encoded data based, at least in part, on a lifting set (see Thomas, at least paragraph [0092]; "Lifting" enables LDPC codes to be implemented using parallel encoding and/or decoding implementations while also reducing the complexity typically associated with large LDPC codes. Lifting helps enable efficient parallelization of LDPC decoders while still having a relatively compact description).
For claim 8:
In addition to rejection in claim 8, Thomas- Jin further discloses wherein the encoded data is received in accordance with 5G New Radio (5G NR) standard (see Thomas, at least paragraph [0117]; receiving a codeword (e.g., or punctured codeword) in accordance with a radio technology (e.g., NR or 5G radio technology) across a wireless channel via one or more antenna elements situated proximal a receiver. At 1404, the receiving device decodes (e.g., with a layered decoder) the codeword (e.g., and depunctures if the codeword is punctured) via decoder circuitry based on a LDPC code to produce a set of information bits).
For claim 9:
For claim 9, claim 9 is directed to a system, which has similar scope as claim 2. Therefore, claim 9 remains un-patentable for the same reasons.
For claims 13 and 19:
These claims are rejected under rationales of claims 9 and 16.
For claims 14 and 21:
In addition to rejection in claims 14 and 21, Thomas- Jin further discloses wherein the first portion of the base graph and the second portion of the base graph are represented by rows that each include a count of non-zero entries and references to positions of the non-zero entries (see Thomas, at least paragraph [0093]; [0105]; Edges in the basegraph have entries in the PCM. Quasi-cyclic LDPC codes have integer cyclic lifting values in the non-zero entries in the PCM for ith column and the jth row. The cyclic lifting values correspond to circulant permutations of the edges when the basegraph if lifted to obtain a lifted graph)
For claim 15:
In addition to rejection in claims 14 and 21, Thomas- Jin further discloses wherein the base graph is defined in accordance with a communications standard (see Thomas, at least paragraph [0105]; In new radio (NR), low-density parity-check (LDPC) is used for channel coding of certain channels. As described above with respect to FIGs. 7-10, LDPC codes are defined by the basegraph).
For claim 16:
For claim 16, claim 16 is directed to a method, which has similar scope as claim 2. Therefore, claim 16 remains un-patentable for the same reasons.
Claims 4, 11 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Thomas et al. (WO-2018227133-A1) in view of Jin(CA3055231A1) further in view of Priewasser et al. (U.S 2010/0268918).
For claims 4, 11 and 18:
In addition to rejection in claims 4, 11 and 18, Thomas- Jin does not explicitly disclose wherein the first decoder and the second decoder are implemented using one or more single-instruction, multiple-thread architecture processors.
Priewasser, from the same or similar fields of endeavor, discloses what Thomas- Jin fails: the proposed architecture combines a multi slot SIMD datapath (implementing dedicated instructions to support both LDPC and turbo decoding) and achievable throughput can be evaluated. By choosing the right amount of parallelism, for instance by applying a single Instruction multiple-data (SIMD)-based computation scheme, the throughput can be adapted to the system requirements. Limited, of course, by the inherent parallelism given by the targeted algorithms (see Priewasser, at least paragraph [0135]; [0145]).
Therefore, it would have been obvious statement before the effective filing date of the claimed invention to have a system comprises a method as taught by Priewasser. The motivation for doing this is to provide a system networks can avoid bottlenecks due to memory latencies.
Allowable Subject Matter
Claims 5, 6 and 12 would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims set forth in this Office action.
Conclusion
The prior arts made or record and not relied upon are considered pertinent to applicant's disclosures. Panteleev et al. (U.S 2018/0226992), discloses an LDPC decoder at a receiver is used for decoding the received codewords. LDPC codes of various rates are being widely adopted, or considered for adoption, in data storage and wireless communications technologies and standards such as those relating to IEEE 802.11 and 5G.
Baldemair et al. (U.S 2020/0374065), discloses Encoding and/or modulating may comprise error detection coding and/or forward error correction encoding and/or scrambling. Receiving control signaling may comprise corresponding decoding and/or demodulation. Error detection coding may comprise, and/or be based on, parity or checksum approaches.
Kalachev et al. (U.S 10,735,138), discloses a method for generating a code, a method for encoding and decoding data, and an encoder and a decoder performing the encoding and decoding and devices for encoding/decoding data using LDPC. Various embodiments include offset lifting procedures to determine a circulant offset to encode/decode data.
Ma et al. (U.S 2019/0349006), discloses the LDPC code may be used as an error-correcting code in a communications system
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAN HUONG TRUONG whose telephone number is (571)270-5829. The examiner can normally be reached on Mon-Fri (7:30AM-5:00PM).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, RICKY NGO can be reached on 571-272-3139. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LAN-HUONG TRUONG/Primary Examiner, Art Unit 2464
07/15/2026
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