Office Action Predictor
Last updated: April 15, 2026
Application No. 18/380,706

METHOD FOR MANUFACTURING AN OPTOELECTRONIC DEVICE

Non-Final OA §102§103
Filed
Oct 17, 2023
Examiner
YI, CHANGHYUN
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Foshan Nationstar Optoelectronics Co., LTD.
OA Round
1 (Non-Final)
94%
Grant Probability
Favorable
1-2
OA Rounds
1y 9m
To Grant
96%
With Interview

Examiner Intelligence

Grants 94% — above average
94%
Career Allow Rate
989 granted / 1056 resolved
+25.7% vs TC avg
Minimal +3% lift
Without
With
+2.6%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 9m
Avg Prosecution
49 currently pending
Career history
1105
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
34.4%
-5.6% vs TC avg
§102
35.9%
-4.1% vs TC avg
§112
12.5%
-27.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1056 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 4-5, 12 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jang (US 20200091215). Regarding claim 1. Jang discloses A method for manufacturing an optoelectronic device [0058], comprising following steps: S1: dividing a monolithic substrate 110 (Fig 6B) into a plurality of device unit regions (Fig 6B: each G region); forming a first pad and a second pad in each of the plurality of device unit regions on a front (front layer of 11) of the monolithic substrate (refer to Fig 6B for detail labels, see also attached annotated Fig 6B for labels of each element); PNG media_image1.png 299 907 media_image1.png Greyscale forming a first electrode, a second electrode and a metal reinforcing plate in the each of the plurality of device unit regions on a back (back layer of 11) of the monolithic substrate (see also attached annotated Fig 6B, [0045]), wherein the first electrode is electrically connected to the first pad (Fig 6B, see also attached annotated Fig 6B), the second electrode is electrically connected to the second pad (Fig 6B, see also attached annotated Fig 6B), and the metal reinforcing plate is located between the first electrode and the second electrode and has same thickness as the first electrode and the second electrode (see also attached annotated Fig 6B), so that a device unit (Fig 6B: the unit in each G including 11) is formed in the each of the plurality of device unit regions, thereby obtaining a monolithic circuit board comprising a plurality of device units (Fig 6B); S2: mounting a chip 10 on the first pad of the device unit, and electrically connect the chip to the second pad to obtain a monolithic circuit board with chips (Fig 6D); S3: encapsulating (via 120) the monolithic circuit board with the chips to obtain a monolithic optoelectronic device (Fig 6E, [0073]; [0058]: because 10 is ‘optoelectronic device’); and S4: cutting the monolithic optoelectronic device into individual optoelectronic devices (Fig 6H, [0080]). Regarding claim 4. Jang discloses The method for manufacturing the optoelectronic device according to claim 1, wherein in the step S1, in a length direction (horizontal direction) of the monolithic circuit board, a spacing (“NG” region) between adjacent ones (the left “G” and right “G” from the “NG” region) of the plurality of device units is greater than or equal to 0.8 times a width of one device unit in the length direction (Fig 6C: because of the ”NG” region in G/NG/G periodic array, the spacing is 1 times). Regarding claim 5. Jang discloses The method for manufacturing the optoelectronic device according to claim 4, wherein in the step S1, in the length direction of the monolithic circuit board, the spacing between the adjacent ones of the plurality of device units is 0.8 to 1 times the width of one device unit in the length direction (Fig 6D: because of the “NG” region in G/NG/G periodic array, the spacing is 1 times). Regarding claim 12. Jang discloses An optoelectronic device ([0053]: ST) manufactured by the method for manufacturing the optoelectronic device according to claim 1 (Fig 6H, [0058]). Regarding claim 15. Jang discloses The optoelectronic device according to claim 12, wherein an area of the chip is greater than or equal to 0.6 times an area of the optoelectronic device (Fig 6H: the width of 10 is at least 4 times greater than an area of each 150 which is a part of area of the ST because the four of 150 are within the width dimension of 10). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 6-8 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Jang (US 20200091215). Regarding claim 6. Jang discloses The method for manufacturing the optoelectronic device according to claim 5. But Jang does not explicitly disclose wherein a thickness of the monolithic substrate is less than or equal to 0.25 times a thickness of the optoelectronic device. However, in the applicant field of endeavor, thickness of a redistribution layer ([0028]: Jang’s the monolithic substrate 110) in modern semiconductor packaging is typically much less than the thickness of the mounted chip (die) for the purpose of providing enhanced miniaturization and space saving. Furthermore, the ordinary artisan would have recognized the claimed range to be a result effective variable affecting to make proper device integration with enhanced electrical performance because shorter, thinner, and finer-pitched interconnects result in reduced parasitic capacitance and inductance compared to thicker, bulkier connections. Thus, it would have been obvious that the Jang’ method within the claimed range, since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B It is further noted that the specification contains no disclosure of either the critical nature of instant claimed range or any unexpected results arising thereof. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578,16 USPQ2d 1934,1936 (Fed Cir.1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art). Regarding claim 7. Jang discloses The method for manufacturing the optoelectronic device according to claim 6, wherein an area of the chip is greater than or equal to 0.6 times an area of the optoelectronic device (Fig 6H: the width of 10 is at least 4 times greater than an area of each 150 which is a part of area of the ST because the four of 150 are within the width dimension of 10). Regarding claim 8. Jang discloses The method for manufacturing the optoelectronic device according to claim 7, wherein the thickness of the optoelectronic device is less than 1 mm; and when viewed from a top of the optoelectronic device, the optoelectronic device has a square shape with a length and a width each greater than or equal to 3 mm. But Jang does not explicitly disclose wherein the thickness of the optoelectronic device is less than 1 mm; and when viewed from a top of the optoelectronic device, the optoelectronic device has a square shape with a length and a width each greater than or equal to 3 mm. However, Jang discloses the substantially tallest part of 125 in the device has 150 μm [0034]. Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the thickness is less than 1 mm for the purpose of providing enhanced space efficiency, cost reduction, and improved performance. It is further noted that the specification contains no disclosure of either the critical nature of instant claimed range or any unexpected results arising thereof. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578,16 USPQ2d 1934,1936 (Fed Cir.1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art). Furthermore, Fig 1 of Jang discloses optoelectronic device has a square shape when viewed from a top of the optoelectronic device. But Jang does not explicitly disclose claimed range of dimension. However, the ordinary artisan would have recognized the claimed dimension range to be a result effective variable. Thus, it would have been obvious that Jang’s device within the claimed range, since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B It is further noted that the specification contains no disclosure of either the critical nature of instant claimed range or any unexpected results arising thereof. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578,16 USPQ2d 1934,1936 (Fed Cir.1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art). Regarding claim 16. Jang discloses The optoelectronic device according to claim 12. But Jang does not explicitly disclose wherein the thickness of the optoelectronic device is less than 1 mm; and when viewed from a top of the optoelectronic device, the optoelectronic device has a square shape with a length and a width each greater than or equal to 3 mm. However, Jang discloses the substantially tallest part of 125 in the device has 150 μm [0034]. Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the thickness is less than 1 mm for the purpose of providing enhanced space efficiency, cost reduction, and improved performance. It is further noted that the specification contains no disclosure of either the critical nature of instant claimed range or any unexpected results arising thereof. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578,16 USPQ2d 1934,1936 (Fed Cir.1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art). Furthermore, Fig 1 of Jang discloses optoelectronic device has a square shape when viewed from a top of the optoelectronic device. But Jang does not explicitly disclose claimed range of dimension. However, the ordinary artisan would have recognized the claimed dimension range to be a result effective variable. Thus, it would have been obvious that Jang’s device within the claimed range, since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B It is further noted that the specification contains no disclosure of either the critical nature of instant claimed range or any unexpected results arising thereof. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578,16 USPQ2d 1934,1936 (Fed Cir.1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art). Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Jang (US 20200091215) in view of Miyazaki (US 20040154163). Regarding claim 9. Jang discloses The method for manufacturing the optoelectronic device according to claim 8. But Jang does not explicitly disclose wherein in the step S3, the encapsulation comprises: absorbing, by an upper die of a die press, a back of the monolithic circuit board with the chips; injecting encapsulation adhesive into a lower die of the die press; and closing the upper die and the lower die. However, the claimed encapsulation process is well known as ‘transfer molding’ (or plastic encapsulation), commonly used in semiconductor packaging to protect electronic chips. For example, Miyazaki discloses the claimed transfer molding process [0127]. Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the Miyazaki’s transfer molding process within Jang’s encapsulation process for the purpose pf providing a robust, non-hermetic seal to protect the semiconductor device from environmental factors. Allowable Subject Matter Claims 2-3, 10-11 and 13-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 2. the cited prior art of record does not teach or fairly suggest, along with the other claimed features, “a maximum width of the metal reinforcing plate in a first direction is greater than ½ of a spacing between the first electrode and the second electrode, and a width of the metal reinforcing plate in a second direction is greater than ½ of a width of the device unit in the second direction; the first direction is a direction connecting a center point of the first electrode to a center point of the second electrode, and the second direction is a direction parallel to the back of the monolithic substrate and orthogonal to the first direction”. Regarding claim 13. the cited prior art of record does not teach or fairly suggest, along with the other claimed features, “a maximum width of the metal reinforcing plate in a first direction is greater than ½ of a spacing between the first electrode and the second electrode, and a width of the metal reinforcing plate in a second direction is greater than ½ of a width of the device unit in the second direction; the first direction is a direction connecting a center point of the first electrode to a center point of the second electrode, and the second direction is a direction parallel to the back of the monolithic substrate and orthogonal to the first direction”. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Changhyun Yi whose telephone number is (571)270-7799. The examiner can normally be reached Monday-Friday: 8A-4P. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached on 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Changhyun Yi/Primary Examiner, Art Unit 2812
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Prosecution Timeline

Oct 17, 2023
Application Filed
Jan 21, 2026
Non-Final Rejection — §102, §103
Apr 02, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
94%
Grant Probability
96%
With Interview (+2.6%)
1y 9m
Median Time to Grant
Low
PTA Risk
Based on 1056 resolved cases by this examiner. Grant probability derived from career allow rate.

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