Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to the application No. 18/380,923 filed on October 17, 2023.
Priority
3. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
4. Acknowledgement is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Specification
5. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “Light Emitting Device Comprising a Plurality of Light Emitting Units in Stacked Semiconductor Films”.
Claim Objections
6. Claim 1 is objected to because of the following informalities: In the following, the claim should be recited to avoid indefiniteness due to lack of antecedent basis, and/or perform proper alignment along with the prior claim languages/phrases:
1. (Currently Amended) A light emitting device comprising:
a plurality of light emitting units located side by side on a single substrate and each emitting light independently, wherein:
each of the plurality of light emitting units includes:
an n-type semiconductor layer;
a light emitting layer above the n-type semiconductor layer;
a p-type semiconductor layer above the light emitting layer;
a p-side contact electrode connected to an upper surface of the p-type semiconductor layer; and
a p-side junction electrode connected to an upper surface of the p-side contact electrode;
the n-type semiconductor layer and the p-type semiconductor layer of the plurality of light emitting units are respectively provided in an n-type semiconductor film and a p-type semiconductor film, which are single continuous films commonly used for the plurality of light emitting units;
an n-side junction electrode is commonly connected to the n-type semiconductor layer of the plurality of light emitting units; and
the width of the p-side contact electrode is smaller than the width of the p-side junction electrode.
Appropriate correction is needed.
Claim Rejections - 35 USC § 103
7. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
9. This application currently names joint inventors. In considering patentability of the claims under pre-AIA 35 U.S.C. 103(a), the examiner presumes that the subject matter of the various claims was commonly owned at the time any inventions covered therein were made absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and invention dates of each claim that was not commonly owned at the time a later invention was made in order for the examiner to consider the applicability of pre-AIA 35 U.S.C. 103(c) and potential pre-AIA 35 U.S.C. 102(e), (f) or (g) prior art under pre-AIA 35 U.S.C. 103(a).
10. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
a. Determining the scope and contents of the prior art.
b. Ascertaining the differences between the prior art and the claims at issue.
c. Resolving the level of ordinary skill in the pertinent art.
d. Considering objective evidence present in the application indicating obviousness or non-obviousness.
11. Claims 1-5 are rejected under 35 U.S.C. 103 as being unpatentable over Goshonoo (US 2021/0305457 A1) in view of Toyota (US 2014/0327034 A1).
Regarding independent claim 1, Goshonoo teaches a light emitting device (3, Fig. 3, para [0077]) comprising:
a plurality of light emitting units (30: 30a-30c, para [0077]) located side by side on a single substrate (31, para [0077]) and each emitting light independently (para [0077]), wherein:
each (30a) of the plurality of light emitting units (30: 30a-30c) includes:
an n-type semiconductor layer (32, para [0078]);
a light emitting layer (33/34, para [0078] called 1st and 1st intermediate layers) above the n-type semiconductor layer (32);
a p-type semiconductor layer (39, para [0078]) above the light emitting layer;
a p-side contact electrode (40a, para [0078]) connected to an upper surface of the p-type semiconductor layer (39); and
a p-side junction electrode (41a, [0078]) connected to an upper surface of the p-side contact electrode (40a);
the n-type semiconductor layer (32) and the p-type semiconductor layer (39) of the plurality of light emitting units (30: 30a-30c) are respectively provided in an n-type semiconductor film (32) and a p-type semiconductor film (39), which are single continuous films (see Fig. 3, wherein 32 and 39 layers are common to all of the light-emitting elements, 30: 30a-30c) commonly used for the plurality of light emitting units (30: 30a-30c);
an n-side junction electrode (42, para [0082]) is commonly connected to the n-type semiconductor layer (32) of the plurality of light emitting units (30: 30a-30c); and
the width of the p-side contact electrode (40a) is unequal to the width of the p-side junction electrode (41a).
Goshonoo is explicitly silent of disclosing wherein, the width of the p-side contact electrode is smaller than the width of the p-side junction electrode.
Toyota teaches wherein (Fig. 1), the width of the p-side contact electrode (109, para [0039]) is smaller than the width of the p-side junction electrode (113, para [0039]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Toyota, and modify the p-side junction electrode along with greater shape/size on the light emitting element of Goshonoo, in order to improve the light emission efficiency (para [0074]).
Regarding claim 2, Goshonoo and Toyota teach all of the limitations of claim 1 from which this claim depends.
Goshonoo teaches wherein (Fig. 3), the p-side junction electrode (41a) does not cover a side surface of the p-side contact electrode (40a).
Regarding claim 3, Goshonoo and Toyota teach all of the limitations of claim 1 from which this claim depends.
Toyota teaches wherein (Fig. 1), the p-side junction electrode (113) covers a side surface of the p-side contact electrode (109).
Regarding claim 4, Goshonoo and Toyota teach all of the limitations of claim 1 from which this claim depends.
Goshonoo teaches wherein (Fig. 3), in the plurality of light emitting units (30: 30a-30c), adjacent light emitting units emit light in different colors (para [0100]).
Regarding claim 5, Goshonoo and Toyota teach all of the limitations of claim 1 from which this claim depends.
Goshonoo teaches wherein (Fig. 3), the n-side junction electrode (42) is located outside the plurality of light emitting units (30: 30a-30c).
Examiner’s Note
12. Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182.
Examiner has cited particular paragraphs and/or columns/lines in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
13. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DIDARUL MAZUMDER whose telephone number is (571)272-8823. The examiner can normally be reached M-F 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
14. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at 571-270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DIDARUL A MAZUMDER/Primary Examiner, Art Unit 2812
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