Prosecution Insights
Last updated: May 29, 2026
Application No. 18/381,038

Method for fabricating radiation-hardened heterojunction photodiodes

Non-Final OA §112
Filed
Oct 17, 2023
Priority
Oct 20, 2022 — FR 2210840
Examiner
MUSE, ISMAIL A
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
OA Round
2 (Non-Final)
86%
Grant Probability
Favorable
2-3
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
538 granted / 622 resolved
+18.5% vs TC avg
Moderate +8% lift
Without
With
+8.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
16 currently pending
Career history
658
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
83.1%
+43.1% vs TC avg
§102
13.0%
-27.0% vs TC avg
§112
3.3%
-36.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 622 resolved cases

Office Action

§112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claim(s) presented have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-12 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The claims are rejected specifically in view of the limitation “comprising InGaAsP, InP, InAlAs, AlInAs, AlInGaAs, AlGaAsSb, or AlInAsSb” with regards to the claimed doped electron collection layer and the surface barrier layer. As noted from a study of the specification of the present application, there does not seem to be support for the claimed limitation. Regarding the surface barrier layer as disclosed in paragraph 94 of the publish application, it is noted that the layer is said to comprise InP, InAlAs, AlAsSb, AlGaAsSb or AlInAsSb. However, there is not clear support to indicate that the layer comprises InGaAsP, AlInAs, and AlAsSb as claimed. Regarding the doped electron collection layer, there seems to no support of any specific material, talk less of the list of materials claimed. For examination purpose, the claims will be addressed as presented. Claim Objections Claim 3 is objected to because of the following informalities: In claim 3, limitation “UTC photodiode” is claimed. Although a person having ordinary skills in the art understands that UTC stands for Uni-Traveling Carrier, it is recommended to claim the that the photodiode is an Uni-Traveling Carrier PhotoDiode –specifically due to the fact that UTC is an abbreviation. Appropriate correction is required. Claim 4 is objected to because of the following informalities: In claim 4, limitation “APD photodiode” is claimed. However, a person having ordinary skills in the art understands that APD stands for Avalanche PhotoDiode, so the claiming that the photodiode is APD photodiode seem redundant because APD photodiode would be translated as “Avalanche PhotoDiode photodiode”. Thus, is recommended to claim the that the photodiode is an Avalanche PhotoDiode. Appropriate correction is required. Allowable Subject Matter Claim 1 could be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as detailed above in this Office action. Prior Art Listed in the attached PTO-892 Form are prior art disclosing similar structure as the claimed invention. However, the prior arts singularly do not anticipate nor in combination make obvious the claimed invention. The closest prior art to the claimed invention being Reverchon et al. [US PGPUB 20180233619] (hereinafter Reverchon). Regarding claim 1, Reverchon teaches a method for fabricating an optoelectronic component comprising at least one photodiode, the method comprising at least the steps of: producing multiple epitaxial growths (Para 55/134-138) on at least an upper part of a semiconductor substrate (C1, Fig. 2, Para 55/57/134-138) to obtain a stack of semiconductor layers (Para 68/82/98), the stack being composed, above the substrate (Fig. 2) and composed of: a p-type absorption layer (C2, Para 84) formed from a first epitaxial growth (Fig. 2, Para 134), a doped electron collection layer (C3, Para 84, at least weakly doped) comprising InGaAsP, InP, InAlAs. AlInAs, AlInGaAs, AlGaAsSb, or AlInAsSb (i.e., AlGaAsSb, Para 86) with a thickness of 20 nm to 200 nm formed from a second epitaxial growth (Para 89/136, Fig. 2); and a surface barrier layer (C4, Para 92) formed from a third epitaxial growth (Para 137); and producing an n-doping-based pixelation (D, Para 149/157; n-doping in view of contact C adapted to the collection of electrons. This is an ohmic contact doped n (Para 157) –i.e., when contact C is n doped, it only reasonable to have the pixelation D be n-doped in order to have low resistance and a proper ohmic contact) at the surface barrier layer (Fig. 2), the pixelation comprising metallizations to create electrical contacts (C, Para 152) for said at least one photodiode (Fig. 2), firstly on the n-doped pixelated surface barrier layer (Fig. 2). Reverchon does not specifically disclose that the semiconductor substrate is a p-doped semiconductor substrate; that the surface barrier layer comprises InGaAsP, InP, InAlAs. AlInAs, AlInGaAs, AlGaAsSb, or AlInAsSb; and metallizations to create electrical contacts for said at least one photodiode secondly on the p-doped upper part of the semiconductor substrate. However, a person having ordinary skills in the art will understand that the limitations not specifically disclosed can be made obvious except for the claim that the surface barrier layer comprises InGaAsP, InP, InAlAs. AlInAs, AlInGaAs, AlGaAsSb, or AlInAsSb metallizations to create electrical contacts for said at least one photodiode secondly on the p-doped upper part of the semiconductor substrate (wherein the electrical contact being on an upper part of the substrate is understood being in physical contact with an upper part of the substrate). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ISMAIL A MUSE whose telephone number is (571)272-1470. The examiner can normally be reached Monday - Friday 8:00 AM-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571)270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ISMAIL A MUSE/ Primary Examiner, Art Unit 2812
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Prosecution Timeline

Oct 17, 2023
Application Filed
Dec 18, 2025
Non-Final Rejection mailed — §112
Apr 09, 2026
Applicant Interview (Telephonic)
Apr 09, 2026
Examiner Interview Summary
Apr 17, 2026
Response Filed
May 01, 2026
Final Rejection (signed) — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
86%
Grant Probability
94%
With Interview (+8.0%)
2y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 622 resolved cases by this examiner. Grant probability derived from career allowance rate.

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