Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to application No. 18381757 filed on 10/19/2023.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election with traverse of claims 1-4, 6-7, 9-11, 13-16 in the reply filed on 04/17/2026 is acknowledged.
Applicant’s traversal is persuasive, accordingly claims 1-16 are considered for examination.
Allowable subject matter
Claims 6-9, 16 are objected to as being dependent upon a rejected base claim (independent claims 1 & 10), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Kim et al. (US 2022/0254958).
With respect to dependent claims 6-9, the cited prior art does not anticipate or make obvious, inter alia, the step of: “further comprising a planarization layer covering a part of the first lower assembly electrode and including an assembly groove, wherein the light emitting diode is disposed in the assembly groove”.
With respect to dependent claim 16, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the second lower auxiliary electrode is disposed between the first lower auxiliary electrode and the light emitting diode to be in contact with the first electrode or the second electrode”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5, 10-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2022/0254958).
Regarding independent claim 1, Kim et al. teach a display device, comprising:
a substrate (Fig. 3, element SUB, paragraph 0086) including a plurality of sub pixels (Fig. 3, elements PXL1, PXL2, PXL3, paragraph 0086);
a first lower assembly electrode (Fig. 8, element AE1, paragraph 0114) disposed in the plurality of sub pixels;
a first assembly line (Fig. 8, element ME2, paragraph 0114) disposed in the plurality of sub pixels and disposed on a layer different from that of the first lower assembly electrode;
a light emitting diode (Fig. 8, element LD, paragraph 0068) disposed on the first lower assembly electrode and the first assembly line and including a first electrode (Figs. 2 & 8, element 11, paragraph 0069), a semiconductor layer (Figs. 2 & 8, element 12, paragraph 0069) and a second electrode (Figs. 2 & 8, element 13, paragraph 0069); and
a second lower assembly electrode (Fig. 8, element ME1, paragraph 0114) disposed between the first lower assembly electrode and the light emitting diode and electrically connected to the first electrode or the second electrode (Fig. 8).
Regarding claim 2, Kim et al. teach wherein the first lower assembly electrode and the second lower assembly electrode are electrically connected (paragraph 0114-0123).
Regarding claim 3, Kim et al. teach wherein the first assembly line and the first electrode are electrically connected (paragraph 0114-0123).
Regarding claim 4, Kim et al. teach further comprising a chip contact electrode (Figs. 5 & 8, element CE2, paragraph 0130) which connects the first assembly line and the first electrode, wherein the chip contact electrode is in contact with a side surface of the light emitting diode.
Regarding claim 5, Kim et al. teach wherein the first assembly line is connected to a low potential power pad (Figs. 4 & 8, element VSS, paragraph 0114-0123) to which a low potential power is applied (paragraph 0098).
Regarding independent claim 10, Kim et al. teach display device, comprising:
a substrate (Fig. 3, element SUB, paragraph 0086) including a plurality of sub pixels (Fig. 3, elements PXL1, PXL2, PXL3, paragraph 0086);
a first assembly line (Figs. 5 & 8, element CE1, paragraph 0130) and a second assembly line (Figs. 5 & 8, element CE2, paragraph 0130) disposed in parallel in the plurality of sub pixels;
a plurality of light emitting diodes (Figs. 5 & 8, elements LD, paragraph 0068) disposed on the substrate and each light emitting diode overlapping with the first assembly line or the second assembly line; and
a first lower auxiliary electrode (Fig. 8, element AE1, paragraph 0114) and a second lower auxiliary electrode (Fig. 8, element AE2, paragraph 0114) overlapping with the light emitting diode and one of the first assembly line and the second assembly line, under the light emitting diode (Fig. 8).
Regarding claim 11, Kim et al. teach wherein the plurality of sub pixels disposed in a first direction on the substrate share the first assembly line and the second assembly line (Figs. 1, 5, 8).
Regarding claim 12, Kim et al. teach wherein further comprising a low potential voltage pad (Figs. 4 & 8, element VSS, paragraph 0117) disposed on one surface of the substrate and to which a low potential power (paragraph 0098) is applied, wherein the first assembly line and the second assembly line are connected to the low potential voltage pad.
Regarding claim 13, Kim et al. teach wherein at least two light emitting diodes (Figs. 5, 8) are disposed in each of the plurality of sub pixels.
Regarding claim 14, Kim et al. teach further comprising a driving transistor (Figs. 4 & 8, element T1, paragraph 0103) on the substrate and electrically connected to the light emitting diode.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2022/0254958) in view of Li et al. (US 10,593,265).
Regarding claim 15, Kim et al. teach wherein the driving transistor is disposed in each of the plurality of sub pixels (Figs. 4 & 8).
Kim et al. do not explicitly disclose wherein sizes of the driving transistors in at least two sub pixels are different.
Li et al. teach a display device comprising wherein sizes of the driving transistors in at least two sub pixels are different (Col. 5, lines 25-39).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Kim et al. according to the teachings of Li et al. with the motivation to “ensure that sub-pixels of different colors can emit light of the same brightness with the same data voltage” (Col. 5, lines 25-29).
Cited Prior Art
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant.
Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHAHED AHMED/
Primary Examiner, Art Unit 2813
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