DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendments
2. The Amendments filed April 30th, 2026 are noted. Applicant’s amendments to the Specification to overcome the objections set forth in the Non-Final Office Action mailed 02/02/2026 are noted. Applicant’s amendment(s) to the Specification have overcome the objection(s) to the Title previously set forth in the Non-Final Office Action mailed 02/02/2026, so the objection(s) to the Title has been withdrawn.
Applicant’s amendment(s) to the Claims have overcome the objection(s) to minor grammatical informalities previously set forth in the Non-Final Office Action mailed 02/02/2026, so the objection(s) to minor grammatical informalities has been withdrawn.
Applicant’s amendment(s) to the claims have overcome the 35 U.S.C. § 112 rejection(s)
previously set forth in the Non-Final Office Action mailed 02/02/2026, so the 35 U.S.C. § 112
rejection(s) have been withdrawn.
Applicant’s amendments to the claims are noted.
3. Claims 1-20 remain pending in the application.
4. Claims 1-20 have been fully considered in examination.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 06/09/2026 and 06/11/2026 is/are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) is/are being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-11 are rejected under 35 U.S.C. 103 as being unpatentable over Zang (U.S. PG Pub No US2022/0130885A1) (of record) in view of Manouvrier (U.S. PG Pub No US2015/0279883A1).
Regarding claim 1, Zang teaches an image sensor (600/1200) [0038, 0068] (see fig. 6 for top view; see fig. 12 for cross-sectional view) comprising:
a semiconductor substrate (610) fig. 12 [0068] having first (top) and second (bottom) surfaces opposed to each other;
a photoelectric conversion region (comprising 640 (1-4)) fig. 6 [0042] in the semiconductor substrate (610);
a floating diffusion region (660) fig. 6 [0042] adjacent to the first (top) surface in the semiconductor substrate (610); and
a vertical transfer gate (680/1280) fig. 6/fig. 12 [0046, 0069] on the first (top) surface of the semiconductor substrate (610), and extending in a (vertical) direction perpendicular to the first (top) surface and connected to (electrically connected to for control of charge) [0042-0043] the photoelectric conversion region (640), and the vertical transfer gate (680/1280) transferring photocharges collected in the photoelectric conversion region (comprising 640 (1-4)) to the floating diffusion region (660) [0042-0043],
wherein the vertical transfer gate (680/1280) includes:
a first vertical electrode portion (left 1282) fig. 12 [0068] and a second vertical electrode portion (right 1282) fig. 12 [0068] extending from the first (top) surface of the semiconductor substrate (610) in the vertical direction, and connected (electrically connected to for control of charge) [0042-0043] to the photoelectric conversion region (comprising 640 (1-4)), respectively, and
an electrode pad portion (surface of 1270 for connections) fig. 12 [0068] on (directly-on) the first (top) surface of the semiconductor substrate (610), connected to the first (left 1282) and second (right 1282) vertical electrode portions (1282), and having a concave portion (CCP) (see annotated fig. 12 below) adjacent to the floating diffusion region (640).
[AltContent: oval][AltContent: connector][AltContent: textbox (CCP)][AltContent: textbox (Inward-Indentation creates U-shaped portion of 1270 which is concave)][AltContent: arrow]
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Annotated fig. 12 of Zang
However, Zang does not explicitly disclose an electrode pad portion (surface of 1270 for connections) fig. 12 [0068] having a concave portion when viewed in a plan view (concave features visible in cross-sectional view instead).
Manouvrier teaches an image sensor comprising an electrode pad portion (surface of TTG for connections) fig. 12 [0060] having a concave portion (u-shape overall; entire shape is a ‘concave portion’) when viewed in a plan view [see fig. 12, 0060].
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the shape of the top of the electrode pad portion to have a u-shape overall such that all portions of the electrode pad are portions of a concave shape [0060] in order to enhance the amount of transfer gate material in an individual image sensor pixel [0060] as well as the interconnectivity thereof [0060], as taught by Manouvrier.
Regarding claim 2, Zang in view of Manouvrier teaches the image sensor (600/1200) [0038, 0068] as claimed in claim 1. Zang in view of Manouvrier also teaches wherein the concave portion (CCP) (see annotated fig. 12 above) is located between (outer sidewall) portions of the electrode pad portion (surface of 1270 for connections) fig. 12 [0068] connected to the first (left 1282) fig. 12 [0068] and second (right 1282) fig. 12 [0068] vertical electrode portions.
Regarding claim 3, Zang in view of Manouvrier teaches the image sensor (600/1200) [0038, 0068] as claimed in claim 1. Zang in view of Manouvrier also teaches wherein the vertical transfer gate (1280) fig. 12 [0046, 0069] further includes a transfer gate spacer (1275) fig. 12 [0069] along a side (bottom side) surface of the electrode pad portion (surface of 1270 for connections) on the first (top) surface of the semiconductor substrate (610) fig. 12 [0068].
Regarding claim 4, Zang in view of Manouvrier teaches the image sensor (600/1200) [0038, 0068] as claimed in claim 3. Zang in view of Manouvrier also teaches wherein the transfer gate spacer (1275) fig. 12 [0069] includes a spacer extension portion (vertically-extending portion of 1275 laterally-surrounding 1282’s) extending into the semiconductor substrate (610) fig. 12 [0068] from the first (top) surface between the vertical transfer gate (1280) fig. 12 [0046, 0069] and the floating diffusion region (660) fig. 6 [0042] (because 1275 surrounds 1282, 1275 between 1282 and 660 of fig. 6).
Regarding claim 5, Zang in view of Manouvrier teaches the image sensor (600/1200) [0038, 0068] as claimed in claim 4. Zang in view of Manouvrier (with reference to Manouvrier) also teaches wherein the spacer extension portion (vertically-extending portion of TTG-I insulating material of TTG [0060]) (see also fig. 8F for example of TGI insulating spacer layer label [0049]) has a portion extending along the concave portion (periphery of concave TTG [0060]) when viewed in a plan view [see fig. 12 of Manouvrier].
Regarding claim 6, Zang in view of Manouvrier teaches the image sensor (600/1200) [0038, 0068] as claimed in claim 1. Zang in view of Manouvrier also teaches wherein the first (left 1282) fig. 12 [0068] vertical electrode portion, the second (right 1282) vertical electrode portion, and the electrode pad portion (surface of 1270 for connections) fig. 12 [0068] have an integrated structure (“integrally formed” [0068]) containing the same material (metal) [0068].
Regarding claim 7, Zang in view of Manouvrier teaches the image sensor (600/1200) [0038, 0068] as claimed in claim 1. Zang in view of Manouvrier (with reference to Manouvrier) also teaches wherein the concave portion (overall TTG) fig. 12 [0060] includes a concave curved portion (CCP ‘portion’ defined with curved sidewalls, see annotated fig. 12 below) when viewed in a plan view (see annotated fig. 12 of Manouvrier below).
[AltContent: textbox (CCP subportion)][AltContent: arrow][AltContent: ]
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Annotated fig. 12 of Manouvrier
Regarding claim 8, Zang in view of Manouvrier teaches the image sensor (600/1200) [0038, 0068] as claimed in claim 1. Zang in view of Manouvrier also teaches wherein the electrode pad portion (surface of 1270 for connections) fig. 12 [0068] has a left-right symmetrical structure (right/left 638 representing underside of 1270 “mirror symmetric” over 626 plane) [see fig. 6, 0049] with respect to the concave portion (CCP) when viewed in a plan view.
Regarding claim 9, Zang in view of Manouvrier teaches the image sensor (600/1200) [0038, 0068] as claimed in claim 1. Zang in view of Manouvrier also teaches wherein the electrode pad portion (surface of 1270 for connections) fig. 12 [0068] has a left-right asymmetric structure (right/left 638 representing underside of 1270 asymmetric over B2-axis) [see fig. 6, 0045] with respect to the concave portion (CCP) when viewed in a plan view (see fig. 6).
Regarding claim 10, Zang in view of Manouvrier teaches the image sensor (600/1200) [0038, 0068] as claimed in claim 9. Zang in view of Manouvrier also teaches wherein:
the floating diffusion region (660) fig. 6 [0042] is closer to the second vertical electrode portion (closer to inner side of right 1282 / 632 facing towards 660 in fig. 6) [0046] than the first vertical electrode portion (outer side of left 1282 / 631 facing away from 660 in fig. 6) [0046], and the concave portion (CCP) [see annotated fig. 12 above] is located close to (bordering) the second vertical electrode portion (right 1282) fig. 12 [0068] in a region adjacent to the electrode pad portion (surface of 1270 for connections) [0068].
Regarding claim 11, Zang in view of Manouvrier teaches the image sensor (600/1200) [0038, 0068] as claimed in claim 1. Zang in view of Manouvrier also teaches wherein:
the vertical transfer gate (680/1280) fig. 6/fig. 12 [0046, 0069] further includes a gate insulating film (1275) fig. 12 [0069] along an interface with the semiconductor substrate (610) fig. 12 [0068], and the gate insulating film (1275) extends on the first (top) surface of the semiconductor substrate (610).
Claims 12-17 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (U.S. PG Pub No US2020/0381473A1) (of record) in view of Mase (U.S. PG Pub No US2013/0120735A1).
Regarding claim 12, Kim teaches an image sensor [0111], comprising:
a semiconductor substrate (110) fig. 17 [0111] having first (top = 110a) [0111] and second (bottom = 110b) [0112] surfaces opposed to each other and having a plurality of pixels (PX1, PX2) fig. 16 [0111] arranged thereon;
a first isolation structure (DI) fig. 17 [0111] penetrating through the semiconductor substrate (110), and defining the plurality of pixels (PX1, PX2);
a second isolation structure (middle 3 between TG 1 and TG2) fig. 17 [0046, 0111] penetrating through the semiconductor substrate (110), and dividing each of the plurality of pixels (PX 1-2) into a first sub-pixel (left half of PX) and a second sub-pixel (right half of PX),
a first photoelectric conversion region (PD1) fig. 17 [0111] and a second photoelectric conversion region (PD2) fig. 17 [0111] in the semiconductor substrate (110), and respectively located (at least partially) in the first sub-pixel (left half of PX) and the second sub-pixel (right half of PX) of each of the plurality of pixels (PX);
a first floating diffusion region (FD1) fig. 17 [0111] and a second floating diffusion region (FD2) fig. 17 [0111] adjacent to the first surface (110a) in the semiconductor substrate (110), and respectively located in the first sub-pixel (left half of PX) and the second sub-pixel (right half of PX) of each of the plurality of pixels (PX);
a first vertical transfer gate (TG1) fig. 17 [0111], in the first sub-pixel (left half of PX) of each of the plurality of pixels (PX), the first vertical transfer gate (TG1) having a first pair of vertical electrode portions (RP1, LP1) [see annotated fig. 17 below] extending from the first surface (110a) and connected to the first photoelectric conversion region (PD1), and a first electrode pad portion (EP1) respectively connected to the first pair (RP1, LP1) of vertical electrode portions on the first surface (110a), and having a first concave portion (CCP1) in a region, adjacent to the first floating diffusion region (FD1) [see annotated fig. 17 below]; and
a second vertical transfer gate (TG2) fig. 17 [0111], in the second sub-pixel (right half of PX) of each of the plurality of pixels (PX), the second vertical transfer gate (TG2) having a second pair of vertical electrode portions (RP2, LP2) extending from the first surface (110a) and connected to the second photoelectric conversion region (PD2), and a second electrode pad portion (EP2) respectively connected to the second pair of vertical electrode portions (RP2, LP2) on the first surface (110a), and having a second concave portion (CCP2) in a region, adjacent to the second floating diffusion region (FD2) [see annotated fig. 17 below].
[AltContent: textbox (Inward-Indentation creates L-shaped portion of TG2 which is concave (CCP2))][AltContent: textbox (Inward-Indentation creates L-shaped portion of TG1 which is concave (CCP1))][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: textbox (EP2)][AltContent: textbox (EP1)][AltContent: arrow][AltContent: rect][AltContent: rect][AltContent: oval][AltContent: oval][AltContent: arrow][AltContent: arrow][AltContent: textbox (RP2)][AltContent: textbox (LP2)][AltContent: connector][AltContent: textbox (First subpixel )][AltContent: textbox (Second subpixel )][AltContent: textbox (RP1)][AltContent: textbox (LP1)][AltContent: arrow][AltContent: arrow][AltContent: rect][AltContent: rect][AltContent: rect][AltContent: rect]
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Annotated fig. 17 of Kim
However, Kim does not explicitly disclose the first electrode pad portion (EP1) having a first concave portion when viewed in a plan view, and
the second electrode pad portion (EP2) having a second concave portion when viewed in a plan view.
Mase teaches an image sensor [see fig. 4, 0065] comprising the first electrode pad portion (left TX31 surface) fig. 4 [0077] having a first concave portion (left TX31 T-shape [0079] in plan view thus concave portion overall) when viewed in a plan view (see fig. 4), and
the second electrode pad portion (right TX31 surface) fig. 4 [0077] having a second concave portion (right TX31 T-shape [0079] in plan view thus concave portion overall) when viewed in a plan view.
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the shape of the top of the electrode pad portion to have a T-shape overall [0079] such that all portions of the electrode pad are portions of a concave shape [0077, 0079] in order to enhance the amount of charge transfer gate material [0078] available in a pixel for performing the recited functions [0077-0079] as well as the interconnectivity thereof [0078-0079], as taught by Mase.
Regarding claim 13, Kim in view of Mase teaches the image sensor [0111] as claimed in claim 12. Kim in view of Mase also teaches wherein each of the first (TG1) fig. 17 [0111] and second (TG2) fig. 17 [0111] vertical transfer gates further includes:
first (left 7) fig. 17 [0049] and second (right 7) fig. 17 [0049] transfer gate spacers alongside (bottom) surfaces of the first (EP1) and second (EP2) electrode pad portions on the first surface (110a) [0043] of the semiconductor substrate (110), and wherein the first (left 7) and second (right 7) transfer gate spacers include first (left 7) and second (right 7) spacer extension portions (comprising entirety of respective 7’s with portions extending horizontally and vertically) extending into the semiconductor substrate (110) fig. 17 [0111] from the first surface (110a) in the regions, adjacent to the first (FD1) fig. 17 [0111] and second (FD2) fig. 17 [0111] floating diffusion regions, respectively [see annotated fig. 17 above].
Regarding claim 14, Kim in view of Mase teaches the image sensor [0111] as claimed in claim 12. Kim in view of Mase (with reference to Mase) also teaches wherein:
the first (left TX31 surface) fig. 4 [0077] and second concave portions (right TX31 surface) fig. 4 [0077] are located in (part on) a central region (middle of TX31) on (supported by) one side of the first (left TX31 surface) and second (right TX31 surface) pad portions, and the first (left half of 1E) fig. 4 [0067] and second (right half of 1E) fig. 4 [0067] spacer extension portions extend along the (outer borders of) first (left TX31 surface) and second (right TX31 surface) concave portions, respectively, when viewed in a plan view [see fig. 4 of Mase].
Regarding claim 15, Kim in view of Mase teaches the image sensor [0111] as claimed in claim 12. Kim also teaches wherein the first (LP1, RP1) vertical electrode portion, the second (LP2, RP2) vertical electrode portion, and the first (EP1) and second (EP2) electrode pad portions, respectively, have an integrated structure (forming single TG1, TG2 units, respectively) including the same material (TG1, TG2 respectively shown as formed of a single piece of material) [see annotated fig. 17 above].
Regarding claim 16, Kim in view of Mase teaches the image sensor [0111] as claimed in claim 12. Kim in view of Mase (with reference to Mase) also teaches also teaches wherein the first (left TX31 surface) fig. 4 [0077] and second (right TX31 surface) fig. 4 [0077] concave portions include a concave curved portion (CCP1, CCP2 defined as curved portions of right/left TX31 surfaces below) when viewed in a plan view [see annotated fig. 4 of Mase below].
[AltContent: arrow][AltContent: arrow][AltContent: textbox (CCP2 curved sub portion)][AltContent: textbox (CCP1 curved sub portion)][AltContent: ][AltContent: ]
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Annotated fig. 4 of Mase
Regarding claim 17, Kim teaches an image sensor [0111], comprising:
a semiconductor substrate (110) fig. 17 [0111] having first (top = 110a) [0111] and second (bottom = 110b) [0112] surfaces facing each other, and having a plurality of pixels (upper and lower PX1, PX2’s) fig. 16 [0111] arranged thereon;
a first isolation structure (DI) fig. 17 [0111] on the semiconductor substrate (110), and defining the plurality of pixels (upper and lower PX1, PX2);
a second isolation structure (middle 3 between TG 1 and TG2) fig. 17 [0046, 0111] penetrating through the semiconductor substrate (110), and dividing each of the plurality of pixels (PX 1-2) into a plurality of subpixels (left half of PX and a right half of PX = separated sub-pixels),
a plurality of photoelectric conversion regions (PD1, PD2, PD3) fig. 17 [0111-0113] in each of the plurality of sub-pixels (left/right halves of PX);
a plurality of vertical transfer gates (TG1, TG2) fig. 17 [0111] on the plurality of photoelectric conversion regions (PD1, PD2, PD3) on the first surface (110a) of the semiconductor substrate (110), respectively, and respectively connected (electrically connected to for transfer of charge) [0111-0113] to the plurality of photoelectric conversion regions (PD1, PD2, PD3); and
wherein each of the plurality of vertical transfer gates (TG1-2), includes:
first (LP1-2) and second (RP1-2) vertical electrode portions extending from the first surface of the semiconductor substrate (110a) in a (vertical) direction, perpendicular to the first surface (110a), and respectively connected [0111-0113] to each of the plurality of photoelectric conversion regions (PD1, PD2, PD3); and
an electrode pad portion (EP1-2) on the first surface (110a) of the semiconductor substrate (110), connected to the first (LP1-2) and second (RP1-2) vertical electrode portions, and having a concave portion (CCP1-2) in a region, adjacent to the common floating diffusion region (FD3) [see annotated fig. 17 below].
[AltContent: textbox (Inward-Indentation creates L-shaped portion of TG2 which is concave (CCP2))][AltContent: textbox (Inward-Indentation creates L-shaped portion of TG1 which is concave (CCP1))][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: textbox (EP2)][AltContent: textbox (EP1)][AltContent: arrow][AltContent: rect][AltContent: rect][AltContent: oval][AltContent: oval][AltContent: arrow][AltContent: arrow][AltContent: textbox (RP2)][AltContent: textbox (LP2)][AltContent: connector][AltContent: textbox (First subpixel )][AltContent: textbox (Second subpixel )][AltContent: textbox (RP1)][AltContent: textbox (LP1)][AltContent: arrow][AltContent: arrow][AltContent: rect][AltContent: rect][AltContent: rect][AltContent: rect]
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Annotated fig. 17 of Kim
However, Kim does not explicitly disclose the electrode pad portion (EP1) having a concave portion in a region when viewed in a plan view, and
the second electrode pad portion (EP2) having a second concave portion when viewed in a plan view.
Mase teaches an image sensor [see fig. 4, 0065] comprising the electrode pad portion (TX31 surface for connections) fig. 4 [0077] having a concave portion (left TX31 T-shape [0079]) in a region (comprising TX31) when viewed in a plan view (see fig. 4).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the shape of the top of the electrode pad portion to have a T-shape overall [0079] such that all portions of the electrode pad are portions of a concave shape [0077, 0079] in order to enhance the amount of charge transfer gate material [0078] available in a pixel for performing the recited functions [0077-0079] as well as the interconnectivity thereof [0078-0079], as taught by Mase.
Claims 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (U.S. PG Pub No US2020/0381473A1) (of record) modified by Mase (U.S. PG Pub No US2013/0120735A1), as applied in claim 17 above, and further in view of Takada (U.S. PG Pub No US2017/0310913A1) (of record).
Regarding claim 18, Kim in view of Mase teaches the image sensor [0111] as claimed in claim 17. Kim also teaches wherein:
each of the plurality of pixels (upper and lower PX1, PX2’s) fig. 16 [0111] includes first to fourth sub-pixels (SPa, SPb, SPc, SPd), the plurality of photoelectric conversion regions (comprising PD1, PD2, PD3) fig. 17 [0111-0113] include first to fourth photoelectric conversion regions (distinct sub-regions of PD3 in SPa-d quadrants, as defined below) respectively in the first to fourth sub-pixels (SPa, SPb, SPc, SPd) (see annotated fig. 16 of Kim below).
[AltContent: arrow][AltContent: rect][AltContent: rect][AltContent: rect][AltContent: arrow][AltContent: textbox (Central region of SPa-d)][AltContent: rect][AltContent: textbox (SPc)][AltContent: textbox (SPb)][AltContent: textbox (SPd)][AltContent: textbox (SPa)][AltContent: connector][AltContent: connector][AltContent: connector][AltContent: connector][AltContent: connector][AltContent: connector][AltContent: connector][AltContent: connector]
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Annotated fig. 16 of Kim
However, Kim does not explicitly disclose and the plurality of vertical transfer gates (TG1-2) include first to fourth vertical transfer gates respectively in the first to fourth sub-pixels (SPa, SPb, SPc, SPd) (only two transfer gates shown for 4 sub-pixels) (as defined in annotated fig. 16 above).
Takada teaches an image sensor [see fig. 8E, 0068, 0075] wherein the plurality of vertical transfer gates (204a-d in each pixel 22E) fig. 8E [0071, 0075] include first to fourth vertical transfer gates (204a-d) fig. respectively in the first to fourth sub-pixels (4 quadrants of 22E divided by 202 + shaped borders) fig. 8E [0075].
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified each of the pixels of the image sensor of Km to include 4 separate transfer gates [0075] in order to enhance the ability of the pixels to read out signals from the sub-pixels separately [0076], thereby enhancing image sensor focus detection accuracy [0076-0078], as taught by Takada. Moreover, the modification reflects a mere duplication of parts (transfer gates) which has no patentable significance unless a new and unexpected result is produced. (See MPEP 2144.04, VI, B).
Regarding claim 19, Kim in view of Mase and Takada teaches the image sensor [0111] as claimed in claim 18. Kim also teaches wherein the first to fourth sub-pixels (SPa, SPb, SPc, SPd) are arranged in a matrix form of two rows and two columns (as defined in annotated fig. 16 above).
Regarding claim 20, Kim in view of Mase and Takada teaches the image sensor [0111] as claimed in claim 19. Kim also teaches wherein the common floating diffusion region (FD3) fig. 17 [0113] is in a central region (as defined in annotated fig. 16 above) of each of the plurality of pixels (upper and lower PX1, PX2’s) fig. 16 [0111], where the first to fourth sub-pixels (SPa-d) meet.
Further, Kim in view of Takada teaches the first to fourth vertical transfer gates (204a-d incorporated from fig. 8E [0071] of Takeda) are respectively in a region, adjacent to the central region in the first to fourth sub-pixels (SPa-d of Kim), respectively, and the concave portion (CCP 1-4, when each transfer gate modified to have the T-shaped structure of annotated fig. 17 of Kim) of each of the first to fourth vertical transfer gates (204a-d incorporated from fig. 8E [0071] of Takeda) is located on a side (supported by an inner side of TG facing FD3) from the electrode pad portion (EP1-4) toward the common floating diffusion region (FD3).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Remaining refences made available on the newly-added PTO-892 form are considered relevant to the present disclosure because they all feature image sensors with concave transfer gates in plan view.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/SEAN AYERS WINTERS/Examiner, Art Unit 2892 07/20/2026
/NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892
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