Prosecution Insights
Last updated: April 19, 2026
Application No. 18/382,546

SEMICONDUCTOR DEVICE HAVING THROUGH-VIA STRUCTURE

Non-Final OA §102§103
Filed
Oct 23, 2023
Examiner
LEE, EUGENE
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
2y 9m
To Grant
87%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
728 granted / 891 resolved
+13.7% vs TC avg
Minimal +5% lift
Without
With
+4.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
39 currently pending
Career history
930
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
41.1%
+1.1% vs TC avg
§102
25.6%
-14.4% vs TC avg
§112
24.5%
-15.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 891 resolved cases

Office Action

§102 §103
DETAILED ACTION Election/Restrictions Applicant’s election without traverse of Species I (claims 1-8) in the reply filed on 2/12/26 is acknowledged. Claims 9-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 2/12/26. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, and 8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Itaya et al. US 2011/0084385 A1. Itaya discloses (see, for example FIG. 4) a semiconductor device comprising a semiconductor substrate 80, integrated circuit layer 81a/81, first metal wiring layer P0, n-th metal wiring metal wiring layer P1, P2, P3, etc., plurality of wiring vias TH0/TH1/TH2, through-via 1b, and via connection pad P0. The through via 1b extends from a via connection pad P0, and penetrates the semiconductor substrate 80. The via connection pad P0 provides a cap (i.e. capping-type via connection pad) on an upper surface of the through-via 1b. Regarding claim 8, Itaya discloses (see, for example, FIG. 4) an upper pad 85, and a lower pad 84. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2 thru 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Itaya et al. US 2011/0084385 A1 as applied to claim 1, and 8, and further in view of Park et al. US 2015/0102497 A1. Itaya does not disclose the via connection pad includes a first capping-type via connection pad and a second capping-type via connection pad, wherein the first capping-type via connection pad is formed on an entirety of the upper surface of the through-via, and the second capping-type via connection pad is formed on the first capping-type via connection pad. However, Park discloses (see, for example, FIG. 2A) a semiconductor device comprising a via connection pad includes a first capping-type via connection pad 152, and a second capping-type via connection pad 154. The first capping-type via connection pad 152 is formed on an entirety of the upper surface of the through-via 180, and the second capping-type via connection pad 154 being formed on the first capping-type via connection pad 152. It would have been obvious to one of ordinary skill in the art to have the via connection pad includes a first capping-type via connection pad and a second capping-type via connection pad, wherein the first capping-type via connection pad is formed on an entirety of the upper surface of the through-via, and the second capping-type via connection pad is formed on the first capping-type via connection pad in order to provide further protection on the top surface of the through-via, and prevent physical defects. Regarding claim 3, see, for example, FIG. 2A wherein Park discloses the first capping-type via connection pad 152 and the second capping-type via connection pad 15 4 being integrally formed, and a width of the first capping-type via connection pad 152 being greater than a width of the through-via 180. Regarding claim 4, see, for example, paragraph [0062] wherein Park discloses a width of the first capping-type via connection pad 152 may be less than a width of the second capping-type via connection pad 154. Regarding claim 5, see, for example, paragraph [0090] wherein Park discloses using any of various shapes including hexagons, circular, oval, quadrangular, etc. Further, it would have been an obvious matter of design choice to have an octagonal shape for the first and second capping-type via connection pad in order to fit the pad into the semiconductor device according to the preferences of the user since such a modification would have involved a mere change in the shape of a component. A change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). Regarding claim 6, see, for example, FIG. 2A wherein Park discloses nth metal layer M1 being at a same horizontal level as the via connection pad 152. Regarding claim 7, see, for example, FIG. 2A wherein Park discloses nth metal layer M1 being at a same horizontal level as the via connection pad 152, and FIG. 4B wherein Park discloses a mesh pattern. INFORMATION ON HOW TO CONTACT THE USPTO Any inquiry concerning this communication or earlier communications from the examiner should be directed to EUGENE LEE whose telephone number is (571)272-1733. The examiner can normally be reached M-F 730-330 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JOSHUA BENITEZ can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. Eugene Lee February 23, 2026 /EUGENE LEE/Primary Examiner, Art Unit 2815
Read full office action

Prosecution Timeline

Oct 23, 2023
Application Filed
Feb 27, 2026
Non-Final Rejection — §102, §103
Mar 27, 2026
Applicant Interview (Telephonic)
Mar 27, 2026
Examiner Interview Summary

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
87%
With Interview (+4.9%)
2y 9m
Median Time to Grant
Low
PTA Risk
Based on 891 resolved cases by this examiner. Grant probability derived from career allow rate.

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