DETAILED ACTION
This action is responsive to Applicant’s reply filed 8/5/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 8/5/2026 has been entered.
Claim Status
Claims 1 and 4-14 are pending.
Claims 2-3 and 15-20 are cancelled.
Claims 1 and 14 are currently amended.
Claim Interpretation
For clarity of the record, the Examiner submits the newly added limitations of claim 1 are construed in the following way:
The functional limitations of the claim (recitations of “configured to” followed by a function) are all interpreted as an intended use of the claimed apparatus and are given patentable weight only to the extent that the prior art is capable of performing the intended uses. A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. See MPEP 2114(II).
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1 and 4-14 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 1, the limitation: “configured to output alternating current having a first impedance” and “configured to receive power having a second impedance” are regarded as new matter. Particularly, the Examiner cannot find support in the original disclosure for where the current supplied from the power supply has its own first impedance. Likewise, the Examiner cannot find support for where the power received by the process chamber has its own second impedance. The Examiner believes impedance to be a characteristic value of the components of an RF power delivery system, not the power supplied thereto.
Regarding claims 4-14, the claims are rejected at least based upon their dependencies.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 and 4-14 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the limitation: “a power supply unit configured to output alternating current having a first impedance” and “a process chamber configured to receive power having a second impedance” are regarded as indefinite in light of the disclosure and the knowledge of a PHOSITA.
The Examiner respectfully submits that a PHOSITA would recognize that a physical structure may have an impedance for purposes of RF power matching, but that the power itself does not. The disclosure appears to support this understanding, as the Specification is replete with mention of characteristic impedances of apparatus components (chamber, power supply, cable, etc.).
In the interest of compact and expedited prosecution, the Examiner interprets the limitation as reading: “a power supply unit configured to output alternating current, wherein the power supply unit has a first impedance” and “a process chamber configured to receive power, wherein the process chamber has a second impedance”.
Regarding claims 4-14¸ the claims are rejected at least based upon their dependencies.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 7-8, and 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Koshimizu (US Pub. 2008/0236749) in view of Aramaki (US Pub. 2019/0122864), Tsuji (US Pub. 2018/0158709), Leeser (US Pub. 2017/0117869), and Ghantasala (US Pub. 2018/0138015), with Keane (US Patent 5,195,045) as an evidentiary reference.
Regarding claim 1, Koshimizu teaches a substrate processing apparatus (Fig. 1, entirety, as the embodiment in Fig. 15, entirety) comprising: a power supply unit ([0040] and Fig. 15, power supply units #30 and #28) configured to output alternating current ([0040]), wherein the power supply has a first impedance (inherent characteristic of the power supply- see Keane C1, L29-52); a process chamber configured to receive power from the power supply unit ([0037] and Fig. 1, chamber #10), wherein the process chamber has a second impedance (inherent characteristic of the chamber- see Kean C1, L29-52); an impedance matching unit ([0040] and Fig. 15, matching unit #32) connected to the power supply unit (Fig. 15), the impedance matching unit configured to match the first impedance with the second impedance ([0040]), and a filter circuit ([0085] and Fig. 15, filter #104), the filter circuit configured to filter power flowing from the process chamber through the cable ([0085]).
Koshimizu does not teach a cable unit having a third impedance, wherein the cable unit includes: a cable having a first end configured to connect to the impedance matching unit and a second end configured to connect to the process chamber; and an impedance adjusting unit including a filter circuit having a first branch including a first inductor in series with a first capacitor connected to a ground and a second branch including a second inductor in parallel with a second capacitor, and a variable capacitor in series with the second branch of the filter circuit, the variable capacitor configured to adjust the impedance of the entirety of the cable unit.
However, Aramaki teaches a cable unit (Aramaki – [0050] and Fig. 3, impedance variable box #130) having a third impedance (inherent characteristic of the power supply- see Keane C1, L29-52), wherein the cable unit includes: a cable having a first end configured to connect to the impedance matching unit (Aramaki – Fig. 3, line connecting #130 to #128) and a second end configured to connect to the process chamber (Aramaki – Figs. 2-3: other end of #130 connects to electrode within chamber #101); and an impedance adjusting unit comprising a variable capacitor (Aramaki – [0058] and Fig. 3, variable cap #134), the variable capacitor configured to maintain the third impedance at a preset value (Aramaki – [0058]: varicap #134 can be varied, but can also remain unchanged – the limitation is merely an intended use of the variable capacitor since it has no programming of its own).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to modify the Koshimizu apparatus to include the cable unit of Aramaki in order to reduce impedance and allow for efficient contribution of HF power to wafer edge processing (Aramaki – [0015]) and improve controllability (Aramaki – [0057]).
Thus, as a combination of references, Koshimizu modified by Aramaki would have a power supply with first impedance, process chamber with second impedance, cable unit having a third impedance, and where the process chamber and cable unit are adjacent to each other electrically so as to be considered as a combined “fourth impedance”, thus the matching unit of Koshimizu would be matching the first impedance of the power supply with the fourth impedance of the load (chamber and cable unit).
Modified Koshimizu does not teach wherein the impedance adjusting unit includes a filter circuit having a first branch including a first inductor in series with a first capacitor connected to a ground and a second branch including a second inductor in parallel with a second capacitor, and a variable capacitor in series with the second branch of the filter circuit (emphasis showing distinguishing features).
However, Tsuji teaches wherein a unit includes a filter circuit having a first branch including a first inductor in series with a first capacitor connected to a ground (Tsuji – Fig. 5, inductor #32b and capacitor #32c coupled to ground, described in [0023] as a filter circuit) and a second branch including a second inductor in parallel with a second capacitor (Tsuji – Fig. 5, inductor #32f and capacitor #32e).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to further modify the modified Koshimizu apparatus to comprise the filter architecture of Tsuji in order to pass selective frequencies of power while preventing damage to power supply components (Tsuji – [0023], [0034]).
Modified Koshimizu does not teach a variable capacitor in series with the second branch of the filter circuit.
However, Leeser teaches wherein a grounded variable capacitor in series constitutes an impedance matching circuit (Leeser – [0032] and Fig. 3A, #203 connected to variable capacitor and grounded via #205).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to further modify the modified Koshimizu apparatus to comprise the impedance matching architecture of Leeser in order to provide an RF signal with prescribed parameters comprising power, phase, current, impedance, voltage, or a combination thereof (Leeser – [0007], [0008]).
Modified Koshimizu does not teach wherein the cable unit includes an impedance measuring unit configured to measure the third impedance.
However, Ghantasala teaches an impedance measuring unit capable of this function (Ghantasala – [0030]: vector network analyzer #179).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to further modify the modified Koshimizu apparatus with the impedance measuring unit of Ghantasala in order to measure impedance over a wide frequency range based upon input RF power and output a variety of data such as phase angle change, series/parallel resistance and reactance (Ghantasala – [0030]).
Regarding claim 7, Koshimizu modified by Aramaki does not teach the added limitations of the claim.
However, Ghantasala teaches wherein an impedance measuring unit includes a vector network analyzer (VNA) (Ghantasala – [0030]: vector network analyzer #179).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to further modify the modified Koshimizu apparatus with the impedance measuring unit of Ghantasala in order to measure impedance over a wide frequency range based upon input RF power and output a variety of data such as phase angle change, series/parallel resistance and reactance (Ghantasala – [0030]).
Regarding claim 8, Koshimizu teaches wherein the power supply unit includes a plurality of AC power sources (Koshimizu - [0040] and Fig. 15, power supply units #30 and #28).
Regarding claim 12, Koshimizu teaches wherein the process chamber includes: a chamber body providing a process space (Koshimizu – [0037] and Fig. 1, chamber #10 with processing space above wafer W); a shower head positioned within the chamber body (Koshimizu – [0045] and Fig. 1, shower head #56); and a stage positioned within the chamber body and positioned below the shower head (Koshimizu – [0038] and Figs. 1 and 15, susceptor #12 and related elements), and wherein the stage includes: a chuck body (Koshimizu – [0042] and Fig. 15, chuck #38); a plasma electrode configured to generate plasma within the process chamber (Koshimizu – [0038] and Fig. 15, susceptor #12 serves as a lower electrode); and a chuck electrode configured to fix a substrate (Koshimizu – [0042] and Fig. 15, sheet/mesh conductor #38b for chucking wafer W).
Regarding claim 13, Koshimizu teaches wherein the stage further includes a ring-shaped edge electrode surrounding the plasma electrode to control the plasma in an edge region of the substrate (Koshimizu – [0081], [0084] and Fig. 15, RF plate #12b provided with RF power).
Claims 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Koshimizu (US Pub. 2008/0236749), Aramaki (US Pub. 2019/0122864), Tsuji (US Pub. 2018/0158709), Leeser (US Pub. 2017/0117869), and Ghantasala (US Pub. 2018/0138015), as applied to claims 1, 7-8, and 12-13 above, further in view of Fink (US Pub. 2006/0144520).
The limitations of claims 1, 7-8, and 12-13 are set forth above.
Regarding claims 4-6, modified Koshimizu does not teach the added limitations of the claims. (Examiner’s note: regarding claim 5, Koshimizu teaches a plurality of matching devices in [0040], thus would comprise a plurality of variable capacitors, but does not describe them as VVCs).
However, Fink teaches wherein vacuum variable capacitors are commonly used in impedance match assemblies (Fink – [0031]). wherein the variable capacitor includes a vacuum variable capacitor (VVC).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to utilize the VVS of Fink in the modified Koshimizu apparatus as a matter of simple substitution to obtain a predictable result (Fink – [0031]: details VVCs as common in the art for RF impedance matching).
Claims 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Koshimizu (US Pub. 2008/0236749), Aramaki (US Pub. 2019/0122864), Tsuji (US Pub. 2018/0158709), Leeser (US Pub. 2017/0117869), and Ghantasala (US Pub. 2018/0138015), as applied to claims 1, 7-8, and 12-13 above, further in view of Saito (US Patent 5,021,114).
The limitations of claims 1, 7-8, and 12-13 are set forth above.
Regarding claims 9-10, modified Koshimizu does not teach the added limitations of the claims (Examiner’s note: Koshimizu teaches in [0040] wherein #28 and #30 supply HF power at ~2 MHz and ~40 MHz, e.g.).
However, Saito teaches wherein high-frequency power is commonly supplied in the 100 kHz to 100 MHz range (Saito – C4, L5).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to utilize the claimed frequencies since courts have held that where claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists. See In re Wertheim, 541 F.sd 257, 191 USPQ 90 (CCPA 1976), and MPEP 2144.05.
Regarding claim 11, modified Koshimizu does not teach wherein the filter is configured to block AC current having a frequency range of 175MHz to 185MHz. (Koshimizu teaches in [0085]) wherein the filter #104 is a band pass filter blocking the 2 MHz frequency and passing the 40 MHz frequency).
However, Saito teaches wherein high-frequency power is commonly supplied in the 100 kHz to 100 MHz range (Saito – C4, L5). As such, if modified Koshimizu were configured to provide power in the ranges as disclosed by Saito, a PHOSITA would naturally modify the filter of Koshimizu to block the low frequency power, as described in Koshimizu – [0085] and including the claimed range.
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to utilize the claimed frequencies and appropriately configure the filter of modified Koshimizu since courts have held that where claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists. See In re Wertheim, 541 F.sd 257, 191 USPQ 90 (CCPA 1976), and MPEP 2144.05.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Koshimizu (US Pub. 2008/0236749), Aramaki (US Pub. 2019/0122864), Tsuji (US Pub. 2018/0158709), Leeser (US Pub. 2017/0117869), and Ghantasala (US Pub. 2018/0138015), as applied to claims 1, 7-8, and 12-13 above, with Bottman (US Patent 5,633,801) as an evidentiary reference.
The limitations of claims 1, 7-8, and 12-13 are set forth above.
Regarding claim 14, modified Koshimizu does not explicitly teach the added limitations of the claim (Examiner’s note: Ghantasala – [0030] teaches a vector network analyzer #179, but does not explicitly teach a display unit).
However, the Examiner respectfully submits that display units are an inherent feature of vector network analyzers such that, while not explicitly disclosed, Ghantasala does teach wherein the cable unit further includes a data display unit configured to display the impedance of the entirety of the cable unit. In support of this assertion, the Examiner notes Bottman teaches display units are typically used in VNA’s (Bottman – C1, L29-46).
Response to Arguments
Applicant’s arguments concerning the §103 rejection of claim 1 have been carefully considered but are not persuasive.
As an initial matter, the Examiner notes that all claims are currently rejected under §112(a) and §112(b) for issues arising from the most recent amendments. The Examiner’s responses in this section pertain to the claimed invention with the added interpretation applied by the Examiner in the §112(b) rejection. The Examiner believes this interpretation to be an accurate representation of what the Applicant was trying to claim.
Applicant seeks an explicit recitation of the first-fourth impedances of various components (or combinations thereof) (Remarks, pg. 9).
First, the Examiner notes that the “associated with” language of the remarks is not present in the claims, thus the arguments are largely moot because they are not commensurate in scope with the claims.
Second, the Examiner respectfully submits that impedances are an inherent feature of components along an RF power distribution path. Each and every structure encountered by the power output from a power supply will present an impedance that will either fully transmit the power forward, partially reflect the power backwards, or (in worst cases) totally reflect said power backwards depending on the impedance matching along the RF path. The Examiner respectfully submits that this knowledge is common to a PHOSITA in the PECVD arts, and relies upon the Keane (US 5,195,045) reference as support of the Examiner’s assertion of inherency and as a demonstration of the knowledge available to a PHOSITA.
As such, no explicit recitation of these impedances is required of the prior art of record- a PHOSITA would naturally understand these limitations as present.
Applicant seeks an explicit recitation in Aramaki of “maintain[ing] a cable unit impedance at a present value” and “matching a power-supply impedance to a combined impedance formed from both a cable unit impedance and a chamber impedance” (Remarks, pg. 9).
The Examiner respectfully submits that both of these limitations are an intended use of the claimed apparatus and its components, and do not structurally require anything additional beyond the components themselves. The functional limitations are, therefore, only given patentable weight to the extent that the prior art would be capable of performing the function.
The Examiner has set forth in detail in the rejection of claim 1 how the Koshimizu and Aramaki apparatuses would, as a combination, have all of the structural elements of the claimed invention and explained how those prior art elements would cooperate to meet the functional limitations of the claim. The courts have held that a claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. See MPEP 2114(II).
The Examiner respectfully submits that the variable capacitor of Aramaki would be capable of having a static or variable impedance given the nature of the device, thus would be capable of “maintaining” an impedance of the ”cable unit” by simply remaining static.
The Examiner respectfully submits that the combination of Koshimizu and Aramaki references would have the power supply unit, process chamber, and cable unit in the claimed positions as understood by a PHOSITA and, based upon the nature of how impedance matching is performed, would operate to match a “fourth impedance” (chamber and cable unit) with a “first impedance” (power supply unit).
For at least those reasons, the §103 rejections of the claims are maintained with the Keane reference added for evidentiary purposes.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kurt Sweely whose telephone number is (571)272-8482. The examiner can normally be reached Monday - Friday, 9:00am - 5:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Gordon Baldwin can be reached at (571)-272-5166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Kurt Sweely/Primary Examiner, Art Unit 1718
