DETAILED ACTION
This action is responsive to Applicant’s reply filed 3/30/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Status
Claims 1 and 4-14 are pending.
Claims 2-3 and 15-20 are cancelled.
Claims 1 and 4 are currently amended.
Claim Objections
Claims 6 and 9-10 are objected to because of the following informalities:
Regarding claim 6: “at least one of the plurality of variable capacitors” should be amended to read: “at least one variable capacitor of the plurality of variable capacitors” as a plurality is a singular noun comprising plural objects – only one plurality has been recited.
Regarding claims 9-10: the claims should be amended to read: “one AC source of the plurality” similar to claim 6.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 7-8, and 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Koshimizu (US Pub. 2008/0236749) in view of Aramaki (US Pub. 2019/0122864), Tsuji (US Pub. 2018/0158709), Leeser (US Pub. 2017/0117869), and Ghantasala (US Pub. 2018/0138015).
Regarding claim 1, Koshimizu teaches a substrate processing apparatus (Fig. 1, entirety, as the embodiment in Fig. 15, entirety) comprising: a power supply unit ([0040] and Fig. 15, power supply units #30 and #28); a process chamber configured to receive power from the power supply unit ([0037] and Fig. 1, chamber #10); an impedance matching unit ([0040] and Fig. 15, matching unit #32) connected to the power supply unit (Fig. 15), and a filter circuit ([0085] and Fig. 15, filter #104), the filter circuit configured to filter power flowing from the process chamber through the cable ([0085]).
Koshimizu does not teach a cable unit configured to transmit electrical power from the impedance matching unit to the process chamber, and wherein the cable unit includes: a cable configured to connect the impedance matching unit to the process chamber; and an impedance adjusting unit including a filter circuit having a first branch including a first inductor in series with a first capacitor connected to a ground and a second branch including a second inductor in parallel with a second capacitor, and a variable capacitor in series with the second branch of the filter circuit, the variable capacitor configured to adjust the impedance of the entirety of the cable unit.
However, Aramaki teaches a cable unit (Aramaki – [0050] and Fig. 3, impedance variable box #130) configured to transmit electrical power from an impedance matching unit to the process chamber (Fig. 3, from power source #127 to matching device #128 and on to the susceptor #113 of chamber #104), and wherein the cable unit includes: a cable configured to connect the impedance matching unit to the process chamber (see Aramaki Fig. 3, various lines depicting cables); and an impedance adjusting unit (Aramaki – [0058] and Fig. 3, variable cap #134) comprising a variable capacitor configured to adjust the impedance of the entirety of the cable unit (Aramaki – [0058] and Fig. 3, variable cap #134).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to modify the Koshimizu apparatus to include the cable unit of Aramaki in order to reduce impedance and allow for efficient contribution of HF power to wafer edge processing (Aramaki – [0015]) and improve controllability (Aramaki – [0057]).
Modified Koshimizu does not teach wherein the impedance adjusting unit includes a filter circuit having a first branch including a first inductor in series with a first capacitor connected to a ground and a second branch including a second inductor in parallel with a second capacitor, and a variable capacitor in series with the second branch of the filter circuit (emphasis showing distinguishing features).
However, Tsuji teaches wherein a unit includes a filter circuit having a first branch including a first inductor in series with a first capacitor connected to a ground (Tsuji – Fig. 5, inductor #32b and capacitor #32c coupled to ground, described in [0023] as a filter circuit) and a second branch including a second inductor in parallel with a second capacitor (Tsuji – Fig. 5, inductor #32f and capacitor #32e).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to further modify the modified Koshimizu apparatus to comprise the filter architecture of Tsuji in order to pass selective frequencies of power while preventing damage to power supply components (Tsuji – [0023], [0034]).
Modified Koshimizu does not teach a variable capacitor in series with the second branch of the filter circuit.
However, Leeser teaches wherein a grounded variable capacitor in series constitutes an impedance matching circuit (Leeser – [0032] and Fig. 3A, #203 connected to variable capacitor and grounded via #205).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to further modify the modified Koshimizu apparatus to comprise the impedance matching architecture of Leeser in order to provide an RF signal with prescribed parameters comprising power, phase, current, impedance, voltage, or a combination thereof (Leeser – [0007], [0008]).
Modified Koshimizu does not teach wherein the cable unit includes an impedance measuring unit configured to measure an impedance of an entirety of the cable unit.
However, Ghantasala teaches an impedance measuring unit capable of this function (Ghantasala – [0030]: vector network analyzer #179).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to further modify the modified Koshimizu apparatus with the impedance measuring unit of Ghantasala in order to measure impedance over a wide frequency range based upon input RF power and output a variety of data such as phase angle change, series/parallel resistance and reactance (Ghantasala – [0030]).
Regarding claim 7, Koshimizu modified by Aramaki does not teach the added limitations of the claim.
However, Ghantasala teaches wherein an impedance measuring unit includes a vector network analyzer (VNA) (Ghantasala – [0030]: vector network analyzer #179).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to further modify the modified Koshimizu apparatus with the impedance measuring unit of Ghantasala in order to measure impedance over a wide frequency range based upon input RF power and output a variety of data such as phase angle change, series/parallel resistance and reactance (Ghantasala – [0030]).
Regarding claim 8, Koshimizu teaches wherein the power supply unit includes a plurality of AC power sources (Koshimizu - [0040] and Fig. 15, power supply units #30 and #28).
Regarding claim 12, Koshimizu teaches wherein the process chamber includes: a chamber body providing a process space (Koshimizu – [0037] and Fig. 1, chamber #10 with processing space above wafer W); a shower head positioned within the chamber body (Koshimizu – [0045] and Fig. 1, shower head #56); and a stage positioned within the chamber body and positioned below the shower head (Koshimizu – [0038] and Figs. 1 and 15, susceptor #12 and related elements), and wherein the stage includes: a chuck body (Koshimizu – [0042] and Fig. 15, chuck #38); a plasma electrode configured to generate plasma within the process chamber (Koshimizu – [0038] and Fig. 15, susceptor #12 serves as a lower electrode); and a chuck electrode configured to fix a substrate (Koshimizu – [0042] and Fig. 15, sheet/mesh conductor #38b for chucking wafer W).
Regarding claim 13, Koshimizu teaches wherein the stage further includes a ring-shaped edge electrode surrounding the plasma electrode to control the plasma in an edge region of the substrate (Koshimizu – [0081], [0084] and Fig. 15, RF plate #12b provided with RF power).
Claims 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Koshimizu (US Pub. 2008/0236749), Aramaki (US Pub. 2019/0122864), Tsuji (US Pub. 2018/0158709), Leeser (US Pub. 2017/0117869), and Ghantasala (US Pub. 2018/0138015), as applied to claims 1, 7-8, and 12-13 above, further in view of Fink (US Pub. 2006/0144520).
The limitations of claims 1, 7-8, and 12-13 are set forth above.
Regarding claims 4-6, modified Koshimizu does not teach the added limitations of the claims. (Examiner’s note: regarding claim 5, Koshimizu teaches a plurality of matching devices in [0040], thus would comprise a plurality of variable capacitors, but does not describe them as VVCs).
However, Fink teaches wherein vacuum variable capacitors are commonly used in impedance match assemblies (Fink – [0031]). wherein the variable capacitor includes a vacuum variable capacitor (VVC).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to utilize the VVS of Fink in the modified Koshimizu apparatus as a matter of simple substitution to obtain a predictable result (Fink – [0031]: details VVCs as common in the art for RF impedance matching).
Claims 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Koshimizu (US Pub. 2008/0236749), Aramaki (US Pub. 2019/0122864), Tsuji (US Pub. 2018/0158709), Leeser (US Pub. 2017/0117869), and Ghantasala (US Pub. 2018/0138015), as applied to claims 1, 7-8, and 12-13 above, further in view of Saito (US Patent 5,021,114).
The limitations of claims 1, 7-8, and 12-13 are set forth above.
Regarding claims 9-10, modified Koshimizu does not teach the added limitations of the claims (Examiner’s note: Koshimizu teaches in [0040] wherein #28 and #30 supply HF power at ~2 MHz and ~40 MHz, e.g.).
However, Saito teaches wherein high-frequency power is commonly supplied in the 100 kHz to 100 MHz range (Saito – C4, L5).
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to utilize the claimed frequencies since courts have held that where claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists. See In re Wertheim, 541 F.sd 257, 191 USPQ 90 (CCPA 1976), and MPEP 2144.05.
Regarding claim 11, modified Koshimizu does not teach wherein the filter is configured to block AC current having a frequency range of 175MHz to 185MHz. (Koshimizu teaches in [0085]) wherein the filter #104 is a band pass filter blocking the 2 MHz frequency and passing the 40 MHz frequency).
However, Saito teaches wherein high-frequency power is commonly supplied in the 100 kHz to 100 MHz range (Saito – C4, L5). As such, if modified Koshimizu were configured to provide power in the ranges as disclosed by Saito, a PHOSITA would naturally modify the filter of Koshimizu to block the low frequency power, as described in Koshimizu – [0085] and including the claimed range.
It would be obvious to one of ordinary skill in the art, before the effective filing date of the instant application, to utilize the claimed frequencies and appropriately configure the filter of modified Koshimizu since courts have held that where claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists. See In re Wertheim, 541 F.sd 257, 191 USPQ 90 (CCPA 1976), and MPEP 2144.05.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Koshimizu (US Pub. 2008/0236749), Aramaki (US Pub. 2019/0122864), Tsuji (US Pub. 2018/0158709), Leeser (US Pub. 2017/0117869), and Ghantasala (US Pub. 2018/0138015), as applied to claims 1, 7-8, and 12-13 above, with Bottman (US Patent 5,633,801) as an evidentiary reference.
The limitations of claims 1, 7-8, and 12-13 are set forth above.
Regarding claim 14, modified Koshimizu does not explicitly teach the added limitations of the claim (Examiner’s note: Ghantasala – [0030] teaches a vector network analyzer #179, but does not explicitly teach a display unit).
However, the Examiner respectfully submits that display units are an inherent feature of vector network analyzers such that, while not explicitly disclosed, Ghantasala does teach wherein the cable unit further includes a data display unit configured to display the impedance of the entirety of the cable unit. In support of this assertion, the Examiner notes Bottman teaches display units are typically used in VNA’s (Bottman – C1, L29-46).
Response to Arguments
Applicant notes in their reply that claims 6 and 9-10 have been amended to obviate the previous objections (Remarks, pg. 7), but these claims have not actually been amended in the reply filed 3/30/2026. As such, the aforementioned objections are maintained.
Applicant’s arguments concerning the §103 rejection of claim 1 have been carefully considered, but are moot in light of the new grounds of rejection as presented herein. The Examiner respectfully submits that Tsuji and Leeser remedy any alleged deficiencies of the other prior art of record in meeting amended claim 1.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kurt Sweely whose telephone number is (571)272-8482. The examiner can normally be reached Monday - Friday, 9:00am - 5:00pm.
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/Kurt Sweely/Primary Examiner, Art Unit 1718
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