DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Oath/Declaration
2. The oath/declaration filed on 10/26/2023 is acceptable.
Priority
3. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Specification
4. The specification is objected to for the following reason: The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed (see MPEP 606.01).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
5. Claim 1 is rejected under 35 U.S.C. 103(a) as being unpatentable over PARK et al., hereafter “PARK” (U.S. Publication No. 2022/0262854 A1) in view of Kuo et al., hereafter “Kuo” (U.S. Publication No. 2020/0295243 A1).
Regarding claim 1, PARK discloses a display panel, comprising
a driver substrate (100) comprising a driver circuit (T2(PC)) and a first power line (CPL), wherein the first power line (CPL) comprises a conductive pad (PL1, see the first power line (PL1, Fig. 4a) has a single layer or a multi-layer of the conductive pattern in LEE H (WO-2022065873-A1)); and
a light emitting device (150, Fig. 3) bonded and disposed on the driver substrate (100) (Fig. 4).
PARK discloses the features of the claimed invention as discussed above, but does not disclose wherein the light emitting device comprises a first soldering pad and a second soldering pad.
Kuo, however, discloses disclose wherein the light emitting device (1031) comprises a first soldering pad (Left 1032) and a second soldering pad (Right 1032) (Fig. 2 and para [0024]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of PARK to provide disclose wherein the light emitting device comprises a first soldering pad and a second soldering pad as taught by Kuo for a purpose of improving the mountability of the surface-mount light emitting device.
Then, when the light emitting device (1031) comprises a first soldering pad (Left 1032) and a second soldering pad (Right 1032) as applied by Kuo, the first soldering pad (Left 1032) will be obviously overlapped and will be bonded to the conductive pad (CPL/PL1), and the second soldering pad (Right 1032) will be obviously electrically connected to the driver circuit (100).
Therefore, claim 1 is obviously rendered over PARK and Kuo.
6. Claim 2 is rejected under 35 U.S.C. 103(a) as being unpatentable over PARK and Kuo in view of PARK B (KR-20220083430-A).
Regarding claim 2, PARK and Kuo (citations to PARK unless otherwise noted) discloses including wherein the first power line (CPL) is a cathode power line (CE), the driver substrate (100) further comprises a second power line (DPL), and the second power line is an anode power line; the driver circuit (T2(PC)) comprises a scan line (GL), a data line (DL), a first thin film transistor (T1), and a second thin film transistor (T2); and a gate electrode of the first thin film transistor (T1) is electrically connected to the scan line (GL), a source electrode of the first thin film transistor (T1) is electrically connected to the data line (DL), a drain electrode of the first thin film transistor (T1) is electrically connected to a gate electrode of the second thin film transistor (T2); a source electrode of the second thin film transistor (T2) is electrically connected to the second power line (DPL), a drain electrode of the second thin film transistor (T2) is electrically connected to the second soldering pad of the light emitting device (150) (Fig. 3 and para [0053]-[0060[).
PARK and Kuo disclose the features of the claimed invention as discussed above, but does not disclose the second power line is an anode power line.
Kuo, however, discloses disclose wherein the light emitting device (120) comprises the second power line (132) is an anode power line (Fig. 2 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of PARK and Kuo to provide the second power line is an anode power line as taught by PARK B for a purpose of improving the mountability of the surface-mount light emitting device.
Allowable Subject Matter
7. The following is a statement of reason for the indication of allowable subject matter:
Claims 12-20 would be allowed.
Claims 12-20 are considered allowable since the prior art of record and the considered pertinent to the applicant’s disclosure does not teach or suggest the claimed invention of a display panel having wherein the first power line comprises a first conductive layer and a second conductive layer, the first conductive layer and the second conductive layer are disposed in different layers and are connected to each other, the second power line comprises a third conductive layer, and the third conductive layer and the second conductive layer are disposed in a same layer at an interval; wherein the first power line comprises a first line segment and a second line segment connected to each other, the first line segment is disposed to extend along a first direction, and the second line segment is disposed to extend along a second direction intersecting the first direction; wherein the second power line comprises a third line segment and a fourth line segment connected to each other, the third line segment is disposed to extend along the first direction, the fourth line segment is disposed to extend along the second direction; and wherein the first soldering pad overlaps and is bonded to the first line segment, as cited in the independent claim 12.
Claims 13-20 are directly or indirectly depend on the independent claim 12, then, they are also being allowed.
Claims 3-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Cited Prior Arts
8. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Kim et al. (U.S. Patent No. 12,048,221 B2) discloses a display panel, comprising
a driver substrate (SUB) comprising a driver circuit (TT1/T2, Fig. 6)) and a first power line (PL2), wherein the first power line (PL2) comprises a conductive pad (not shown); and
a light emitting device (LD) bonded and disposed on the driver substrate (SUB) (Fig. 8).
Conclusion
9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Phuc T. Dang whose telephone number is 571-272-1776. The examiner can normally be reached on 8:00 am-5:00 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jacob Choi can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PHUC T DANG/Primary Examiner, Art Unit 2897
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