DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 7 is objected to under 37 CFR 1.75 as being a substantial duplicate of claim 8. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3-9 12-13, 15-16, 19 and 21-22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by KANTAROVSKY et al [US 2022/0165853] IDS.
With respect to claim 1, KANTAROVSKY et al (fig. 1F) disclose a structure comprising:
a gate structure (112, pp [0012]);
a first barrier layer (108, pp [0017]-[0018]) under and adjacent to the gate structure; and
a second barrier layer (108, pp [0017]-[0018]) over the first barrier layer and which is adjacent to the gate structure, the second barrier layer positioned outside of the gate structure such that a combination of the first barrier layer and the second barrier layer forms a thicker region adjacent to the gate structure than the first barrier layer under the gate structure, and the second barrier layer is absent directly beneath the gate structure. It is noted that, as interpreting the claim in a broad scope, the first barrier layer can also be the same as the second barrier layer since the claim do not recite the different material between the first and second barrier layers.
With respect to claim 3, KANTAROVSKY et al (fig. 1F) disclose that further comprising a field plate (118, 120, pp [0012]) above the thicker region.
With respect to claim 4, KANTAROVSKY et al (fig. 1F) disclose that further comprising a gate metal (112, pp [0015]) connecting to the gate structure (112, pp [0012]). It is noted that the gate metal can be also the same as the gate structure since the claim do not recite the material different between the gate metal and the gate structure.
With respect to claim 5, KANTAROVSKY et al (fig. 1F) disclose that wherein the field plate (118, 120, pp [0012]) surrounds the gate metal and is isolated from the gate structure by a spacer (126, pp [0035]) on vertical sidewalls of the gate metal.
With respect to claim 6, KANTAROVSKY et al (fig. 1F) disclose that wherein the field plate (118, 120, pp [0012]) is adjacent to the gate structure on a same device level and further straddles over the thicker region.
With respect to claims 7-8, KANTAROVSKY et al (fig. 1F) disclose that wherein the second barrier layer (108, pp [0017]-[0018]) is symmetrically positioned about the gate structure.
With respect to claim 9, KANTAROVSKY et al (fig. 1F) disclose that wherein the first barrier layer (108, pp [0017]-[0018]) and the second barrier layer (108, pp [0017]-[0018]) comprise a same material.
With respect to claim 12, KANTAROVSKY et al (fig. 1F) disclose that wherein the second barrier layer (108, pp [0017]-[0018]) is spaced away from the gate structure (112, pp [0015]) by a gap structure comprising an insulator material (142, pp [0040]).
With respect to claim 13, KANTAROVSKY et al (fig. 1F) disclose that
a gate structure (112, pp [0012]);
at least one metal contact (112, pp [0015]) connecting to the gate structure; It is noted that the gate metal can be also the same as the gate structure since the claim do not recite the material different between the gate metal and the gate structure.
a channel region (106, pp [0017]) under the gate structure which comprises at least one semiconductor material that extends into a drain region (116, pp [0012]) and a source region (114, pp [0012]) adjacent to the gate structure, wherein the at least one semiconductor material in the drain region comprises a thicker region compared to the at least one semiconductor material under the gate structure, the thicker region comprising a first semiconductor material (108, pp [0017]-[0018]) and a second semiconductor material (108, pp [0017]-[0018]) over the first semiconductor material, the second semiconductor material being positioned outside of the gate structure and absent directly beneath the gate structure; and
a field plate (118, 120, pp [0012]) over the thicker region, adjacent to the gate structure.
It is noted that, as interpreting the claim in a broad scope, the first semiconductor material can also be the same as the second semiconductor material since the claim do not recite the different material between the first and second semiconductor materials.
With respect to claim 15, KANTAROVSKY et al (fig. 1F) disclose that wherein the first semiconductor material (108, pp [0017]-[0018]) and the second semiconductor (108, pp [0017]-[0018]) material comprise AIGaN.
With respect to claim 16, KANTAROVSKY et al (fig. 1F) disclose that wherein the second semiconductor material (108, pp [0017]-[0018]) is symmetrically positioned about the gate structure.
With respect to claim 19, KANTAROVSKY et al (fig. 1F) disclose that wherein the second semiconductor material (108, pp [0017]-[0018]) is separated from the gate structure by a gap structure comprising an insulator material (142, pp [0040]).
With respect to claim 21, KANTAROVSKY et al (fig. 1F) disclose that wherein the second barrier layer (108, pp [0017]-[0018]) is a semiconductor layer and the thicker region has a thickness that is from about 5% to about 100% greater than a thickness of the first barrier layer (pp [0020]) under the gate structure.
With respect to claim 22, KANTAROVSKY et al (fig. 1F) disclose that wherein the second semiconductor material (108, pp [0017]-[0018]) directly contacts the first semiconductor material (108, pp [0017]-[0018]) in the drain region and, together with the first semiconductor material, forms the thicker region adjacent to the gate structure.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 10-11 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over KANTAROVSKY et al [US 2022/0165853] IDS in view of Saunier et al [US 2013/0320349].
KANTAROVSKY et al do not mention wherein the first semiconductor material and the second semiconductor material comprise a same material with different material compositions or different materials. However, Saunier et al (fig. 1) disclose that wherein the first semiconductor material (107, AlxIn1-x N, pp [0066]) and the second semiconductor material (108, AlyGa1-y N, pp [0066]) comprise a same material (AlN) with different alloy compositions (In and Ga) or different materials (AlxIn1-x N and AlyGa1-y N). Therefore, it would have been obvious to one skill in the art to have the material at taught by Saunier et al into the device of KANTAROVSKY et al in order to provide suitable design function for a device structure.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HOAI V PHAM whose telephone number is (571)272-1715. The examiner can normally be reached M-F 8:30a.m-10:00p.m.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Drew Richards can be reached at 571-271-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HOAI V PHAM/Primary Examiner, Art Unit 2892
