Technology area: Semiconductors, Circuits & Optics
39 pending office actions • 21 art units • 39 examiners • 0 of 39 (0%) have an AI response strategy ready • 174 patents granted in the last 365 days
Globalfoundries U S Inc. has 35 pending office actions in Semiconductors, Circuits & Optics. The matters are assigned to 35 distinct examiners and 20 art units, showing broad examination coverage across the portfolio. Each pending action is associated with a different examiner, so the record does not show concentration around a single examiner.
TRAN, MICHAEL THANH is the busiest examiner, with 1 pending action. The distribution suggests that prosecution management should emphasize coordination across examiner-specific positions and art-unit practices, rather than relying on one recurring examination pattern. The 20 art units also support organizing response strategy by technical area and identifying where claim language or prior-art issues recur.
Based on the USPTO statutory response window for each pending office action. 8 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 8 of the docket's apps have a known mailing date.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §101 only | 1 (3%) |
| §103 only | 11 (28%) |
| §102 only | 4 (10%) |
| §112 only | 3 (8%) |
| Multi-statute (no §101) | 19 (49%) |
| No statute on record | 1 (3%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| TRAN, MICHAEL THANH | 1 | 95.8% | +0.5% |
| PHAM, LY D | 1 | 94.0% | +3.4% |
| BELL, LAUREN R | 1 | 40.3% | +32.8% |
| GONDARENKO, NATALIA A | 1 | 72.9% | +20.8% |
| KIANNI, KAVEH C | 1 | 87.2% | +11.0% |
| BESLER, CHRISTOPHER JAMES | 1 | 68.6% | +41.0% |
| ONUTA, TIBERIU DAN | 1 | 77.9% | +22.9% |
| BAIG, ANEESA RIAZ | 1 | 91.8% | +10.3% |
| AHMADI, MOHSEN | 1 | 86.9% | +9.5% |
| JAHAN, BILKIS | 1 | 88.7% | +10.1% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 3 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18802210 | PIC DIE AND PACKAGE WITH MULTIPLE LEVEL AND MULTIPLE DEPTH CONNECTIONS OF FIBERS TO ON-CHIP OPTICAL COMPONENTS | KIANNI, KAVEH C | — |
| 18604947 | ISOLATION STRUCTURE FOR MULTI-VOLTAGE INTEGRATED CIRCUIT | AHMADI, MOHSEN | — |
| 18603348 | STRUCTURES INCLUDING AN ISOTOPICALLY-DEPLETED SEMICONDUCTOR LAYER | JAHAN, BILKIS | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18228713 | FIELD-EFFECT TRANSISTORS WITH A GATE DIELECTRIC LAYER FORMED ON A SURFACE TREATED BY ATOMIC LAYER ETCHING | NICELY, JOSEPH C | 15d overdue |
| 17902463 | HIGH-ELECTRON-MOBILITY TRANSISTOR | YEMELYANOV, DMITRIY | 13d |
| 18378788 | WAVEGUIDE STRUCTURES | LEPISTO, RYAN A | 71d |
| 18392464 | HETEROJUNCTION BIPOLAR TRANSISTOR WAFERS WITH BACKSIDE SUB-COLLECTOR CONTACT | NGUYEN, DUY T V | 76d |
| 19004610 | BIT CELL, IN-MEMORY COMPUTING CIRCUIT FOR MAJORITY FUNCTIONS, AND IN-MEMORY COMPUTING METHOD | PHAM, LY D | — |
| 18885906 | NANOSHEET FIELD-EFFECT TRANSISTORS DEPOPULATED OF NANOSHEET CHANNEL LAYERS | BELL, LAUREN R | — |
| 18886381 | VERTICALLY STACKED DIODE-TRIGGER SILICON CONTROLLED RECTIFIER | GONDARENKO, NATALIA A | — |
| 18676963 | FIXTURE | BESLER, CHRISTOPHER JAMES | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 7 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18885906 | NANOSHEET FIELD-EFFECT TRANSISTORS DEPOPULATED OF NANOSHEET CHANNEL LAYERS | BELL, LAUREN R | — |
| 18886381 | VERTICALLY STACKED DIODE-TRIGGER SILICON CONTROLLED RECTIFIER | GONDARENKO, NATALIA A | — |
| 18802210 | PIC DIE AND PACKAGE WITH MULTIPLE LEVEL AND MULTIPLE DEPTH CONNECTIONS OF FIBERS TO ON-CHIP OPTICAL COMPONENTS | KIANNI, KAVEH C | — |
| 18676963 | FIXTURE | BESLER, CHRISTOPHER JAMES | — |
| 18668706 | HIGH-DENSITY STACKED CAPACITOR AND METHOD | ONUTA, TIBERIU DAN | — |
| 18635547 | STACKED HIGH-POWER RF SWITCH | BAIG, ANEESA RIAZ | — |
| 18603348 | STRUCTURES INCLUDING AN ISOTOPICALLY-DEPLETED SEMICONDUCTOR LAYER | JAHAN, BILKIS | — |
| Art Unit | Apps |
|---|---|
| 2874 | 4 |
| 2891 | 3 |
| 2817 | 3 |
| 2893 | 3 |
| 2897 | 3 |
| 2898 | 3 |
| 2827 | 2 |
| 2814 | 2 |
| 2818 | 2 |
| 2812 | 2 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 19035131 | SINGLE ENDED SENSE AMPLIFIER WITH CURRENT PULSE CIRCUIT | TRAN, MICHAEL THANH | 2827 | Other | Non-Final OA | — | Pending | Jan 23, 2025 |
| 19004610 | BIT CELL, IN-MEMORY COMPUTING CIRCUIT FOR MAJORITY FUNCTIONS, AND IN-MEMORY COMPUTING METHOD | PHAM, LY D | 2827 | §102§112 | Non-Final OA | — | Pending | Dec 30, 2024 |
| 18885906 | NANOSHEET FIELD-EFFECT TRANSISTORS DEPOPULATED OF NANOSHEET CHANNEL LAYERS | BELL, LAUREN R | 2811 | §102§103 | Non-Final OA | — | Pending | Sep 16, 2024 |
| 18886381 | VERTICALLY STACKED DIODE-TRIGGER SILICON CONTROLLED RECTIFIER | GONDARENKO, NATALIA A | 2891 | §103§112Other | Non-Final OA | — | Pending | Sep 16, 2024 |
| 18802210 | PIC DIE AND PACKAGE WITH MULTIPLE LEVEL AND MULTIPLE DEPTH CONNECTIONS OF FIBERS TO ON-CHIP OPTICAL COMPONENTS | KIANNI, KAVEH C | 2874 | §103 | Non-Final OA | — | Pending | Aug 13, 2024 |
| 18676963 | FIXTURE | BESLER, CHRISTOPHER JAMES | 3726 | §102§112 | Non-Final OA | — | Pending | May 29, 2024 |
| 18668706 | HIGH-DENSITY STACKED CAPACITOR AND METHOD | ONUTA, TIBERIU DAN | 2814 | §103§112 | Final Rejection | — | Pending | May 20, 2024 |
| 18635547 | STACKED HIGH-POWER RF SWITCH | BAIG, ANEESA RIAZ | 2814 | §102§103§112 | Non-Final OA | — | Pending | Apr 15, 2024 |
| 18604947 | ISOLATION STRUCTURE FOR MULTI-VOLTAGE INTEGRATED CIRCUIT | AHMADI, MOHSEN | 2896 | §103 | Final Rejection | — | Pending | Mar 14, 2024 |
| 18603348 | STRUCTURES INCLUDING AN ISOTOPICALLY-DEPLETED SEMICONDUCTOR LAYER | JAHAN, BILKIS | 2817 | §103 | Non-Final OA | — | Pending | Mar 13, 2024 |
| 18594074 | CAPACITIVE JUNCTION BETWEEN CONDUCTIVE LINE AND CONDUCTIVE PILLAR WITH METHODS TO FORM SAME | NETTLES, CORALIE ANN | 2893 | §103 | Final Rejection | — | Pending | Mar 04, 2024 |
| 18586666 | THREE-DIMENSIONAL INTEGRATED CIRCUIT (3DIC) AND 3DIC DESIGN METHOD AND SYSTEM | NGO, BRIAN | 2851 | §102 | Non-Final OA | — | Pending | Feb 26, 2024 |
| 18583397 | FOLDED CASCODE LOW NOISE AMPLIFIER | SPALLA, DAVID C | 2893 | §102§103 | Non-Final OA | — | Pending | Feb 21, 2024 |
| 18442072 | OPTICAL COUPLING BETWEEN STACKED CHIPS | LE, UYEN CHAU N | 2874 | §102§103 | Non-Final OA | — | Pending | Feb 14, 2024 |
| 18442069 | INDUCTOR STRUCTURE INTEGRATED IN SEMICONDUCTOR DEVICE | ANDERSON, WILLIAM H | 2817 | §103 | Non-Final OA | — | Pending | Feb 14, 2024 |
| 18427028 | DEVICE WITH INNER SPACER SIDEWALL STRUCTURES | WATTS, JEREMY DANIEL | 2897 | §102§103 | Final Rejection | — | Pending | Jan 30, 2024 |
| 18427206 | DEVICE WITH OUTER CONDUCTIVE SPACER | WRIGHT, TUCKER J | 2891 | §102 | Final Rejection | — | Pending | Jan 30, 2024 |
| 18415955 | STRUCTURE WITH TWO WORK FUNCTION METALS OVER CONDUCTIVE BRIDGE, AND METHOD TO FORM SAME | PETERSON, ERIK T | 2898 | §102§103§112 | Non-Final OA | — | Pending | Jan 18, 2024 |
| 18416466 | STRUCTURE AND METHOD FOR AN INDUCTOR HAVING A WINDING WITH A FIRST SEGMENT CONNECTED TO TWO SECOND SEGMENTS | PATEL, RAKESH BHASKARBHAI | 2843 | §102 | Non-Final OA | — | Pending | Jan 18, 2024 |
| 18414508 | EXTENDED DRAIN METAL OXIDE SEMICONDUCTOR (EDMOS) FIELD EFFECT TRANSISTOR (FET) WITH DUAL THICKNESS SEMICONDUCTOR MATERIAL | MANN, WILLIAM ROBERT | 2897 | §102§103 | Non-Final OA | — | Pending | Jan 17, 2024 |
| 18392464 | HETEROJUNCTION BIPOLAR TRANSISTOR WAFERS WITH BACKSIDE SUB-COLLECTOR CONTACT | NGUYEN, DUY T V | 2818 | §102§103 | Final Rejection | 76d | Pending | Dec 21, 2023 |
| 18526344 | FULLY DEPLETED SEMICONDUCTOR-ON-INSULATOR SWITCH WITH BUILT-IN ELECTROSTATIC DISCHARGE PROTECTION | FREY, KIMBERLY NEWMAN | 2817 | §103 | Final Rejection | 71d | Pending | Dec 01, 2023 |
| 18520275 | REAL-TIME PROCESS MARGIN-BASED LAYOUT OPTIMIZATION | KIK, PHALLAKA | — | §101 | Non-Final OA | — | Pending | Nov 27, 2023 |
| 18515375 | STRUCTURE AND METHOD FOR INDUCTOR WITH WINDINGS HAVING DIFFERENT WIDTHS | HINSON, RONALD | 2837 | §102§103 | Non-Final OA | — | Pending | Nov 21, 2023 |
| 18388441 | SILICON CONTROL RECTIFIER INTEGRATED WITH A TRANSISTOR | WARREN, MATTHEW E | 2815 | §112 | Final Rejection | — | Pending | Nov 09, 2023 |
| 18501602 | PHOTODETECTORS WITH A NOTCHED LIGHT-ABSORBING LAYER | CHU, CHRIS H | 2874 | §103 | Non-Final OA | 75d | Pending | Nov 03, 2023 |
| 18385255 | HIGH ELECTRON MOBILITY TRANSISTOR WITH REGROWN BARRIER STRUCTURE | PHAM, HOAI V | 2892 | §102§103 | Final Rejection | — | Pending | Oct 30, 2023 |
| 18378788 | WAVEGUIDE STRUCTURES | LEPISTO, RYAN A | 2874 | §103§112 | Non-Final OA | 71d | Pending | Oct 11, 2023 |
| 18478452 | SILICON CARBIDE CHANNEL WITH CAPPING SEMICONDUCTOR HAVING HIGHER CHARGE CARRIER MOBILITY | RAHMAN, MOIN M | 2898 | §102 | Non-Final OA | — | Pending | Sep 29, 2023 |
| 18463288 | ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT AND METHODS OF FORMING THE SAME | HAIDER, WASIUL | 2812 | §103 | Final Rejection | — | Pending | Sep 07, 2023 |
| 18228713 | FIELD-EFFECT TRANSISTORS WITH A GATE DIELECTRIC LAYER FORMED ON A SURFACE TREATED BY ATOMIC LAYER ETCHING | NICELY, JOSEPH C | 2813 | §103§112 | Non-Final OA | 15d overdue | Pending | Aug 01, 2023 |
| 18200683 | PHOTODETECTORS WITH ONE OR MORE CONFINING FEATURES | DEGRASSE, IAN ISAAC | 2818 | §103 | Non-Final OA | 36d | Pending | May 23, 2023 |
| 18302349 | SYSTEM FOR IMAGING SUBSTRATE SURFACE AND RELATED METHOD | GARBER, ERIN R | 2878 | §103 | Final Rejection | — | Pending | Apr 18, 2023 |
| 18169304 | STANDARD CELL AND IC STRUCTURE WITH TRENCH ISOLATION THROUGH ACTIVE REGIONS AND GATE ELECTRODES | BERRY, PAUL ANTHONY | 2898 | §103 | Non-Final OA | — | Pending | Feb 15, 2023 |
| 18072127 | DEVICE WITH PLASMA INDUCED DAMAGE (PID) PROTECTION | ZHU, SHENG-BAI | 2897 | §112 | Non-Final OA | — | Pending | Nov 30, 2022 |
| 17902463 | HIGH-ELECTRON-MOBILITY TRANSISTOR | YEMELYANOV, DMITRIY | 2891 | §102§103§112 | Non-Final OA | 13d | Pending | Sep 02, 2022 |
| 17874709 | BUILT-IN TEMPERATURE SENSORS | FARMER, EMILY NICOLE | 2812 | §103§112 | Non-Final OA | — | Pending | Jul 27, 2022 |
| 17521076 | TRANSISTOR WITH FACETED, RAISED SOURCE/DRAIN REGION | CHEN, JACK S J | 2893 | §112 | Non-Final OA | 15d overdue | Pending | Nov 08, 2021 |
| 17601778 | MEMORY-BASED VECTOR-MATRIX MULTIPLICATION | KLOSTERMAN II, JEROME ANTHONY | 2182 | §102§103 | Non-Final OA | — | Pending | Oct 06, 2021 |
IP Author helps IP teams respond to office actions faster with AI-generated responses, examiner analytics, and prosecution intelligence.
Start Free TrialGlobalfoundries U S Inc. has 39 pending office actions as of October 2026, spread across 21 art units and 39 examiners.
Michael Thanh Tran has the most, with 1 of Globalfoundries U S Inc.'s pending office actions.
Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.
