DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 21-33 are pending
Claim 21 have been amended
Claims 1-20 have been canceled
Claims 32-33 are new
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 21-22, 27-30 and 32-33 are rejected under 35 U.S.C. 103 as being unpatentable over Iijima et al. US 2009/0269171 (US’171) in view of Deaton et al. US 6,048,403 (US’403) and Nezu et al. US 2004/0074605 (US’605).
Regarding claim 21, US’171 teaches a substrate processing apparatus as a plasma processing apparatus that processes a semiconductor wafers (para. 2-3). US’171 further teaches shown in fig 1-2 the plasma processing device include processing chambers where a plasma etching process is executed on the surfaces of wafers (and performing plasma processing on the product substrate) placed on wafer stages disposed inside the processing chambers, constituted with susceptors (lower electrodes) by applying radio-frequency power to the susceptors and supplying a processing gas into the processing chambers and applying RF power to upper electrodes. Therefore, US’171 teaches a method of cleaning a capacitively-coupled plasma processing apparatus, the method comprising:(a) mounting a product substrate at a processing position with respect to a stage inside a chamber, which is provided with an upper electrode and a lower electrode included in the stage, and performing plasma processing on the product substrate. A dummy wafer is transferred into the processing chamber after a specific number of product wafers have been processed in the processing chamber so as to clean the interior of the processing chamber (cleaning an inside of the chamber) with specific timing and thus eliminate the particles inside the processing chamber. Therefore, US’171 teaches (b) disposing a first dummy substrate having a diameter at a first position with respect to the stage inside the chamber, and performing a first dry cleaning process of cleaning an inside of the chamber with the first dummy substrate disposed at the first position. The apparatus includes an orienter 137 which aligns the wafer W. Therefore, the positions of the wafers, both product and dummy wafers are aligned as they are transferred into the processing chamber, which reads on wherein each of a center of the processing position and a center of the first position is located at the same position as a center of the stage in a plan view (para. 6, 39-43, 53 68-69, 71-84, wee fig. 1-2 and 8). US’171 further teaches a disc-shaped electrode plate 220, constituted with a conductive film used to electrostatically hold a wafer W (para. 64, see fig. 2), which reads on wherein the stage includes an electrostatic chuck configured to hold the product substrate or the first dummy substrate. A ring-shaped focus ring 224, constituted of silicon or the like, causes plasma generated above the susceptor 211 to converge toward the wafer W surrounds the stage that holds the substrates (para. 64, see fig. 64), which reads on and an edge ring provided so as to surround the product substrate or the first dummy substrate mounted on the electrostatic chuck. A plurality of push pins 230 used as lifting pins that can protrude above the upper surface of the susceptor 211 are disposed at the holding surface. The push pins 230 move up/down along the vertical direction in the figure. the push pins project out above the upper surface of the susceptor 211 to lift the wafer W from the susceptor 211 (para. 67 see fig. 2). Therefore, during at least this step of the process the product substrate and the first dummy substrate are placed apart from the edge ring. The phrase dose not indicated when this occurs or in what direction the placement is apart. As a result, US’171 teaches a method of cleaning a capacitively-coupled plasma processing apparatus, the method comprising:(a) mounting a product substrate at a processing position with respect to a stage inside a chamber, which is provided with an upper electrode and a lower electrode included in the stage, and performing plasma processing on the product substrate; and (b) disposing a first dummy substrate having a diameter at a first position with respect to the stage inside the chamber, and performing a first dry cleaning process of cleaning an inside of the chamber with the first dummy substrate disposed at the first position, wherein the stage includes an electrostatic chuck configured to hold the product substrate or the first dummy substrate, and an edge ring provided so as to surround the product substrate or the first dummy substrate mounted on the electrostatic chuck, and wherein the product substrate and the first dummy substrate are placed apart from the edge ring.
US’171 does not teach a first dummy substrate having a diameter smaller than a diameter of the product substrate.
US’403 teaches a substrate support for a thermal processing chamber (abstract, col. 1). US’403 further teaches cleaning deposits from a substrate support using a surrogate substrate or dummy substrate. The surrogate substrate can be made smaller than the process substrate (a first dummy substrate having a diameter smaller than a diameter of the product substrate) so that cleaning gases can reach all accumulated deposits on the substrate support (col. 1-2 and 5, see fig. 3-6). Therefore, the stage cleaning method of US’171 can be modified to include the dummy wafer being smaller than the product wafer to achieve the benefits taught by US’403 of ensuring all of the particles in the stage are exposed to the cleaning gases.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of US’171 to include a first dummy substrate having a diameter smaller than a diameter of the product substrate because US’403 teaches that cleaning gases can reach all accumulated deposits on the substrate support when the dummy substrate is smaller than the product substrate and use of known technique to improve similar methods in the same way is obvious, see MPEP 2141 III (C).
The modified method of US’171 does not teach wherein a diameter of the first dummy substrate is equal to or smaller than an inner diameter of the edge ring.
US’605 teaches a focus ring for a plasma processing apparatus has an inner region (12a), middle region (12b), and outer region (12c), disposed in this order from the inner side to surround a target substrate (W) (abstract). An object of the present invention is to provide a focus ring and plasma processing apparatus, which prevent abnormal electric discharge from occurring during plasma processing on the peripheral portion of a target substrate, such as a wafer (para. 5). Since the plasma is focused by the focus ring 55, the plasma concentrates near the peripheral edge of the wafer W, as shown by the arrows F1. In other words, as shown by a curved line PD1 in FIG. 9B, the plasma density becomes higher at the periphery of the wafer W than at the center thereof. Due to such a bad uniformity in the plasma density, abnormal electric discharge is likely to occur on the periphery of the wafer W, where the plasma density is higher. This causes problems in that the etching planar uniformity and/or selectivity become lower (para. 39). The plasma density becomes uniform over the central potion and the peripheral edge of the wafer W, so that abnormal electric discharge is reliably prevented from occurring on the peripheral edge of the wafer W (para. 50, see fig. 2-9). Therefore US’605 teaches that configuring the focus ring to have an inner diameter, 12a in fig. 2, which is larger than the process substrate prevents abnormal electric discharge from occurring on the peripheral edge of the wafer W and the plasma density becomes uniform over the central potion and the peripheral edge of the wafer W. Since the dummy substrate of the modified method of US’171 is smaller than a diameter of the product substrate, incorporating the teachings of US’605 into the method of the modified method of US’171 would further include wherein a diameter of the first dummy substrate is equal to or smaller than an inner diameter of the edge ring.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the modified method of US’171 to include wherein a diameter of the first dummy substrate is equal to or smaller than an inner diameter of the edge ring because US’605 teaches it prevents abnormal electric discharge from occurring on the peripheral edge of the wafer W and the plasma density becomes uniform over the central potion and the peripheral edge of the wafer W and use of known technique to improve similar methods in the same way is obvious, see MPEP 2141 III (C).
Regarding claim 22, the modified method of US’171 teaches the method of cleaning a plasma processing apparatus according to claim 21. US’171 further teaches that the process of processing a product wafer followed by processing a dummy wafer is performed a plurality of times (para. 77-84 and 107 fig. 8). Therefore, US’171 further teaches wherein (b) is performed after (a) is performed a plurality of times.
Regarding claim 27, the modified method of US’171 teaches the method of cleaning a plasma processing apparatus according to claim 21. US’171 further teaches that the stage is an electrostatic chuck (para. 60-65) and any portion of the stage that the product substrate is mounted can be consider a portion. Therefore, US’171 further teaches and wherein the diameter of the first dummy substrate is equal to or larger than a diameter of a portion of the electrostatic chuck on which the product substrate is mounted and held.
Regarding claim 28-30, the modified method of US’171 teaches the method of cleaning a plasma processing apparatus according to claim 21. US’171 further teaches the product wafer is etched while power is supplied to RF generator 218 connected to the susceptor at a predetermined degree of vacuum with the pressure inside the processing chamber lowered (para. 57-59, 75, fig. 2). Therefore, US’171 further teaches wherein the plasma processing and the first dry cleaning process are performed in a depressurized state, with regard to claim 28, wherein the plasma processing is a plasma etching process, with regard to claim 29 and wherein the plasma processing includes supplying bias power to the lower electrode, with regard to claim 30.
Regarding claim 32, the modified method of US’171 teaches the method of cleaning a plasma processing apparatus according to claim 21. The modified method of US’171 further teaches wherein the electrostatic chuck is configured to hold the product substrate at the processing position (electrostatic chuck, para. 64 of US’171), wherein a surface of a central portion of the electrostatic chuck is formed higher than a surface of an outer peripheral portion of the electrostatic chuck (the susceptor 211 includes the focus ring 224 para. 64, see fig. 2, the focus ring of US’605 has a surface 12d set below the mounting surface, para. 43-46, see fig. 2 of US’605), and the electrostatic chuck is configured so that when the product substrate is mounted on the surface of the central portion, a peripheral edge portion of the product substrate overhangs from the center portion of the electrostatic chuck, and wherein a diameter of the first dummy substrate is larger than a diameter of the central portion of the electrostatic chuck (the modified method of US’171 includes cleaning gases can reach all accumulated deposits on the substrate support, which would require it to be at least as wide as the mounting surface of US’605. The term “central portion” does not necessarily require the entire surface that is raised to be the included in the central portion, therefore the modified method of US’171 would further include a peripheral edge portion of the product substrate overhangs from the center portion of the electrostatic chuck, and wherein a diameter of the first dummy substrate is larger than a diameter of the central portion of the electrostatic chuck).
Regarding claim 33, the modified method of US’171 teaches the method of cleaning a plasma processing apparatus according to claim 32. The modified method of US’171 further teaches wherein the diameter of the first dummy substrate is equal to the inner diameter of the edge ring to be mounted on the surface of the outer peripheral portion of the electrostatic chuck. (US’605 focus ring includes surface 12d of portion 11b having a second inner diameter, which would need to be cleaned in the modified method of US’171. Therefore, the combination of US’171, US’403 and US’605 would further include the dummy substrate being equal to the raised surface 11 such that it would be equal to the inner diameter of part 11b to be able to clean surface 12d of US’605).
Claim(s) 23-24 are rejected under 35 U.S.C. 103 as being unpatentable over US’171 in view of US’403 and US’605 as applied to claim 21 above, and further in view of Tokashiki et al. US 2019/0201945 (US’945).
Regarding claim 23, the modified method of US’171 teaches the method of cleaning a plasma processing apparatus according to claim 21. US’171 further teaches multiple dummy wafers are stored in cassette 134B that can be inserted into the chamber (para. 77-97). Inserting a second dummy substrate into the processing substrate for cleaning in the modified method of US’171 reads on (c) disposing a second dummy substrate at a second position with respect to the stage inside the chamber, and performing a second dry cleaning process of cleaning the inside of the chamber with the second dummy substrate disposed at the second position, and wherein a center of the second position is the same position as the center of the stage in a plan view.
The modified method of US’171 does not teach wherein a diameter of the second dummy substrate is the same as the diameter of the product substrate.
US’945 teaches a method of cleaning a tool for forming a semiconductor device includes placing a cleaning wafer on the susceptor during cleaning (abstract, para. 36, see fig. 2). The cleaning wafer 201 may be sized and shaped to have a diameter D1 substantially equal to a diameter of a semiconductor wafer (e.g., the semiconductor wafer 110 (FIG. 1A)) processed in the chamber 102 (FIG. 1A). By way of nonlimiting example, the cleaning wafer 200 may have a diameter D1 of about 100 mm, about 150 mm, about 200 mm, about 300 mm, or about 450 mm. In some embodiments, the diameter D1 is about 300 mm. However, the disclosure is not so limited and the diameter D1 may be larger or smaller than those described above. Therefore, one of ordinary skill in the art would know that they could use cleaning/dummy wafers with diameters larger, smaller or the same compared to the substrate wafer in various cleaning patters, as needed.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the modified method of US’171 to include wherein a diameter of the second dummy substrate is the same as the diameter of the product substrate because US’945 teaches that it is known to provide cleaning/dummy wafers with diameters larger, smaller or the same compared to the substrate wafer in various cleaning patters, as needed and combining prior art elements according to known methods to yield predictable results is obvious, see MPEP 2141 III (A).
Regarding claim 24, the modified method of US’171 teaches the method of cleaning a plasma processing apparatus according to claim 23. US’171 further teaches different embodiments which include process multiple product wafers between cleaning processes and that this is repeated over a plurality of cycles (para. 77-97), which reads on a first sequence in which (c) is performed after (a) is performed a plurality of times; and a second sequence in which (b) is performed after (a) is performed a plurality of times, wherein the second sequence is performed after the first sequence is performed a plurality of times.
Claim(s) 25-26 and 31 are rejected under 35 U.S.C. 103 as being unpatentable over US’171 in view of US’403 and US’605 as applied to claim 21 above, and further in view of Belau et al. US 2019/0157051 (US’051).
Regarding claims 25-26 and 31, the modified method of US’171 teaches the method of cleaning a plasma processing apparatus according to claim 21.
The modified method of US’171 does not teach (d) performing a second dry cleaning process of cleaning the inside of the chamber without mounting a dummy substrate on the stage inside the chamber, with regard to claim 25 and a first sequence in which (d) is performed after (a) is performed a plurality of times; and a second sequence in which (b) is performed after (a) is performed a plurality of times, wherein the second sequence is performed after the first sequence is performed a plurality of times, with regard to claim 26 and wherein in the plasma processing, the product substrate is mounted on a mounting surface of the stage, and wherein in the first dry cleaning process, the first dummy substrate is spaced apart from the mounting surface, with regard to claim 31.
US’051 teaches a method for removing nitrogen containing residues in a plasma processing chamber is provided (abstract). US’ 051 further teaches cleaning a plasma etching chamber can include performing an exposed clean (without mounting a dummy substrate on the stage) and a cleaning process that lifts a cleaning wafer (dummy wafer) over the stage (the first dummy substrate is spaced apart from the mounting surface) The cleaning processes can have different ion energy to remove reside without damaging the electrostatic chuck (para. 13-24). Therefore, US’051 teaches alternative cleaning processes can be performed to cleaning an etching chamber to ensure effective cleaning while protecting chamber components from damage. Combining the teachings of US’171 and US’051 can include performing multiple different cleaning processes within the cycle of cleaning the chamber and processing substrates of the modified method of US’171.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of US’171 to include a (d) performing a second dry cleaning process of cleaning the inside of the chamber without mounting a dummy substrate on the stage inside the chamber, with regard to claim 25 and a first sequence in which (d) is performed after (a) is performed a plurality of times; and a second sequence in which (b) is performed after (a) is performed a plurality of times, wherein the second sequence is performed after the first sequence is performed a plurality of times, with regard to claim 26 because US’051 teaches alternative cleaning processes can be performed to cleaning an etching chamber to ensure effective cleaning while protecting chamber components from damage and it is prima facie obvious to combine two steps each of which is taught by the prior art to be useful for the same purpose, in order to form a third step to be used for the very same purpose the idea of combining them flows logically from their having been individually taught in the prior art, see MPEP 2144.06.
Response to Amendment
Applicant’s amendments to independent claim 21 to include subject matter regarding the focus ring has changed the scope of claim 21. Therefore, a new ground(s) of rejection is made under 103 as obvious over US’171 in view of US’403 and US’605 which includes both the rejection of claim 21 as stated in the non-final office action and additional discussion regarding the teachings of US’605 relating to the features added to claim 21.
Response to Arguments
Applicant's arguments filed 3-23-26 have been fully considered but they are not persuasive.
Applicants’ arguments that US’171 and US'403 does not teach the features added to claim 21 have been considered, however they are moot due to the reference not being relied on to teaches the new features added to claim 21.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIN FLANAGAN BERGNER whose telephone number is (571)270-1133. The examiner can normally be reached M-F 8:00-5:00.
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/ERIN F BERGNER/Examiner, Art Unit 1713
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