DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on11/03/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 9 recites “…the gate lines extend along the first direction being substantially perpendicular to the first direction.”. It is internally contradictory and logically unclear. A line cannot simultaneously “extending along the first direction” and be “substantially perpendicular to the first direction.” As a result, the scope of Claim 9 cannot be reasonably ascertained by one of ordinary skill in the art. Therefore it is indefinite.
Claim 14 recites “a second connection member including first and second branches and first and second welding points, the first branch connects the driving transistor, the first welding point, and the driving transistor,” It is unclear how a single branch can connect the driving transistor to the driving transistor. This renders the structure relationship of the second connection member, its branches, and the welding points ambiguous. One of ordinary skill in the art would not be able to determine the metes and bounds of the claimed structure. Therefore this limitation is indefinite.
Claims 10-13 and 15-18 depend from Claim 9 or claim 14, therefore they are rejected for the same reason.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 19 and 21 are rejected under 35 U.S.C. 102 (a)(2) as being anticipated by Jang et.al. (US-2021/0183963-A1, hereinafter Jang),
Regarding Claim 19.
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Jang teaches in Fig.1, Fig.2 and in related text A display device, comprising:
a display panel (#10) including sub pixels (#12), data lines (#DL), gate lines (#GL) crossing the data lines, high potential voltage lines (#PL), and reference voltage lines (#RL),
wherein the sub pixels include a first column of sub pixels (#12a) and a second column of sub pixels (#12b) extending along a second direction (direction Y) and being adjacent to each other,
the data lines (Fig2 #DL4i-3 and #DL4i-2 ) extend along the second direction between the first and second columns of sub pixels (#SPA1/#12a and #SPA2/#12b), and are disposed at one side of each of the first and second columns of sub pixels, and
the high potential voltage lines (#PL) and at least one of the reference voltage lines (#RL) extend along the second direction and are disposed at another side of each of the first and second columns of sub pixels (#SPA1/#12a and #SPA2/#12b). ([0050-0083])
Regarding Claim 21.
Jang teaches The display device according to claim 19,
Jang further teaches wherein each of the sub pixels includes a light emitting element and a circuit element configured to drive the light emitting element, and at least one of the high potential voltage lines is electrically connected to at least two of the the circuit elements through a connection member (#IPL). ([0097-0098])
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1-3 and 6-8 are rejected under 35 U.S.C. 103 as being unpatentable over Jang et.al. (US-2021/0183963-A1, hereinafter Jang), and further in view of Choi et.al. (US-2020/0176545-A1, hereinafter Choi)
Regarding Claim 1.
Jang teaches in Fig.1 and in related text A display device, comprising:
a display panel (#10) including pixels (unit pixel #12);
a data driver (#50) configured to supply a data signal (#DL) to the pixels; and
a gate driver (#70) configured to supply a gate signal (#GL) to the pixels,
wherein the display panel includes data lines (#DL), gate lines (#GL), a high potential voltage line (#PL), and one or more reference voltage lines (#RL),
each of the pixels (#12) includes first to fourth sub pixels (#12a-#12d), and the data lines include first to fourth data lines which supply the data signals to the first to fourth sub pixels, respectively, and extend along a second direction, ([0053-0055] second direction: Y-direction)
each of the first to fourth sub pixels includes a light emitting diode and a circuit element configured to drive the light emitting diode, ([0060-0062])
the first to fourth data lines are disposed between the circuit elements of two sub pixels extending along a first direction different from the second direction, among the first to fourth sub pixels, ( [0056-0061] each of the subpixels #12a-#12d include pixel circuit and are connected with subpixel data lines ) and
the high potential voltage line and the one or two reference voltage lines extend along the second direction ([0056] #PL and RL are disposed in parallel with the data lines, in Y-direction).
Jang does not explicitly disclose the first to fourth data lines are disposed between the circuit elements of two adjacent sub pixels.
However, Choi teaches that, in dense OLED layouts, it was known to route a four-line set spanning two adjacent columns, with at least the inner lines adjacent in the inter-column region, and to place selected data-pattern lines between adjacent columns specifically to reduce coupling noise, parasitic capacitance, and crosstalk. (See Choi Fig.4, Fig.13-14 [0117-0126]) It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to adopt Jang’s line ordering /placement within its four-subpixel unit in view of Choi’s inter-column routing teaching, in order to achieve a denser inter-column data-line placement for signal-integrity improvement.
Regarding Claim 2.
Jang modified by Choi teaches The display device according to claim 1,
Jang further teaches in Fig.1 wherein the first to fourth sub pixels and the gate lines extend along the first direction (direction X), and the second direction (direction Y) is substantially perpendicular to the first direction.
Regarding Claim 3.
Jang modified by Choi teaches The display device according to claim 1,
Jang further teaches wherein the first sub pixel (#SPA3) is configured to display blue color, the second sub pixel (#SPA1) is configured to display red color, the third sub pixel (#SPA2) is configured to display white color, and the fourth sub pixel (#SPA4) is configured to display green color, ([0064][0107-0108]) and
wherein the first data line is connected to a first circuit element of the first sub pixel, the second data line is connected to a second circuit element of the second sub pixel, the third data line is connected to a third circuit element of the third sub pixel, and the fourth data line is connected to a fourth circuit element of the fourth sub pixel.([0059-0060])
Regarding Claim 6.
Jang modified by Choi teaches The display device according to claim 3,
Jang teaches wherein the two adjacent sub pixels are the first and second sub pixels, and the data lines are disposed between the first circuit element of the first sub pixel and the second circuit element of the second sub pixel, or wherein the two adjacent sub pixels are the third and fourth sub pixels, and the data lines are disposed between the third circuit element of the third sub pixel and the fourth circuit element of the fourth sub pixel. (Fig.2 #DL are disposed between two adjacent sub-pixels)
Jang does not explicitly disclose the first to fourth data lines are disposed between two adjacent sub-pixel circuit elements.
However, Choi teaches that, in dense OLED layouts, it was known to route a four-line set spanning two adjacent columns, with at least the inner lines adjacent in the inter-column region, and to place selected data-pattern lines between adjacent columns specifically to reduce coupling noise, parasitic capacitance, and crosstalk. (See Choi Fig.4, Fig.13-14 [0117-0126]) It would have been obvious to one of ordinary skill in the art at the effective filing date of the claimed invention to adopt Jang’s line ordering /placement within its four-subpixel unit in view of Choi’s inter-column routing teaching, in order to achieve a denser inter-column data-line placement for signal-integrity improvement.
Regarding Claim 7.
Jang modified by Choi teaches The display device according to claim 3,
Jang further teaches wherein the high potential voltage line (#PL) is electrically connected to one or more of the first to fourth circuit elements through a first connection member (#IPL). ([0097-0098])
Regarding Claim 8.
Jang modified by Choi teaches The display device according to claim 7,
Jang further teaches wherein the first to fourth data lines (#DL) transmit the data signals to the first to fourth circuit elements (pixel circuit #PC), ([0086-0088]) and
the high potential voltage line transmits a high potential voltage (#PL) to the first to fourth circuit elements along the first direction same as the data signal (#DL), through the first connection member extending along the first direction. ( [0097-0098])
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Jang as applied to claim 19 above, and further in view of Yoo et.al. (US-2016/0078826-A1, hereinafter Yoo)
Regarding Claim 22.
Jang teaches The display device according to claim 19,
Jang further teaches wherein the first and second columns of sub pixels include sub pixels configured to display different colors and are connected to first and second gate lines,(#12a and #12b are different colors)
Jang does not explicitly disclose a color sequence of the first column of sub pixels connected to the first and second gate lines is different from a color sequence of the second column of sub pixels connected to the first and second gate lines.
However, Yoo teaches in Fig.2 that adjacent vertical lines/columns may have different color sequences. It would have been obvious to one of ordinary skill in the art, at the time of the invention, to modify Jang’s device to adopt Yoo’s known adjacent-column color-sequence arrangement. Such an arrangement would have been recognized as a known pixel-layout option for implementing multicolor subpixel arrays in a row/column driven display panel.
Allowable Subject Matter
Claims 4-5 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 4 contains allowable subject matter, because the prior art, either singly or in combination, fails to anticipate or render obvious, the device, the first data bridge electrically connects the fourth data line and the fourth circuit element spaced apart from the fourth data line, and the second data bridge electrically connects the first data line and the first circuit element spaced apart from the first data line. These features in combination with the other elements of the claim are neither disclosed nor suggested by the prior art of record.
Claim 5 contain allowable subject matter because they depend from claim 4 .
Claim 20 contains allowable subject matter, because the prior art, either singly or in combination, fails to anticipate or render obvious, the device, wherein the display panel includes a data bridge configured to electrically connect one of the data lines to one of the sub pixels that is spaced apart from the one of the data lines, and the data bridge extends in the first direction and crosses two other data lines among the data lines. These features in combination with the other elements of the claim are neither disclosed nor suggested by the prior art of record.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SOPHIA W KAO whose telephone number is (703)756-4797. The examiner can normally be reached Monday-Friday 9am-5pm Pacific Time.
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/SOPHIA W KAO/Examiner, Art Unit 2817
/ELISEO RAMOS FELICIANO/Supervisory Patent Examiner, Art Unit 2817