Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “computing system” in claims 1, 3, 4, 5, and 11 and “specimen positioning system” in claims 2, 14, and 15.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 16-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
The claims will be addressed according to the 2019 Patent Eligibility Guidelines (see MPEP § 2106).
Interpretation of the claims:
Under the broadest reasonable interpretation (BRI), the terms of the claim are presumed to have their plain meaning consistent with the specification as it would be interpreted by one having ordinary skill in the art. See MPEP § 2111.
Interpretation of claim 16: Claim 16 generally recites a method comprising: measuring a normal position value at a first plurality of locations across the surface of a semiconductor wafer, wherein each normal position value is a position of the semiconductor wafer with respect to an illumination source and a detector of a semiconductor measurement system in a direction normal to the surface of the semiconductor wafer; estimating values characterizing a local slope associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the normal position values at the first plurality of locations; and estimating a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map. The preamble does not actively add limitations to the claimed process or further modify the limitations recited in the body of the claim and thus does not limit the claimed process.
Step 1:
Claim 16 is directed to a method and therefore falls within one of the statutory categories of invention (process).
Step 2A Prong One:
Regarding claim 16, the limitations “estimating values characterizing a local slope associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the normal position values at the first plurality of locations; and estimating a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map” are all abstract ideas that fall into the “mathematical concepts” grouping of abstract ideas.
Step 2A Prong Two:
Regarding claim 16, there are no additional elements recited in the claim that integrate the abstract ideas into a practical application. Although the preamble recites the a method comprising: measuring a normal position value at a first plurality of locations across the surface of a semiconductor wafer, wherein each normal position value is a position of the semiconductor wafer with respect to an illumination source and a detector of a semiconductor measurement system in a direction normal to the surface of the semiconductor wafer, this limitation is not recited as an active method step and therefore is merely a description of the data being manipulated by the recited method steps.
Regarding claim 16, there are no additional elements recited in the claim that integrate the abstract ideas into a practical application.
Step 2B:
Claim 16 does not include any additional elements that are sufficient to amount to significantly more than the judicial exception. Although the preamble recites a method comprising: measuring a normal position value at a first plurality of locations across the surface of a semiconductor wafer, wherein each normal position value is a position of the semiconductor wafer with respect to an illumination source and a detector of a semiconductor measurement system in a direction normal to the surface of the semiconductor wafer, this limitation is not recited as an active method step and therefore is merely a description of the data being manipulated by the recited method steps.
Claim 28 does not include any additional elements that are sufficient to amount to significantly more than the judicial exception.
Discussion of Dependent Claims:
Claims 17-20 are directed to further mathematical concepts and/or mental processes and are therefore additional abstract ideas. These claims additionally do not recite any additional elements that integrate the abstract ideas into a practical application or amount to significantly more than the abstract ideas.
Conclusion:
The courts have decided that natural phenomena, laws of nature, and abstract intellectual concepts, such as mental processes and mathematical concepts, are not patentable, as they are the basic tools of scientific and technological work (Gottschalk v Benson, 409 U.S.63, 175 USPQ 673 (1972)). It is well established that the mere physical or tangible nature of additional elements, such as a data input or detection step, does not automatically confer eligibility on a claim directed to an abstract idea (see Alice Corp. Pty. Ltd. v CLS Bank, 573 US, 134 S. Ct. 2347, 110 USPQ.2d 1976 (2014)).
Therefore, for the reasons outlined above, claims 16-20 are not patent eligible.
Allowable Subject Matter
Claims 1-15 are allowable in view of the prior art(s).
The following is an examiner’s statement of reasons for allowance: Regarding claim 1, the prior arts of record neither anticipates nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach “a computing system configured to: estimate values characterizing a local slope associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the normal position values at the first plurality of locations; and estimate a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map” in combination with the remaining limitations of the claim. Note that the local slope is calculated based on the gradient of the Z-direction (see para [0062-64] of the instant application) and the wafer orientation map is generated from the local tilt and from the local slope (para [0026] of the instant application).
EP1037117A2 (hereinafter Jasper) is the closest prior art to claim 1. Jasper teaches calculating the height of the wafer by scanning a plurality of locations as shown in fig. 11 element 51. The system also calculates the local tilt of the point 51 (corresponds to the local tilt of the instant application). In addition, Jasper discloses the system also obtained the global, or average, height and tilt (around 2 axes) for the whole wafer. See para [0066-0067].
US20140071457A1 teaches an inspection device comprises a tilt sensor and a height sensor (fig. 3).
JP 2011232279 A (hereinafter Yutaka) teaches a tilt inspection apparatus 10 (figs. 1-3) “comprises a tilt calculation part 14 for calculating the tilt of the substrate 2 against a predetermined flat surface based on the height information measured every measurement point and a tilt correction part 15 for calculating correction amount of the height information based on the tilt of the substrate 2 to correct the height information over the entire area of the surface of the substrate 2” (Abstract last sentence).
US20050007601A1 (hereinafter Rosakis) teaches an interferometer measuring the slope of the surface with respect to two orthogonal directions (para [0021]).
However, the above prior arts fail to teach the limitations of claim 1. Specifically, the “a computing system configured to: estimate values characterizing a local slope associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the normal position values at the first plurality of locations; and estimate a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map”.
Therefore, prior art of record neither anticipates nor renders obvious the instant
application claimed invention as a whole either taken alone or in combination.
Claims 2-15 would be allowable due to their dependencies.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERTO FABIAN JR whose telephone number is (571)272-3632. The examiner can normally be reached M-F (8-12, 1-5).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, KARA GEISEL can be reached at (571)272-2416. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ROBERTO FABIAN JR/Examiner, Art Unit 2877
/DOMINIC J BOLOGNA/Primary Examiner, Art Unit 2877