Prosecution Insights
Last updated: April 19, 2026
Application No. 18/387,228

METHODS FOR SELECTIVE DEPOSITION OF PRECURSOR MATERIALS AND RELATED DEVICES

Non-Final OA §102§103
Filed
Nov 06, 2023
Examiner
INOUSSA, MOULOUCOULAY
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Entegris Inc.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
93%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
645 granted / 752 resolved
+17.8% vs TC avg
Moderate +7% lift
Without
With
+7.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
36 currently pending
Career history
788
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
38.3%
-1.7% vs TC avg
§102
41.4%
+1.4% vs TC avg
§112
18.0%
-22.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 752 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections It is to be noted that dependent claims 2 and 3 have been omitted. Applicant attention is directed to the fact that: A series of singular dependent claims is permissible in which a dependent claim refers to a preceding claim which, in turn, refers to another preceding claim. A claim which depends from a dependent claim should not be separated by any claim which does not also depend from said dependent claim. It should be kept in mind that a dependent claim may refer to any preceding independent claim. In general, applicant's sequence will not be changed. See MPEP § 608.01(n). Claim 20 is objected to because of the following informalities: in this case, there may be an error in the punctuation of the claim whereas the claim is not terminated by a period (“.”). Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 4-7, 11-16 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Someshwar et al. (US 2023/0015781 A1 hereinafter referred to as “Someshwar”). With respect to claim 1, Someshwar discloses, in Figs.1A-1F, a method comprising: obtaining a structure (100), wherein the structure comprises: a non-dielectric material (120); and a dielectric material (110) (see step of Fig.1A; see Par.[0047] wherein With reference to FIGS. 1A-1E, a semiconductor structure 100 is shown; the semiconductor structure 100 comprises an n transistor 102 and a p transistor 104; see Par.[0049]-[0051] wherein the source/drain material 120 may have more than one layer; the source/drain material 120 comprises a layer of silicon with doped epi (e.g., polycrystalline silicon, SiGe, SiP, and the like); the source/drain material 120 of the n transistor 102 comprises silicon (Si) doped with phosphorous (P); the source/drain material 120 of the p transistor 104 comprises silicon germanium (SiGe) doped with boron (B); see Par.[0048] wherein the dielectric material 110 comprises one or more of silicon, silicon oxide, silicon nitride, silicon carbide, and low-K dielectrics); contacting the structure (100) with a molybdenum precursor under conditions, so as to obtain a molybdenum material (160) on at least a portion of the structure (100), wherein the molybdenum material (160) is not deposited on the dielectric material (110) under the conditions (see step of Fig.1E; see Par.[0059]-[0061] wherein the structure 100 is exposed to a metal precursor and a reactant; the metal film can be deposited by an ALD deposition process, a CVD deposition process, or combinations thereof; the metal film comprises a molybdenum silicide (MoSi) film; the metal precursor comprises a molybdenum precursor; the molybdenum precursor comprises a molybdenum halide (i.e.; MoCl5, Mo6Cl12, MoCl3); the molybdenum halide comprises molybdenum fluoride, molybdenum chloride, or combinations thereof; the precursor is flowed over the surface using a carrier gas. the carrier gas in an inert gas; the inert gas comprises one or more of N.sub.2, Ar, and He; the reactant comprises hydrogen (H.sub.2), ammonia (NH.sub.3), silane, polysilane, or combinations thereof; the silane is selected from one or more of disilane, trisilane, tetrasilane, higher order silanes, and substituted silane; the reactant comprises a silane to form the molybdenum silicide (MoSi) layer 160; see step of Fig.1F wherein MoSi layer 160 is not deposited on dielectric 110). With respect to claim 4, Someshwar discloses, in Figs.1A-1F, the method, wherein the molybdenum precursor comprises MoCI5 (see step of Fig.1E; see Par.[0059]-[0061] wherein the structure 100 is exposed to a metal precursor and a reactant; the metal film can be deposited by an ALD deposition process, a CVD deposition process, or combinations thereof; the metal film comprises a molybdenum silicide (MoSi) film; the metal precursor comprises a molybdenum precursor; the molybdenum precursor comprises a molybdenum halide (i.e.; MoCl5, Mo6Cl12, MoCl3); the molybdenum halide comprises molybdenum fluoride, molybdenum chloride, or combinations thereof; the precursor is flowed over the surface using a carrier gas. the carrier gas in an inert gas; the inert gas comprises one or more of N.sub.2, Ar, and He; the reactant comprises hydrogen (H.sub.2), ammonia (NH.sub.3), silane, polysilane, or combinations thereof; the silane is selected from one or more of disilane, trisilane, tetrasilane, higher order silanes, and substituted silane; the reactant comprises a silane to form the molybdenum silicide (MoSi) layer 160). With respect to claim 5, Someshwar discloses, in Figs.1A-1F, the method, wherein: the non-dielectric material (120) comprises silicon; the molybdenum material (160) comprises molybdenum metal (see step of Fig.1E; see Par.[0059]-[0061] wherein the structure 100 is exposed to a metal precursor and a reactant; the metal film can be deposited by an ALD deposition process, a CVD deposition process, or combinations thereof; the metal film comprises a molybdenum silicide (MoSi) film; the metal precursor comprises a molybdenum precursor; the molybdenum precursor comprises a molybdenum halide (i.e.; MoCl5, Mo6Cl12, MoCl3); the molybdenum halide comprises molybdenum fluoride, molybdenum chloride, or combinations thereof; the precursor is flowed over the surface using a carrier gas. the carrier gas in an inert gas; the inert gas comprises one or more of N.sub.2, Ar, and He; the reactant comprises hydrogen (H.sub.2), ammonia (NH.sub.3), silane, polysilane, or combinations thereof; the silane is selected from one or more of disilane, trisilane, tetrasilane, higher order silanes, and substituted silane; the reactant comprises a silane to form the molybdenum silicide (MoSi) layer 160). With respect to claim 6, Someshwar discloses, in Figs.1A-1F, the method, wherein: the non-dielectric material (120) comprises silicon; and the molybdenum material (160) comprises molybdenum silicide (see step of Fig.1E; see Par.[0059]-[0061] wherein the structure 100 is exposed to a metal precursor and a reactant; the metal film can be deposited by an ALD deposition process, a CVD deposition process, or combinations thereof; the metal film comprises a molybdenum silicide (MoSi) film; the metal precursor comprises a molybdenum precursor; the molybdenum precursor comprises a molybdenum halide (i.e.; MoCl5, Mo6Cl12, MoCl3); the molybdenum halide comprises molybdenum fluoride, molybdenum chloride, or combinations thereof; the precursor is flowed over the surface using a carrier gas. the carrier gas in an inert gas; the inert gas comprises one or more of N.sub.2, Ar, and He; the reactant comprises hydrogen (H.sub.2), ammonia (NH.sub.3), silane, polysilane, or combinations thereof; the silane is selected from one or more of disilane, trisilane, tetrasilane, higher order silanes, and substituted silane; the reactant comprises a silane to form the molybdenum silicide (MoSi) layer 160). With respect to claim 7, Someshwar discloses, in Figs.1A-1F, the method, wherein: the non-dielectric material (120) comprises polysilicon; and the molybdenum material (160) comprises molybdenum silicide (see step of Fig.1E; see Par.[0059]-[0061] wherein the structure 100 is exposed to a metal precursor and a reactant; the metal film can be deposited by an ALD deposition process, a CVD deposition process, or combinations thereof; the metal film comprises a molybdenum silicide (MoSi) film; the metal precursor comprises a molybdenum precursor; the molybdenum precursor comprises a molybdenum halide (i.e.; MoCl5, Mo6Cl12, MoCl3); the molybdenum halide comprises molybdenum fluoride, molybdenum chloride, or combinations thereof; the precursor is flowed over the surface using a carrier gas. the carrier gas in an inert gas; the inert gas comprises one or more of N.sub.2, Ar, and He; the reactant comprises hydrogen (H.sub.2), ammonia (NH.sub.3), silane, polysilane, or combinations thereof; the silane is selected from one or more of disilane, trisilane, tetrasilane, higher order silanes, and substituted silane; the reactant comprises a silane to form the molybdenum silicide (MoSi) layer 160). With respect to claim 11, Someshwar discloses, in Figs.1A-1F, the method, further comprising contacting the structure with a first co- reactant precursor under the conditions (see step of Fig.1E; see Par.[0059]-[0061] wherein the structure 100 is exposed to a metal precursor and a reactant; the metal film can be deposited by an ALD deposition process, a CVD deposition process, or combinations thereof; the metal film comprises a molybdenum silicide (MoSi) film; the metal precursor comprises a molybdenum precursor; the molybdenum precursor comprises a molybdenum halide (i.e.; MoCl5, Mo6Cl12, MoCl3); the molybdenum halide comprises molybdenum fluoride, molybdenum chloride, or combinations thereof; the precursor is flowed over the surface using a carrier gas. the carrier gas in an inert gas; the inert gas comprises one or more of N.sub.2, Ar, and He; the reactant comprises hydrogen (H.sub.2), ammonia (NH.sub.3), silane, polysilane, or combinations thereof; the silane is selected from one or more of disilane, trisilane, tetrasilane, higher order silanes, and substituted silane; the reactant comprises a silane to form the molybdenum silicide (MoSi) layer 160). With respect to claim 12, Someshwar discloses, in Figs.1A-1F, the method, further comprising: contacting the structure (100) with the molybdenum precursor under second conditions, so as to obtain a second molybdenum material (170) on at least a portion of the molybdenum material (160) (see step of Fig.1E; see Par.[0062]-[0063] wherein the second barrier layer 170 comprises a PVD (i.e.; Physical Vapor Deposition (PVD) inherently requires a precursor material, which is typically a solid metal or alloy in elemental state, to be vaporized) metal film; the second barrier layer 170 comprises nitridated molybdenum silicide (MoSiN) (i.e.; a metal-ceramic compound that possesses metallic-like properties such as high electrical conductivity); the second barrier layer 170 comprises molybdenum nitride (MoN); the second barrier layer 170 prevents/(remove) formation of oxides (e.g.; metal oxides) on the molybdenum silicide (MoSi) layer 160 the second barrier layer 170 is formed on the molybdenum silicide (MoSi) layer 160; the molybdenum silicide (MoSi) layer 160 is treated to form the second barrier layer 170; the second barrier layer 170 is formed by nitridating the molybdenum silicide (MoSi) layer 160 or a portion thereof (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the second barrier layer 170 is formed by nitridating the molybdenum silicide (MoSi) layer 160 using ammonia (NH.sub.3) (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the second barrier layer 170 is formed by treating the molybdenum silicide (MoSi) layer 160 with plasma to nitridate the molybdenum silicide (MoSi) layer 160 (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the plasma treatment comprises nitrogen (N.sub.2) plasma treatment). With respect to claim 13, Someshwar discloses, in Figs.1A-1F, the method, wherein contacting the structure (100) with the molybdenum precursor under the second conditions removes metal oxides from the molybdenum material (160) and deposits the second molybdenum material (170) on at least a portion of the non-dielectric material (120) (see step of Fig.1E; see Par.[0062]-[0063] wherein the second barrier layer 170 comprises a PVD (i.e.; Physical Vapor Deposition (PVD) inherently requires a precursor material, which is typically a solid metal or alloy in elemental state, to be vaporized) metal film; the second barrier layer 170 comprises nitridated molybdenum silicide (MoSiN) (i.e.; a metal-ceramic compound that possesses metallic-like properties such as high electrical conductivity); the second barrier layer 170 comprises molybdenum nitride (MoN); the second barrier layer 170 prevents/(remove) formation of oxides (e.g.; metal oxides) on the molybdenum silicide (MoSi) layer 160 the second barrier layer 170 is formed on the molybdenum silicide (MoSi) layer 160; the molybdenum silicide (MoSi) layer 160 is treated to form the second barrier layer 170; the second barrier layer 170 is formed by nitridating the molybdenum silicide (MoSi) layer 160 or a portion thereof (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the second barrier layer 170 is formed by nitridating the molybdenum silicide (MoSi) layer 160 using ammonia (NH.sub.3) (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the second barrier layer 170 is formed by treating the molybdenum silicide (MoSi) layer 160 with plasma to nitridate the molybdenum silicide (MoSi) layer 160 (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the plasma treatment comprises nitrogen (N.sub.2) plasma treatment). With respect to claim 14, Someshwar discloses, in Figs.1A-1F, a method comprising: obtaining a structure (100), wherein the structure (100) comprises: a polysilicon (120); and a dielectric material (110) (see step of Fig.1A; see Par.[0047] wherein With reference to FIGS. 1A-1E, a semiconductor structure 100 is shown; the semiconductor structure 100 comprises an n transistor 102 and a p transistor 104; see Par.[0049]-[0051] wherein the source/drain material 120 may have more than one layer; the source/drain material 120 comprises a layer of silicon with doped epi (e.g., polycrystalline silicon, SiGe, SiP, and the like); contacting the structure (100) with a molybdenum precursor under first conditions, so as to obtain a molybdenum silicide (160) on the polysilicon (120) (see step of Fig.1E; see Par.[0059]-[0061] wherein the structure 100 is exposed to a metal precursor and a reactant; the metal film can be deposited by an ALD deposition process, a CVD deposition process, or combinations thereof; the metal film comprises a molybdenum silicide (MoSi) film; the metal precursor comprises a molybdenum precursor; the molybdenum precursor comprises a molybdenum halide (i.e.; MoCl5, Mo6Cl12, MoCl3); the molybdenum halide comprises molybdenum fluoride, molybdenum chloride, or combinations thereof; the precursor is flowed over the surface using a carrier gas. the carrier gas in an inert gas; the inert gas comprises one or more of N.sub.2, Ar, and He; the reactant comprises hydrogen (H.sub.2), ammonia (NH.sub.3), silane, polysilane, or combinations thereof; the silane is selected from one or more of disilane, trisilane, tetrasilane, higher order silanes, and substituted silane; the reactant comprises a silane to form the molybdenum silicide (MoSi) layer 160), contacting the structure (100) with the molybdenum precursor under second conditions, so as to obtain a molybdenum metal (170) on the molybdenum silicide (160) (see step of Fig.1E; see Par.[0062]-[0063] wherein the second barrier layer 170 comprises a PVD (i.e.; Physical Vapor Deposition (PVD) inherently requires a precursor material, which is typically a solid metal or alloy in elemental state, to be vaporized) metal film; the second barrier layer 170 comprises nitridated molybdenum silicide (MoSiN) (i.e.; a metal-ceramic compound that possesses metallic-like properties such as high electrical conductivity); the second barrier layer 170 comprises molybdenum nitride (MoN); the second barrier layer 170 prevents/(remove) formation of oxides (e.g.; metal oxides) on the molybdenum silicide (MoSi) layer 160 the second barrier layer 170 is formed on the molybdenum silicide (MoSi) layer 160; the molybdenum silicide (MoSi) layer 160 is treated to form the second barrier layer 170; the second barrier layer 170 is formed by nitridating the molybdenum silicide (MoSi) layer 160 or a portion thereof (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the second barrier layer 170 is formed by nitridating the molybdenum silicide (MoSi) layer 160 using ammonia (NH.sub.3) (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the second barrier layer 170 is formed by treating the molybdenum silicide (MoSi) layer 160 with plasma to nitridate the molybdenum silicide (MoSi) layer 160 (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the plasma treatment comprises nitrogen (N.sub.2) plasma treatment). With respect to claim 15, Someshwar discloses, in Figs.1A-1F, the method, wherein the molybdenum silicide (160) is not obtained on the dielectric material (110) under the first conditions (see step of Fig.1F wherein MoSi layer 160 is not deposited on dielectric 110). With respect to claim 16, Someshwar discloses, in Figs.1A-1F, the method, wherein the molybdenum metal (170) is not obtained on the dielectric material under the first conditions (see step of Fig.1E; see Par.[0062]-[0063] wherein the second barrier layer 170 comprises a PVD (i.e.; Physical Vapor Deposition (PVD) inherently requires a precursor material, which is typically a solid metal or alloy in elemental state, to be vaporized) metal film; the second barrier layer 170 comprises nitridated molybdenum silicide (MoSiN) (i.e.; a metal-ceramic compound that possesses metallic-like properties such as high electrical conductivity); the second barrier layer 170 comprises molybdenum nitride (MoN); the second barrier layer 170 prevents/(remove) formation of oxides (e.g.; metal oxides) on the molybdenum silicide (MoSi) layer 160 the second barrier layer 170 is formed on the molybdenum silicide (MoSi) layer 160; the molybdenum silicide (MoSi) layer 160 is treated to form the second barrier layer 170; the second barrier layer 170 is formed by nitridating the molybdenum silicide (MoSi) layer 160 or a portion thereof (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the second barrier layer 170 is formed by nitridating the molybdenum silicide (MoSi) layer 160 using ammonia (NH.sub.3) (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the second barrier layer 170 is formed by treating the molybdenum silicide (MoSi) layer 160 with plasma to nitridate the molybdenum silicide (MoSi) layer 160 (e.g.; nitridated molybdenum silicide is formed by incorporating nitrogen into preexisting molybdenum silicide; as such, a portion of preexisting MoSi is removed and replaced by MoSiN); the plasma treatment comprises nitrogen (N.sub.2) plasma treatment). Claims 1, 4-8, 10-17 and 19 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Hsieh et al. (US 2025/0183041 A1 hereinafter referred to as “Hsieh”). With respect to claim 1, Hsieh discloses, in Figs.1A-7B, a method comprising: obtaining a structure (401), wherein the structure comprises: a non-dielectric material (406); and a dielectric material (413) (see Par.[0105] wherein a feature 401 having a conformal TiN liner layer 415 is shown; the underlying stack 410 has a metal silicide nitride (MSi.sub.xN.sub.y) layer 408 and a metal silicide layer (MSi.sub.x) 407 connected to a semiconductor layer 406, e.g., silicon (Si) or silicon-germanium (SiGe); see Par.[0087] wherein examples of semiconductors 406 include silicon (Si), silicon germanium (SiGe), and gallium arsenide (GaAs) with or without semiconductor dopants such as carbon (C), arsenic (As), boron (B), phosphorus (P), tin (Sn), and antimony (Sb) (i.e.; doped Si is polycrystalline Si or polysilicon); this stack 410 may be used in S/D structure; see Par.[0112] wherein the dielectric material 413); contacting the structure (401) with a molybdenum precursor under conditions, so as to obtain a molybdenum material (407) on at least a portion of the structure, wherein the molybdenum material (407) is not deposited on the dielectric material under the conditions (see Par.[0106]-[0110] wherein this may involve flowing a MoCl.sub.x precursor, such as MoCl.sub.5, into the chamber housing the substrate; Mo 409 is deposited into the feature by reacting the MoCl.sub.x precursor, such as MoCl.sub.5, and a reactant, such as H.sub.2). With respect to claim 4, Hsieh discloses, in Figs.1A-7B, the method, wherein the molybdenum precursor comprises MoCI5 (see Par.[0106]-[0110] wherein this may involve flowing a MoCl.sub.x precursor, such as MoCl.sub.5, into the chamber housing the substrate; Mo 409 is deposited into the feature by reacting the MoCl.sub.x precursor, such as MoCl.sub.5, and a reactant, such as H.sub.2). With respect to claim 5, Hsieh discloses, in Figs.1A-7B, the method, wherein: the non-dielectric material (406) comprises silicon; the molybdenum material (407) comprises molybdenum metal (see Par.[0105] wherein a feature 401 having a conformal TiN liner layer 415 is shown; the underlying stack 410 has a metal silicide nitride (MSi.sub.xN.sub.y) layer 408 and a metal silicide layer (MSi.sub.x) 407 connected to a semiconductor layer 406, e.g., silicon (Si) or silicon-germanium (SiGe); see Par.[0087] wherein examples of semiconductors 406 include silicon (Si), silicon germanium (SiGe), and gallium arsenide (GaAs) with or without semiconductor dopants such as carbon (C), arsenic (As), boron (B), phosphorus (P), tin (Sn), and antimony (Sb) (i.e.; doped Si is polycrystalline Si or polysilicon); this stack 410 may be used in S/D structure; see Par.[0112] wherein the dielectric material 413). With respect to claim 6, Hsieh discloses, in Figs.1A-7B, the method, wherein:the non-dielectric material (406) comprises silicon; and the molybdenum material (407) comprises molybdenum silicide (see Par.[0105] wherein a feature 401 having a conformal TiN liner layer 415 is shown; the underlying stack 410 has a metal silicide nitride (MSi.sub.xN.sub.y) layer 408 and a metal silicide layer (MSi.sub.x) 407 connected to a semiconductor layer 406, e.g., silicon (Si) or silicon-germanium (SiGe); see Par.[0087] wherein examples of semiconductors 406 include silicon (Si), silicon germanium (SiGe), and gallium arsenide (GaAs) with or without semiconductor dopants such as carbon (C), arsenic (As), boron (B), phosphorus (P), tin (Sn), and antimony (Sb) (i.e.; doped Si is polycrystalline Si or polysilicon); this stack 410 may be used in S/D structure; see Par.[0112] wherein the dielectric material 413). With respect to claim 7, Hsieh discloses, in Figs.1A-7B, the method, wherein: the non-dielectric material comprises polysilicon (406); and the molybdenum material (407) comprises molybdenum silicide (see Par.[0105] wherein a feature 401 having a conformal TiN liner layer 415 is shown; the underlying stack 410 has a metal silicide nitride (MSi.sub.xN.sub.y) layer 408 and a metal silicide layer (MSi.sub.x) 407 connected to a semiconductor layer 406, e.g., silicon (Si) or silicon-germanium (SiGe); see Par.[0087] wherein examples of semiconductors 406 include silicon (Si), silicon germanium (SiGe), and gallium arsenide (GaAs) with or without semiconductor dopants such as carbon (C), arsenic (As), boron (B), phosphorus (P), tin (Sn), and antimony (Sb) (i.e.; doped Si is polycrystalline Si or polysilicon); this stack 410 may be used in S/D structure; see Par.[0112] wherein the dielectric material 413). With respect to claim 8, Hsieh discloses, in Figs.1A-7B, the method, wherein the conditions comprise a first temperature of 400 0C or less (see Par.[0076] wherein the temperature of the substrate and the pressure of the chamber may be controlled; the chamber may be pressurized to at least 10 Torr, e.g. at least 30 Torr; see Par.[0080]-[0082] wherein MoCl.sub.5 may be selectively deposited on a metal material with respect to a dielectric material where the process temperature is 300° C. to 800° C. In some embodiments, the substrate temperature is 350° C. to 550° C). With respect to claim 10, Hsieh discloses, in Figs.1A-7B, the method, wherein the conditions comprise a first pressure of 1 Torr to 100 Torr (see Par.[0076] wherein the temperature of the substrate and the pressure of the chamber may be controlled; the chamber may be pressurized to at least 10 Torr, e.g. at least 30 Torr; see Par.[0080]-[0082] wherein MoCl.sub.5 may be selectively deposited on a metal material with respect to a dielectric material where the process temperature is 300° C. to 800° C. In some embodiments, the substrate temperature is 350° C. to 550° C). With respect to claim 11, Hsieh discloses, in Figs.1A-7B, the method, further comprising contacting the structure with a first co-reactant precursor under the conditions (see Par.[0093] wherein the feature may be exposed to a continuous or pulsed flow of the molybdenum halide; while an inert gas such as argon (Ar) may be present, a co-reactant such as hydrogen (H.sub.2) is generally not present to prevent deposition). With respect to claim 12, Hsieh discloses, in Figs.1A-7B, the method, further comprising: contacting the structure (401) with the molybdenum precursor under second conditions, so as to obtain a second molybdenum material (408) on at least a portion of the molybdenum material (407) (see Par.[0103]-[0110] wherein the feature 410 may be filled using ALD, plasma enhanced ALD, chemical vapor deposition (CVD), or plasma enhanced CVD. For ALD or CVD, H.sub.2 may be the reducing agent. Mo deposits more quickly using a molybdenum oxyhalide precursor than the MoCl.sub.x precursor used to form the initial Mo layer; for example, a MoO.sub.yX.sub.z precursor may deposit Mo at a deposition rate at least twice as fast as a MoCl.sub.x precursor for a non-plasma process the underlying stack 410 has a metal silicide nitride (MSi.sub.xN.sub.y) layer 408 and a metal silicide layer (MSi.sub.x) 407 connected to a semiconductor layer 406; the MoCl.sub.x precursor effectively removes any oxide (e.g.; metal oxides) on the surface; as such, deposition of metal silicide nitride (MSi.sub.xN.sub.y) layer 408 involve removing oxides (e.g.; metal oxides) from surface of metal silicide layer (MSi.sub.x) 407). With respect to claim 13, Hsieh discloses, in Figs.1A-7B, the method, wherein contacting the structure with the molybdenum precursor under the second conditions removes metal oxides from the molybdenum material (407) and deposits the second molybdenum material (408) on at least a portion of the non-dielectric material (406) (see Par.[0103]-[0110] wherein the feature 410 may be filled using ALD, plasma enhanced ALD, chemical vapor deposition (CVD), or plasma enhanced CVD. For ALD or CVD, H.sub.2 may be the reducing agent. Mo deposits more quickly using a molybdenum oxyhalide precursor than the MoCl.sub.x precursor used to form the initial Mo layer; for example, a MoO.sub.yX.sub.z precursor may deposit Mo at a deposition rate at least twice as fast as a MoCl.sub.x precursor for a non-plasma process the underlying stack 410 has a metal silicide nitride (MSi.sub.xN.sub.y) layer 408 and a metal silicide layer (MSi.sub.x) 407 connected to a semiconductor layer 406; the MoCl.sub.x precursor effectively removes any oxide (e.g.; metal oxides) on the surface; as such, deposition of metal silicide nitride (MSi.sub.xN.sub.y) layer 408 involve removing oxides (e.g.; metal oxides) from surface of metal silicide layer (MSi.sub.x) 407). With respect to claim 14, Hsieh discloses, in Figs.1A-7B, a method comprising: obtaining a structure (401), wherein the structure comprises: a polysilicon (406); and a dielectric material (413) (see Par.[0105] wherein a feature 401 having a conformal TiN liner layer 415 is shown; the underlying stack 410 has a metal silicide nitride (MSi.sub.xN.sub.y) layer 408 and a metal silicide layer (MSi.sub.x) 407 connected to a semiconductor layer 406, e.g., silicon (Si) or silicon-germanium (SiGe); see Par.[0087] wherein examples of semiconductors 406 include silicon (Si), silicon germanium (SiGe), and gallium arsenide (GaAs) with or without semiconductor dopants such as carbon (C), arsenic (As), boron (B), phosphorus (P), tin (Sn), and antimony (Sb) (i.e.; doped Si is polycrystalline Si or polysilicon); this stack 410 may be used in S/D structure; see Par.[0112] wherein the dielectric material 413); contacting the structure with a molybdenum precursor under first conditions, so as to obtain a molybdenum silicide (407) on the polysilicon (406), contacting the structure with the molybdenum precursor under second conditions, so as to obtain a molybdenum metal (408) on the molybdenum silicide (407) (see Par.[0103]-[0110] wherein the feature 410 may be filled using ALD, plasma enhanced ALD, chemical vapor deposition (CVD), or plasma enhanced CVD. For ALD or CVD, H.sub.2 may be the reducing agent. Mo deposits more quickly using a molybdenum oxyhalide precursor than the MoCl.sub.x precursor used to form the initial Mo layer; for example, a MoO.sub.yX.sub.z precursor may deposit Mo at a deposition rate at least twice as fast as a MoCl.sub.x precursor for a non-plasma process the underlying stack 410 has a metal silicide nitride (MSi.sub.xN.sub.y) layer 408 and a metal silicide layer (MSi.sub.x) 407 connected to a semiconductor layer 406; the MoCl.sub.x precursor effectively removes any oxide (e.g.; metal oxides) on the surface; as such, deposition of metal silicide nitride (MSi.sub.xN.sub.y) layer 408 involve removing oxides (e.g.; metal oxides) from surface of metal silicide layer (MSi.sub.x) 407). With respect to claim 15, Hsieh discloses, in Figs.1A-7B, the method, wherein the molybdenum silicide (407) is not obtained on the dielectric material (413) under the first conditions (see, for example, Figs.4A-4D, wherein stack 410 is exclusively on substrate and not of dielectric 413). With respect to claim 16, Hsieh discloses, in Figs.1A-7B, the method, wherein the molybdenum metal (408) is not obtained on the dielectric material (413) under the first conditions (see, for example, Figs.4A-4D, wherein stack 410 is exclusively on substrate and not of dielectric 413). With respect to claim 17, Hsieh discloses, in Figs.1A-7B, the method, wherein the first conditions comprise a first temperature of 400 0C or less (see Par.[0076] wherein the temperature of the substrate and the pressure of the chamber may be controlled; the chamber may be pressurized to at least 10 Torr, e.g. at least 30 Torr; see Par.[0080]-[0082] wherein MoCl.sub.5 may be selectively deposited on a metal material with respect to a dielectric material where the process temperature is 300° C. to 800° C. In some embodiments, the substrate temperature is 350° C. to 550° C). With respect to claim 19, Hsieh discloses, in Figs.1A-7B, the method, wherein the first conditions comprise a first pressure of 1 Torr to 100 Torr (see Par.[0076] wherein the temperature of the substrate and the pressure of the chamber may be controlled; the chamber may be pressurized to at least 10 Torr, e.g. at least 30 Torr; see Par.[0080]-[0082] wherein MoCl.sub.5 may be selectively deposited on a metal material with respect to a dielectric material where the process temperature is 300° C. to 800° C. In some embodiments, the substrate temperature is 350° C. to 550° C). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 8, 18 are rejected under 35 U.S.C. 103 as being unpatentable over Hsieh in view of Mingo Bisquert et al. (US 2011/0195185 A1 hereinafter referred to as “Mingo Bisquert”). With respect to claim 9, Hsieh discloses the method, wherein the conditions comprise a first flow rate of the molybdenum precursor (see Par.[0108] wherein When depositing Mo, the MoCl.sub.5 precursor is flowed into the feature. One or more of partial pressure, reactant flow rate, reactant concentration). However, Hsieh does not explicitly disclose a first flow rate of the molybdenum precursor of 0.01 sccm to 10 sccm. Mingo Bisquert discloses the method, wherein the conditions comprise a first flow rate of the molybdenum precursor of 0.01 sccm to 10 sccm (see Par.[0070] wherein Molybdenum silicide nanoinclusions are grown by injection of 2 to 3 sccm of MoCl.sub.5 precursors). Hsieh and Mingo Bisquert are analogous art because they are all directed to a method of deposition, and one of ordinary skill in the art would have had a reasonable expectation of success by modifying Hsieh to include Mingo Bisquert because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the flow rate of Mo precursor in Hsieh by including includes a precise flow rate of Mo precursor deposition as taught by Mingo Bisquert in order to utilize the precise deposition rate that is critical for controlling film growth, uniformity, and composition. With respect to claim 18, Hsieh discloses the method, wherein the conditions comprise a first flow rate of the molybdenum precursor (see Par.[0108] wherein When depositing Mo, the MoCl.sub.5 precursor is flowed into the feature. One or more of partial pressure, reactant flow rate, reactant concentration). However, Hsieh does not explicitly disclose a first flow rate of the molybdenum precursor of 0.01 sccm to 10 sccm. Mingo Bisquert discloses the method, wherein the conditions comprise a first flow rate of the molybdenum precursor of 0.01 sccm to 10 sccm (see Par.[0070] wherein Molybdenum silicide nanoinclusions are grown by injection of 2 to 3 sccm of MoCl.sub.5 precursors). Hsieh and Mingo Bisquert are analogous art because they are all directed to a method of deposition, and one of ordinary skill in the art would have had a reasonable expectation of success by modifying Hsieh to include Mingo Bisquert because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the flow rate of Mo precursor in Hsieh by including includes a precise flow rate of Mo precursor deposition as taught by Mingo Bisquert in order to utilize the precise deposition rate that is critical for controlling film growth, uniformity, and composition. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Hsieh. With respect to claim 20, Hsieh discloses, in Figs.1A-7B, a substrate comprising, wherein the structure (401) comprises: a non-dielectric material (406); and a dielectric material (413) (see Par.[0105] wherein a feature 401 having a conformal TiN liner layer 415 is shown; the underlying stack 410 has a metal silicide nitride (MSi.sub.xN.sub.y) layer 408 and a metal silicide layer (MSi.sub.x) 407 connected to a semiconductor layer 406, e.g., silicon (Si) or silicon-germanium (SiGe); see Par.[0087] wherein examples of semiconductors 406 include silicon (Si), silicon germanium (SiGe), and gallium arsenide (GaAs) with or without semiconductor dopants such as carbon (C), arsenic (As), boron (B), phosphorus (P), tin (Sn), and antimony (Sb) (i.e.; doped Si is polycrystalline Si or polysilicon); this stack 410 may be used in S/D structure; see Par.[0112] wherein the dielectric material 413); contacting the structure (401) with a molybdenum precursor under conditions, so as to obtain a molybdenum material (407) on at least a portion of the structure (401); Wherein a molybdenum precursor is selectively deposited on the substrate so that there is a deposited portion with a coverage of deposited portion smaller than a non deposited portion (see Par.[0103]-[0110] wherein the feature 410 may be filled using ALD, plasma enhanced ALD, chemical vapor deposition (CVD), or plasma enhanced CVD. For ALD or CVD, H.sub.2 may be the reducing agent. Mo deposits more quickly using a molybdenum oxyhalide precursor than the MoCl.sub.x precursor used to form the initial Mo layer; for example, a MoO.sub.yX.sub.z precursor may deposit Mo at a deposition rate at least twice as fast as a MoCl.sub.x precursor for a non-plasma process the underlying stack 410 has a metal silicide nitride (MSi.sub.xN.sub.y) layer 408 and a metal silicide layer (MSi.sub.x) 407 connected to a semiconductor layer 406; the MoCl.sub.x precursor effectively removes any oxide (e.g.; metal oxides) on the surface; as such, deposition of metal silicide nitride (MSi.sub.xN.sub.y) layer 408 involve removing oxides (e.g.; metal oxides) from surface of metal silicide layer (MSi.sub.x) 407; see Figs.4A-4D wherein deposition are is smaller than that of non-deposition area). However, Hsieh does not explicitly disclose that a molybdenum precursor is selectively deposited on the substrate so that there is a deposited portion with a coverage of greater than 1.3 x 1016 at/cm2 and a non deposited portion with a coverage is less than 6 x 1014 at/cm2. Even though Hsieh does not disclose a molybdenum precursor is selectively deposited on the substrate so that there is a deposited portion with a coverage of greater than 1.3 x 1016 at/cm2 and a non deposited portion with a coverage is less than 6 x 1014 at/cm2, the said range is predictable by simple engineering optimization motivated by a design choice, such as, source/drain contact conductivity. In cases like the present, where patentability is said to be based upon particular chosen dimensions or upon another variable recited within the claims, applicant must show that the chosen dimensions are critical. As such, the claimed dimensions appear to be an obvious matter of engineering design choice and thus, while being a difference, does not serve in any way to patentably distinguish the claimed invention from the applied prior art. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990); In re Kuhle, 526 F2d. 553,555,188 USPQ 7, 9 (CCPA 1975). Citation of Pertinent Prior Art The prior art made of record (e.g.; see PTO-892) and not relied upon is considered pertinent to applicant's disclosure. Examiner’s Telephone/Fax Contacts Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOULOUCOULAYE INOUSSA whose telephone number is (571)272-0596. The examiner can normally be reached Monday-Friday (10-18). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JEFF W NATALINI can be reached at 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Mouloucoulaye Inoussa/ Primary Examiner, Art Unit 2818
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Prosecution Timeline

Nov 06, 2023
Application Filed
Feb 26, 2026
Non-Final Rejection — §102, §103 (current)

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