DETAILED ACTION
This correspondence is in response to the communications received 11/09/2023. Claims 1-6 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 09/24/2024 has been considered by the examiner and made of record in the application file.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claim 1 is objected to because of the following informalities: Claim 1 recites "wherein the polyurethane resin (C) has a storage elastic modulus at 25°C a dynamic viscoelastic analysis, of 8.0 MPa or higher". The limitation would be more understandable if written as “wherein the polyurethane resin (C) has a storage elastic modulus at 25°C of 8.0 MPa or higher, measured using [[a]] dynamic viscoelastic analysis[[,]] technique . Appropriate correction is required.
Claim 1 is objected to because of the following informalities: Claim 1 recites "a tensile strength". As tensile strength is a property of the film adhesive, “wherein a maximum tensile stress in a stress-strain curve when a tensile strength is applied to a film adhesive…” should instead read “wherein a maximum tensile stress in a stress-strain curve when a tensile force is applied to a film adhesive…”. Appropriate correction is required.
Claim 2 is objected to because of the following informalities: Claim 2 recites "wherein when the film adhesive formed using the adhesive composition is heated at a temperature elevation rate of 5°C/min from 25°C, a melt viscosity at 70°C is 50000 Pa·s or less". The limitation should instead read "wherein when the film adhesive formed using the adhesive composition is heated at a temperature elevation rate of 5°C/min from 25°C, and has a melt viscosity at 70°C is 50000 Pa·s or less". Appropriate correction is required.
Claim 5 is objected to because of the following informalities: Claim 5 appears to have an extraneous semicolon in line 8. The limitation should instead read “a piece of the film adhesive[[;]] on the dicing film” Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3 and 5 and the claims that depend therefrom are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites the limitation "a film adhesive" in line 1. There is insufficient antecedent basis for this limitation in the claim. It is unclear if the “a film adhesive” of claim 3 is the same film adhesive as recited in line 11 of claim 1. For the purposes of examination, the “film adhesive” recited by claims 1 and 3 will be interpreted as referring to the same element.
Claim 5 recites the limitation "an adhesive layer" in lines 7, 9, and 10-11. There is insufficient antecedent basis for this limitation in the claim. While “an adhesive layer” appears to be a part of “the semiconductor wafer with an adhesive layer”, it is unclear if the “an adhesive layer” is the same layer as recited in line 2 of claim 5. For the purposes of examination, “the semiconductor wafer with an adhesive layer” will be interpretated as “the semiconductor wafer with [[an]] the adhesive layer”.
Applicant’s Claim to Figure Comparison
It is noted that this comparison is merely for the benefit of reviewers of this office action during prosecution, to allow for an understanding of the examiner’s interpretation of the Applicant’s independent claims as compared to disclosed embodiments in Applicant’s Figures. No response or comments are necessary from Applicant.
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Regarding claim 5, a method of producing a semiconductor package, comprising:
a first step of providing an adhesive layer by thermocompression bonding the film adhesive (2) according to claim 3 to a back surface of a semiconductor wafer (1) in which at least one semiconductor circuit is formed on a surface, and providing a dicing film (3) via the adhesive layer (see Fig. 1);
a second step of dicing the semiconductor wafer and the adhesive layer simultaneously to obtain a semiconductor chip with an adhesive layer (5), which includes the semiconductor chip and a piece of the film adhesive; on the dicing film (see Fig. 2);
a third step of peeling the semiconductor chip with an adhesive layer off from the dicing film, and thermocompression bonding the semiconductor chip with an adhesive layer and a circuit board (6) via the adhesive layer (see Fig. 3); and
a fourth step of thermally curing the adhesive layer.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Wimmer et al. (US 20050189067 A1), in view of Fujimura et al. (US 10568212 B2), in view of Nakai et al. (US 10480121 B2), in view of Pinchuk et al. (US 9,731,051 B2).
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Regarding claim 1, Wimmer discloses an adhesive composition (see [0007] and [0009]-[0014]) comprising:
an epoxy resin (A) (“As component A) one or more epoxy resins based on bisphenol A type”, [0018]);
an epoxy resin curing agent (B) (“Dicyandiamide is used as the component B) as curing agent component”, [0022]);
a polyurethane resin (C) (“Other binders than the mentioned epoxy resins are additionally useful in the composition of the process according to the invention, such as bisphenol-F-epoxide resins, phenol novolac type epoxy resins, acryl resins, polyamide resins, polyimide resins, polyurethane resins, silicon resins, polyesters, polyolefins, fluoride resins”, [0021]); and
an inorganic filler (D) (“Fillers in a quantity of below 30 wt. %, relative to the composition A) to D) are additionally usable”, [0028], Wimmer does not specify that the filler is inorganic, however a secondary reference will be used to teach this limitation below),
wherein a maximum tensile stress in a stress-strain curve when a tensile strength is applied to a film adhesive formed using the adhesive composition is 7.0 MPa or higher (as seen in Table 2 of Wimmer, Composition No. 3 has a tensile strength of >19 N/mm2, or 19 MPa, Wimmer does not teach using a stress-strain curve to measure tensile strength, however a secondary reference will be used to teach this limitation below).
Wimmer does not directly disclose with sufficient specificity “wherein a proportion of the polyurethane resin (C) based on a total content of the epoxy resin (A) and the polyurethane resin (C) is from 2.0 to 50.0 mass%”.
However, Wimmer does teach “the epoxy resin is used in a quantity of 40 to 70 wt. %”, [0018], and “Other binders than the mentioned epoxy resins are additionally useful in the composition of the process according to the invention, such as bisphenol-F-epoxide resins, phenol novolac type epoxy resins, acryl resins, polyamide resins, polyimide resins, polyurethane resins, silicon resins, polyesters, polyolefins, fluoride resins. These are preferably used as aqueous composition in quantities of below 20 wt. %”, [0021], thus as the epoxy resin is between 40 and 70 wt. %, the polyurethane resin is below 8 or 14 wt. % respectively relative to the epoxy resin. MPEP 2144.05 I states “In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists.”
Wimmer fails to disclose “an inorganic filler (D);
wherein the polyurethane resin (C) has a storage elastic modulus at 25°C a dynamic viscoelastic analysis, of 8.0 MPa or higher
wherein a maximum tensile stress in a stress-strain curve when a tensile strength is applied to a film adhesive formed using the adhesive composition is 7.0 MPa or higher.”
However, in a similar field of endeavor, Fujimura teaches an inorganic filler (D) (“while either well known inorganic fillers or organic fillers capable of lowering the coefficient of linear expansion of the electrical insulating layer can be used as the filler, it is preferable to use inorganic fillers. Specific examples of inorganic fillers include calcium carbonate, magnesium carbonate, barium carbonate, zinc oxide, titanium oxide, magnesium oxide, magnesium silicate, calcium silicate, zirconium silicate, hydrated alumina, magnesium hydroxide, aluminum hydroxide, barium sulfate, silica, talc, clay, and the like”, col. 8, lines 28-37).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to implement “an inorganic filler (D)” as taught by Fujimura in the system of Wimmer for the purpose of lowering the coefficient of linear expansion.
Wimmer in combination with Fujimura fails to disclose: “wherein the polyurethane resin (C) has a storage elastic modulus at 25°C a dynamic viscoelastic analysis, of 8.0 MPa or higher;
wherein a maximum tensile stress in a stress-strain curve when a tensile strength is applied to a film adhesive formed using the adhesive composition is 7.0 MPa or higher.”
However, in a similar field of endeavor, Nakai does not directly disclose with sufficient specificity wherein the polyurethane resin (C) has a storage elastic modulus at 25°C a dynamic viscoelastic analysis, of 8.0 MPa or higher.
However, Nakai does teach “the storage elastic modulus E′ of the polyurethane resin film at a temperature of 20° C. is 1 to 70 MPa, more preferably 5 to 40 MPa, from the viewpoint of flexibility and impact resilience”, col. 14, lines 52-54, where “The storage elastic modulus E′ and tan δ were determined for a film of polyurethane resin with a film thickness of 200 μm using a storage elastic modulus measuring apparatus”, col. 28, lines 5-7. MPEP 2144.05 I states “In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists.” With respect to the temperature at which the analysis was performed, one having ordinary skill in the art would recognize that the difference in temperature is minute and would not substantially impact the storage elastic modulus especially considering the magnitude of the taught storage elastic modulus range. Further, a prima facie case of obviousness exists where the claimed ranges and prior art ranges do not overlap but are close enough that one skilled in the art would have expected them to have the same properties (Titanium Metals Corp. v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to implement “wherein the polyurethane resin (C) has a storage elastic modulus at 25°C a dynamic viscoelastic analysis, of 8.0 MPa or higher” as taught by Nakai in the system of Wimmer in combination with Fujimura for the purpose of providing the adhesive composition with flexibility and impact resistance.
Wimmer in combination with Fujimura and Nakai fails to disclose: “wherein a maximum tensile stress in a stress-strain curve when a tensile strength is applied to a film adhesive formed using the adhesive composition is 7.0 MPa or higher.”
However, in a similar field of endeavor, Pinchuk teaches wherein a maximum tensile stress in a stress-strain curve when a tensile strength is applied to a film adhesive formed using the adhesive composition is 7.0 MPa or higher (“The maximum tensile strength of the polymer blend is the maximum stress on the stress-strain curve, which can be measured by subjecting a sample of the polymer blend to pull testing in a tension tester”, col. 9, lines 20-23, thus the tensile strength presented by Wimmer can be measured using the stress-strain curve created from data produced by a tension tester).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to implement “wherein a maximum tensile stress in a stress-strain curve when a tensile strength is applied to a film adhesive formed using the adhesive composition is 7.0 MPa or higher” as taught by Pinchuk in the system of Wimmer in combination with Fujimura and Nakai for the purpose of measuring the tensile strength of the film adhesive.
Regarding claim 3, Wimmer further discloses a film adhesive obtained from the adhesive composition (“Application of the composition by the process according to the invention proceeds in known manner, e.g., by spraying or dip coating onto one or both sides of the electrical steel sheet surface as one or more layers to layer thicknesses of 1 to 20 µm, preferably 2 to 12 µm, particularly preferred 3 to 8 µm per layer”, [0031], where “Drying of the coating is effected as physical drying process at temperatures causing a PMT (peak metal temperature) in the range of 230 to 260.degree. C. The dry film forms a so-called protective layer thereby maintaining the active state of the coating”, [0033], further “After the drying process, parts can be stamped out of the coated steel sheet and can then be stacked. By the supply of heat and pressure, the coating of the individual sheets bonds together and cures” [0034], thus the composition is an adhesive film used to bond electrical steel sheets together) according to claim 1 disclosed by Wimmer in combination with Fujimura, Nakai and Pinchuk.
Regarding claim 4, Wimmer in combination with Fujimura, Nakai and Pinchuk discloses the film adhesive according to claim 3, Wimmer further discloses which has a film thickness of 1 to 20 µm (as discussed above, Wimmer discloses a preferred film thickness of 3 to 8 µm per layer).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Wimmer et al. (US 20050189067 A1), in view of Fujimura et al. (US 10568212 B2), in view of Nakai et al. (US 10480121 B2), in view of Pinchuk et al. (US 9,731,051 B2) in view of Terai (US 20110006441 A1) in view of Takamoto et al. (US 9,472,439 B2).
Regarding claim 2, Wimmer in combination with Fujimura, Nakai, and Pinchuk, discloses the adhesive composition according to claim 1.
Wimmer in combination with Fujimura, Nakai and Pinchuk fails to disclose “wherein when the film adhesive formed using the adhesive composition is heated at a temperature elevation rate of 5°C/min from 25°C, a melt viscosity at 70°C is 50000 Pa·s or less.”
However, in a similar field of endeavor, Terai does not directly disclose with sufficient wherein when the film adhesive formed using the adhesive composition is heated at a temperature elevation rate of 5°C/min from 25°C.
However, Terai does teach “A dynamic viscoelasticity of the adhesive layer of the adhesive film for the semiconductor element of the present invention is measured with a dynamic viscoelasticity device commercially available from SEIKO Instrument Co. Ltd., in temperature dependant measurement mode under the condition of a frequency of 10 Hz and heated at a temperature ramp rate 5 degrees C./min from the normal temperature, to determine the storage elastic modulus at 175 degrees C”, [0104]. The normal temperature disclosed by Terai is understood to be room temperature, which one of ordinary skill in the art would recognize as equivalent to 25 °C as a starting point for a thermal ramp process. Further, a prima facie case of obviousness exists where the claimed ranges and prior art ranges do not overlap but are close enough that one skilled in the art would have expected them to have the same properties (Titanium Metals Corp. v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to implement “wherein when the film adhesive formed using the adhesive composition is heated at a temperature elevation rate of 5°C/min from 25°C” as taught by Terai in the system of Wimmer in combination with Fujimura, Nakai and Pinchuk for the purpose of heating the adhesive uniformly for more accurate analysis.
Wimmer in combination with Fujimura, Nakai, Pinchuk, and Terai fails to disclose “a melt viscosity at 70°C is 50000 Pa·s or less.”
However, in a similar field of endeavor, Figs. 1-2F of Takamoto teaches a melt viscosity at 70°C is 50000 Pa·s or less (“the melt viscosity of the thermosetting resin layer 2 at 60 to 100° C. before heat curing is preferably 4000 Pa·s or less”, col. 14, lines 19-21, where the thermosetting resin is equivalent to the film adhesive taught by Wimmer in combination with Fujimura, Nakai, Pinchuk, and Terai).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to implement “a melt viscosity at 70°C is 50000 Pa·s or less” as taught by Takamoto in the system of Wimmer in combination with Fujimura, Nakai, Pinchuk, and Terai for the purpose of assuring easy shaping of the film adhesive.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Wimmer et al. (US 20050189067 A1), in view of Fujimura et al. (US 10568212 B2), in view of Nakai et al. (US 10480121 B2), in view of Pinchuk et al. (US 9,731,051 B2) in view of Maki (US 7,888,141 B2) in view of Umehara et al (US 6,007,920 A) in view of Kawamori et al. (US 7,851,131 B2).
Regarding claim 5, Wimmer in combination with Fujimura, Nakai and Pinchuk, discloses the film adhesive according to claim 3.
Wimmer in combination with Fujimura, Nakai, and Pinchuk fails to disclose “a method of producing a semiconductor package, comprising:
a first step of providing an adhesive layer by thermocompression bonding the film adhesive according to claim 3 to a back surface of a semiconductor wafer in which at least one semiconductor circuit is formed on a surface, and providing a dicing film via the adhesive layer;
a second step of dicing the semiconductor wafer and the adhesive layer simultaneously to obtain a semiconductor chip with an adhesive layer, which includes the semiconductor chip and a piece of the film adhesive; on the dicing film;
a third step of peeling the semiconductor chip with an adhesive layer off from the dicing film, and thermocompression bonding the semiconductor chip with an adhesive layer and a circuit board via the adhesive layer; and
a fourth step of thermally curing the adhesive layer.”
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However, in a similar field of endeavor, Figs. 23-29 of Maki teach a method of producing a semiconductor package (see title), comprising:
a first step of providing an adhesive layer by thermocompression bonding the film adhesive according to claim 3 to a back surface of a semiconductor wafer (“a double-coated adhesive sheet for die bonding or an adhesive layer for die bonding, called DAF, i.e., "die attach film," is affixed to the back surface of the wafer before dividing the wafer into chips or when or before affixing the dicing tape”, col. 29, lines 46-50, where the double-coated adhesive sheet is the film adhesive disclosed by Wimmer in combination with Fujimura, Nakai and Pinchuk, Maki does not specify thermocompression bonding the film in this step, however a secondary reference will be used to teach this limitation below) in which at least one semiconductor circuit is formed on a surface (Maki previously describes the process of forming chips: “Integrated circuits are formed over a main surface of such a wafer 1A as shown in FIG. 1, which is formed of a single crystal silicon, in accordance with a known manufacturing process, then the integrated circuits formed respectively in plural chip-forming regions 1A'”, col. 22, lines 53-57, thus the chips taught by Maki include semiconductor circuits), and providing a dicing film via the adhesive layer (as discussed previously Maki teaches forming the adhesive layer on the back surface of the wafer prior to affixing the dicing tape);
a second step of dicing the semiconductor wafer and the adhesive layer simultaneously to obtain a semiconductor chip with an adhesive layer, which includes the semiconductor chip and a piece of the film adhesive; on the dicing film (“DAF is generally stretched in a sandwiched form in between the back surface of the wafer and the dicing tape and is divided together with chips at the time of dicing.”, col. 29, lines 53-56);
a third step of peeling the semiconductor chip with an adhesive layer off from the dicing film (“the chip 1 having been peeled from the dicing tape 4 is chucked by physical chucking”, col. 29, lines 60-61 where “Pre-affixing the die attach film eliminates the need of re-forming an adhesive layer at the time of die bonding and is thus advantageous in point of mass production”, col. 29, lines 57-60), and thermocompression bonding the semiconductor chip with an adhesive layer and a circuit board via the adhesive layer (“As shown in FIG. 25, once the landing of the chip 1 onto the wiring substrate 11 is confirmed, the collet 105 stays at that position for a predetermined time (for example, one to several seconds) while pressing down the chip 1 at a predetermined pressure and while keeping vacuum suction OFF. Thermocompression bonding proceeds during this period”, col. 30, lines 5-11, where wiring substrate is previously described as “a organic wiring substrate, a ceramic wiring substrate, a lead frame, or any other thin film-like integrated circuit device, including chip and wafer”, col. 21, lines 41-44, thus 11 is a circuit board as it is a substrate with integrated circuits).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to implement “a method of producing a semiconductor package, comprising:
a first step of providing an adhesive layer by thermocompression bonding the film adhesive according to claim 3 to a back surface of a semiconductor wafer in which at least one semiconductor circuit is formed on a surface, and providing a dicing film via the adhesive layer;
a second step of dicing the semiconductor wafer and the adhesive layer simultaneously to obtain a semiconductor chip with an adhesive layer, which includes the semiconductor chip and a piece of the film adhesive; on the dicing film;
a third step of peeling the semiconductor chip with an adhesive layer off from the dicing film, and thermocompression bonding the semiconductor chip with an adhesive layer and a circuit board via the adhesive layer” as taught by Maki in the system of Wimmer in combination with Fujimura, Nakai and Pinchuk for the purpose of using a high strength, flexible, insulating adhesive to bond a semiconductor chip to a circuit board.
Wimmer in combination with Fujimura, Nakai, Pinchuk, and Maki fails to disclose “a first step of providing an adhesive layer by thermocompression bonding the film adhesive according to claim 3 to a back surface of a semiconductor wafer;
a fourth step of thermally curing the adhesive layer.”
However, in a similar field of endeavor, Umehara teaches a first step of providing an adhesive layer by thermocompression bonding the film adhesive according to claim 3 to a back surface of a semiconductor wafer (“A 4-inch silicon wafer was fixed to the polyimide adhesive surface of a wafer dicing/bonding sheet by a thermocompression bonding”, col. 8, lines 26-28).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to implement “a first step of providing an adhesive layer by thermocompression bonding the film adhesive according to claim 3 to a back surface of a semiconductor wafer” as taught by Umehara in the system of Wimmer in combination with Fujimura, Nakai, Pinchuk, and Maki for the purpose of securely adhering the semiconductor wafer to the dicing film.
Wimmer in combination with Fujimura, Nakai, Pinchuk, Maki, and Umehara fails to disclose “a fourth step of thermally curing the adhesive layer.”
However, in a similar field of endeavor, Kawamori teaches a fourth step of thermally curing the adhesive layer (“This silicon chip was mounted on a glass substrate of 10 mm × 10 mm × 0.55 mm thickness with the adhesive film sandwiched therebetween, and bonded by thermocompression on a 120° C. heating plate under 500 gf for 10 seconds. Next, it was heated in a 160° C. oven for 3 hours to heat-cure the adhesive film”, col. 27, lines 6-11).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to implement “a fourth step of thermally curing the adhesive layer” as taught by Kawamori in the system of Wimmer in combination with Fujimura, Nakai, Pinchuk, Maki, and Umehara for the purpose of improving the long term stability of the adhesive layer.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Wimmer et al. (US 20050189067 A1), in view of Fujimura et al. (US 10568212 B2), in view of Nakai et al. (US 10480121 B2), in view of Pinchuk et al. (US 9,731,051 B2) in view of Maki (US 7,888,141 B2) in view of Kawamori et al. (US 7,851,131 B2).
Regarding claim 6, Wimmer in combination with Fujimura, Nakai and Pinchuk, discloses the film adhesive according to claim 3.
Wimmer in combination with Fujimura, Nakai and Pinchuk fails to disclose “a semiconductor package wherein a semiconductor chip and a circuit board, or semiconductor chips are bonded via a thermally cured body of the film adhesive according to claim 3.”
However, in a similar field of endeavor, Figs. 23-29 of Maki teach a semiconductor package wherein a semiconductor chip and a circuit board, or semiconductor chips are bonded via a thermally cured body of the film adhesive according to claim 3 (“a double-coated adhesive sheet for die bonding or an adhesive layer for die bonding, called DAF, i.e., "die attach film," is affixed to the back surface of the wafer before dividing the wafer into chips or when or before affixing the dicing tape”, col. 29, lines 46-50, where the double-coated adhesive sheet is the film adhesive disclosed by Wimmer in combination with Fujimura, Nakai and Pinchuk, where Maki previously describes the process of forming chips: “Integrated circuits are formed over a main surface of such a wafer 1A as shown in FIG. 1, which is formed of a single crystal silicon, in accordance with a known manufacturing process, then the integrated circuits formed respectively in plural chip-forming regions 1A'”, col. 22, lines 53-57, thus the chips taught by Maki include semiconductor chips, and “As shown in FIG. 25, once the landing of the chip 1 onto the wiring substrate 11 is confirmed, the collet 105 stays at that position for a predetermined time (for example, one to several seconds) while pressing down the chip 1 at a predetermined pressure and while keeping vacuum suction OFF. Thermocompression bonding proceeds during this period”, col. 30, lines 5-11, where wiring substrate is previously described as “a organic wiring substrate, a ceramic wiring substrate, a lead frame, or any other thin film-like integrated circuit device, including chip and wafer”, col. 21, lines 41-44, thus 11 is a circuit board as it is a substrate with integrated circuits, Maki does not disclose thermally curing the adhesive film, however a secondary reference will be used to teach this limitation below).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to implement “a semiconductor package wherein a semiconductor chip and a circuit board, or semiconductor chips are bonded via a thermally cured body of the film adhesive according to claim 3” as taught by Maki in the system of Wimmer in combination with Fujimura, Nakai and Pinchuk for the purpose of using a high strength, flexible, insulating adhesive to bond a semiconductor chip to a circuit board.
Wimmer in combination with Fujimura, Nakai, Pinchuk, and Maki fails to disclose “wherein a semiconductor chip and a circuit board, or semiconductor chips are bonded via a thermally cured body of the film adhesive according to claim 3”.
However, in a similar field of endeavor, Kawamori teaches wherein a semiconductor chip and a circuit board, or semiconductor chips are bonded via a thermally cured body of the film adhesive according to claim 3 (“This silicon chip was mounted on a glass substrate of 10 mm × 10 mm × 0.55 mm thickness with the adhesive film sandwiched therebetween, and bonded by thermocompression on a 120° C. heating plate under 500 gf for 10 seconds. Next, it was heated in a 160° C. oven for 3 hours to heat-cure the adhesive film”, col. 27, lines 6-11).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to implement “a fourth step of thermally curing the adhesive layer” as taught by Kawamori in the system of Wimmer in combination with Fujimura, Nakai, Pinchuk, and Maki for the purpose of improving the long term stability of the adhesive layer.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN M KUPP whose telephone number is (571)272-5608. The examiner can normally be reached Monday - Friday, 7:00 am - 4:00 pm PT.
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/BENJAMIN MICHAEL KUPP/Examiner, Art Unit 2893
/YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893