Prosecution Insights
Last updated: April 19, 2026
Application No. 18/388,386

DIODE LAYER STACK FLIP-CHIP MOUNTED TO A LEADFRAME BY USE OF A COPPER NICKEL TIN METALLIZATION STACK AND DIFFUSION SOLDERING

Non-Final OA §102§103
Filed
Nov 09, 2023
Examiner
TRAPANESE, WILLIAM C
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Infineon Technologies Austria AG
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
3y 3m
To Grant
98%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
479 granted / 626 resolved
+8.5% vs TC avg
Strong +21% interview lift
Without
With
+21.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
30 currently pending
Career history
656
Total Applications
across all art units

Statute-Specific Performance

§101
10.8%
-29.2% vs TC avg
§103
54.6%
+14.6% vs TC avg
§102
24.2%
-15.8% vs TC avg
§112
3.1%
-36.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 626 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Analysis for Independent Claims (Dependent Claim Analysis will follow) Claim Rejections - 35 USC § 102 (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Otremba (hereinafter Otremba, US 2007/166877). In regards to independent claim 14, Otremba teaches a semiconductor device, comprising a die pad comprising a copper leadframe comprising a first main surface and a second main surface opposite to the first main surface (Otrema, Fig. 2, Item 5, “The semiconductor module 1 further includes a leadframe 4 which includes a die pad 5 and three leads 6”); a silicon carbide diode die comprising a first main surface at an anode side of the diode die and a second main surface opposite to the first main surface at a cathode side of the diode die (Otremba, Fig. 2, Item 28, 3, 21, [0087], [0038], “The diode 3 of the semiconductor module 1 includes an upper surface with an anode electrode 21 and the lower surface with a cathode electrode 22,” “The diode may comprise silicon carbide”); and an intermetallic compound layer disposed between the die pad and the diode die, the intermetallic compound layer comprising copper and tin (Otremba, Fig. 2 Item 32, “The intermetallic phases 32 comprise tin and copper,” “In a first process, the diode 3 is mechanically and electrically attached to the upper surface 19 of the die pad 5 by pressing the diffusion solder layer 31 positioned on the rear surface of diode 3 onto the upper surface 19 of the die pad 5. The diffusion solder melts forming intermetallic phases 32 which have a higher melting point than the melting point of the diffusion solder”). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Otremba in view of Otremba et al. (hereinafter Paul, US 2012/0235227). In regards to independent claim 1, Otremba teaches a method for fabricating a semiconductor device, the method comprising providing a diode layer stack (Otremba, Fig. 2, Item 32, 30, 28, 3, 21, 23 [0087], “The diode 3 of the semiconductor module 1 includes an upper surface with an anode electrode 21 and the lower surface with a cathode electrode 22”) comprising a silicon carbide diode die comprising a first main surface at an anode side of the diode die and a second main surface opposite to the first main surface at a cathode side of the diode die stack (Otremba, Fig. 2, Item 28, 3, 21, [0087], [0038], “The diode 3 of the semiconductor module 1 includes an upper surface with an anode electrode 21 and the lower surface with a cathode electrode 22,” “The diode may comprise silicon carbide”), a layer stack on the first main surface of the diode die, the layer stack comprising a metal layer disposed on the first main surface of the diode die, and a tin or indium containing layer disposed above the copper layer (Otremba, Fig. 2 Item 29, [0096], “The contact layer 29 consists essentially of aluminium,” [0075], “The diffusion solder layer 31 comprises a tin-based diffusion solder” ); providing a die pad comprising a copper leadframe comprising a first main surface and a second main surface opposite to the first main surface (Otrema, Fig. 2, Item 5, “The semiconductor module 1 further includes a leadframe 4 which includes a die pad 5 and three leads 6”); and performing a diffusion soldering process for connecting the diode layer stack with the layer stack to the first main surface of the die pad (Otrema, [0099], “In a first process, the diode 3 is mechanically and electrically attached to the upper surface 19 of the die pad 5 by pressing the diffusion solder layer 31 positioned on the rear surface of diode 3 onto the upper surface 19 of the die pad 5. The diffusion solder melts forming intermetallic phases 32 which have a higher melting point than the melting point of the diffusion solder”). Otremba fails to teach the contact layer is Copper. Paul teaches the contact layer is Copper (Paul, [0065], “The contact pads 611, 613 may be made of a metal, for example, aluminum or copper”). It would have been obvious to one of ordinary skill in the art, having the teachings of Otremba and Paul before him before the effective filing date of the claimed invention, to modify the diode stack taught by Otremba to include copper contact layer of Paul in order to obtain a diode stack that had a copper contact layer. One would have been motivated to make such a combination because it enables a lower contact resistance. Claim Analysis for Dependent Claims Claim Rejections - 35 USC § 102 (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 15-18, 21 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Otremba. In regards to dependent claim 15, Otremba teaches wherein the intermetallic compound layer comprises a structure in which two outer copper layers enclose an inner tin or indium layer (Otremba, [0025]). In regards to dependent claim 16, Otremba teaches wherein the intermetallic compound layer further comprises nickel (Otremba, [0034-0035], “The contact layer comprises one of a metal and an alloy thereof, the metal being one of the group of elements consisting of Ti, Ni and Cr, and the diffusion solder layer comprises an alloy, the alloy comprising Sn and one of the group consisting of Ag, Au, Cu and In… the diffusion solder layer and comprises one of a metal and an alloy thereof, the metal being one of the group of elements Ni, Au, Ag, Pt and Pd.”). In regards to dependent claim 17, Otremba teaches wherein the intermetallic compound layer comprises a layer sequence Cu, Ni, Sn or In, Ni, Cu (Otremba, [0034-0035], “The contact layer comprises one of a metal and an alloy thereof, the metal being one of the group of elements consisting of Ti, Ni and Cr, and the diffusion solder layer comprises an alloy, the alloy comprising Sn and one of the group consisting of Ag, Au, Cu and In… the diffusion solder layer and comprises one of a metal and an alloy thereof, the metal being one of the group of elements Ni, Au, Ag, Pt and Pd.”). In regards to dependent claim 18, Otremba teaches wherein the intermetallic compound layer comprises a thickness in a range from 10 μm to 120 μm (Otremba, [0076], “The means for producing a diffusion solder bond may have a thickness t where 0.1 μm to 100 μm”). In regards to dependent claim 21, Otremba teaches comprising a lead and at least one of a bond wire, a wedge, or a clip connecting the nickel layer on the second main surface of the diode die with the lead (Otremba, [0077], “electrical connections between the electrodes disposed on the upper surface of the semiconductor components and the rewiring structure may be produced. In an embodiment, the electrical connections are provided by bond wires”). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2-10, 13, 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Otremba in view of Otremba et al. (hereinafter Paul, US 2012/0235227). In regards to dependent claim 2, Otremba teaches wherein the layer stack further comprises a nickel containing layer disposed on the copper layer, wherein the tin containing layer is disposed on the nickel containing layer (Otremba, [0036], “The diffusion solder bond may comprise one of the following structures, the first mentioned metal being disposed directly on the silicon of the semiconductor body: Ti, diffusion solder; Ni, diffusion solder”). In regards to dependent claim 3, Otremba teaches wherein the nickel containing layer comprises pure nickel or an alloy of nickel with vanadium and/or phosphor (Otremba, [0036], “The diffusion solder bond may comprise one of the following structures, the first mentioned metal being disposed directly on the silicon of the semiconductor body: Ti, diffusion solder; Ni, diffusion solder”). In regards to dependent claim 4, Otremba fails to teach wherein the copper leadframe further comprises nickel containing layers disposed on both of the first and second main surfaces thereof. Paul teaches wherein the copper leadframe further comprises nickel containing layers disposed on both of the first and second main surfaces thereof (Paul, [0057], “The metal of which the carrier plate is made may, e.g., comprise one or more metals of the group of copper, aluminum, nickel, gold or any alloy based on one or more of these metals. The carrier plate 650 (e.g., a leadframe) may be made of one single bulk metal layer or a multi metal layer structure”). It would have been obvious to one of ordinary skill in the art, having the teachings of Otremba and Paul before him before the effective filing date of the claimed invention, to modify the diode stack taught by Otremba to include Nickel leadframe of Paul in order to obtain a diode stack attached to a nickel leadframe. One would have been motivated to make such a combination because it creates a diffusion barrier to prevent reaction with the contact metal. In regards to dependent claim 5, Otremba fails to teach wherein one or both of the nickel containing layers comprises pure nickel or an alloy of nickel with vanadium and/or phosphor. Paul teaches wherein one or both of the nickel containing layers comprises pure nickel or an alloy of nickel with vanadium and/or phosphor (Paul, [0057], “The metal of which the carrier plate is made may, e.g., comprise one or more metals of the group of copper, aluminum, nickel, gold or any alloy based on one or more of these metals. The carrier plate 650 (e.g., a leadframe) may be made of one single bulk metal layer or a multi metal layer structure”). It would have been obvious to one of ordinary skill in the art, having the teachings of Otremba and Paul before him before the effective filing date of the claimed invention, to modify the diode stack taught by Otremba to include Nickel leadframe of Paul in order to obtain a diode stack attached to a nickel leadframe. One would have been motivated to make such a combination because it creates a diffusion barrier to prevent reaction with the contact metal. In regards to dependent claim 6, Otremba teaches wherein the tin or indium containing layer comprises pure tin or pure indium or an alloy of tin and gold or indium and gold (Otremba, [0032], “The diffusion solder layer comprises an alloy and comprises tin and one of the elements silver, gold, copper and indium”). In regards to dependent claim 7, Otremba teaches wherein a thickness of the copper layer and the optional nickel layer of the layer stack is in a range from 10 μm to 100 μm (Otremba, [0033], “The contact layer may have a thickness a, where 0.01μm<=a<=10 μm,”). In regards to dependent claim 8, Otremba teaches wherein a thickness of the tin or indium containing layer of the layer stack is in a range from 0.5 μm to 5 μm (Otremba, [0033], “The diffusion solder layer may have a thickness c, where 0.1 μm to 80 μm, preferably 0.5 μm to 5 μm”) In regards to dependent claim 9, Otremba teaches wherein the diode layer stack further comprises a nickel layer on the second surface of the diode die (Otremba, [0036], “The diffusion solder bond may comprise one of the following structures, the first mentioned metal being disposed directly on the silicon of the semiconductor body: Ti, diffusion solder; Ni, diffusion solder”). In regards to dependent claim 10, Otremba teaches wherein a thickness of the nickel layer on the second main surface of the diode die is in a range from 0.2 μm to 2.0 μm (Otremba, [0033], “The diffusion barrier layer may have a thickness b, where 0.1 μm to 10 μm, preferably 0.1 μm to 1 μm”). In regards to dependent claim 13, Otremba teaches wherein the diode die comprises a nickel or silver layer on the second surface, and the method further comprises providing a lead and connecting the nickel or silver layer of the diode die by at least one of a bond wire, a wedge, or a clip with the lead (Otremba, [0077], “electrical connections between the electrodes disposed on the upper surface of the semiconductor components and the rewiring structure may be produced. In an embodiment, the electrical connections are provided by bond wires”). It would have been obvious to one of ordinary skill in the art, having the teachings of Otremba and Paul before him before the effective filing date of the claimed invention, to modify the diode stack taught by Otremba to include Nickel leadframe of Paul in order to obtain a diode stack attached to a nickel leadframe. One would have been motivated to make such a combination because it creates a diffusion barrier to prevent reaction with the contact metal. In regards to dependent claim 20, Otremba fails to teach wherein the die pad comprises nickel containing layers disposed on both the first and second main surfaces of the leadframe. Paul teaches wherein the die pad comprises nickel containing layers disposed on both the first and second main surfaces of the leadframe (Paul, [0057], “The metal of which the carrier plate is made may, e.g., comprise one or more metals of the group of copper, aluminum, nickel, gold or any alloy based on one or more of these metals. The carrier plate 650 (e.g., a leadframe) may be made of one single bulk metal layer or a multi metal layer structure”). Claim(s) 11, 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Otremba in view of Paul and Heinrich (hereinafter Heinrich, US 2016/0111395). In regards to dependent claim 11, Otremba fails to teach performing the diffusion soldering in a temperature range from 350° C. to 400° C. Heinrich teaches performing the diffusion soldering in a temperature range from 350° C. to 400° C (Heinrich, [0094]). It would have been obvious to one of ordinary skill in the art, having the teachings of Otremba and Paul and Heinrich before him before the effective filing date of the claimed invention, to modify the diode stack taught by Otremba to include the high temp diffusion soldering of Heinrich in order to obtain a diode stack attached to a headframe suing high temp diffusion soldering. One would have been motivated to make such a combination because it enables the use of higher melting point materials to be used to reduce contact resistance. In regards to dependent claim 12, Otremba fails to teach performing the diffusion soldering for a time duration in a range from 50 ms to 1 s or for a time duration in a range from 100 ms to 200 ms.. Heinrich teaches performing the diffusion soldering for a time duration in a range from 50 ms to 1 s or for a time duration in a range from 100 ms to 200 ms.° C (Heinrich, [0094]). It would have been obvious to one of ordinary skill in the art, having the teachings of Otremba and Paul and Heinrich before him before the effective filing date of the claimed invention, to modify the diode stack taught by Otremba to include the short time diffusion soldering of Heinrich in order to obtain a diode stack attached to a leadframe using short time diffusion soldering. One would have been motivated to make such a combination because it prevents the high temp from causing damage to other layers within the semiconductor element. Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Otremba in view of Heinrich (hereinafter Heinrich, US 2016/0111395). In regards to dependent claim 19, Otremba fails to teach wherein the intermetallic compound layer comprises an intermetallic phase having a melting temperature above 400° C. Heinrich teaches wherein the intermetallic compound layer comprises an intermetallic phase having a melting temperature above 400° C. (Heinrich, [0094]). It would have been obvious to one of ordinary skill in the art, having the teachings of Otremba and Heinrich before him before the effective filing date of the claimed invention, to modify the diode stack taught by Otremba to include the high temp diffusion soldering of Heinrich in order to obtain a diode stack attached to a leadframe using high temp diffusion soldering. One would have been motivated to make such a combination because it enables the use of higher melting point materials to be used to reduce contact resistance. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM C TRAPANESE whose telephone number is (571)270-3304. The examiner can normally be reached Monday - Friday 7am-12pm & 8pm-10pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM C TRAPANESE/Primary Examiner, Art Unit 2812
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Prosecution Timeline

Nov 09, 2023
Application Filed
Jan 24, 2026
Non-Final Rejection — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
98%
With Interview (+21.4%)
3y 3m
Median Time to Grant
Low
PTA Risk
Based on 626 resolved cases by this examiner. Grant probability derived from career allow rate.

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