Prosecution Insights
Last updated: July 17, 2026
Application No. 18/388,927

CHIP PACKAGE AND ITS METHOD OF FABRICATION

Final Rejection §103§112
Filed
Nov 13, 2023
Priority
Nov 14, 2022 — FR 2211833
Examiner
HOQUE, MOHAMMAD M
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
STMicroelectronics N.V.
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
627 granted / 737 resolved
+17.1% vs TC avg
Moderate +9% lift
Without
With
+9.2%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
43 currently pending
Career history
777
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
86.4%
+46.4% vs TC avg
§102
8.0%
-32.0% vs TC avg
§112
4.4%
-35.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 737 resolved cases

Office Action

§103 §112
DETAILED ACTION Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 12-13 and 16-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 12 recites the limitation "the first resist layer" in line 13 and 16. There is insufficient antecedent basis for this limitation in the claim. For examination purpose, the limitataion “the first resist layer”, will be replaced by “the first of resin”. As claims 13 and 16-18 depend on the above rejected claim 12, they are also being rejected on the same reason. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 12 and 16-18 are rejected under 35 U.S.C. 103 as being unpatentable over Wu et al. (US 7521770 B2, hereinafter Wu’770) in view of Kinoshita (US 20080267616 A1, hereinafter Kinoshita’616). Regarding independent claim 12, Wu’770 teaches, “A device (fig. 1-2; related descriptions), comprising: a support (11) having an upper surface; an integrated circuit chip (14) mounted on the upper surface of the support (11), wherein the integrated circuit chip (14) comprises: a lower surface (of IC 14) facing the upper surface of the support (11), at least one pixel arranged at an upper surface of the integrated circuit chip (14) and in a central portion of the upper surface of the integrated circuit chip (14), and PNG media_image1.png 802 862 media_image1.png Greyscale first electrical connection pads arranged at a periphery of the upper surface of the integrated circuit chip (14); a first layer of resin (17, ‘curable adhesive’) covering the upper surface of the support (11) and the periphery of the integrated circuit chip (14) and comprising a first opening (see annotation) in front of the central portion of the integrated circuit chip (14); and a second layer of resin (22, ‘holder’) covering a portion of the first layer of resin (17) and comprising a second opening (accommodating element 15, 30) having a central portion emerging onto the first opening (see annotation) and a peripheral portion (see annotation) emerging onto an upper surface of the first of resin (17); and a transparent plate (15) located in the second opening, positioned for closing the first opening and wherein a periphery of a lower surface of the transparent plate (15) is supported by the upper surface of the first of resin (17); and a third layer of resin (212, polycarbonate, acrylonitrile-butadiene-styrene) covering the second layer of resin (22) and a periphery of an upper surface of the transparent plate (15); and wherein the second layer of resin (22) prevents displacements of the transparent plate (15) in a plane parallel to the upper surface of the support (11). But Wu’770 is silent upon the provision of wherein layer 22 (‘holder’) is a resin layer. However, Kinoshita’616 teaches a similar structure (fig. 1), wherein the ‘holder’ layer (12) is a resin layer (¶ [0081]). Wu’770 and Kinoshita’616 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Wu’770 with the features of Kinoshita’616 because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Wu’770 and Kinoshita’616 to include a resin layer as a ‘holder’ according to the teachings of Kinoshita’616 with a motivation of exploiting the general advantages of resin materials e.g., high dielectric strength for electrical insulation, better thermal conductivity, design flexibility etc. Regarding claim 16, Wu’770 modified with Kinoshita’616 further teach, “The device according to claim 12, wherein the second layer of resin (22, fig. 1, Wu’770) comprises a laminate film layer positioned on the first layer of resin (17)”. Regarding claim 17, Wu’770 modified with Kinoshita’616 further teach, “The device according to claim 12, wherein the transparent plate (15, fig. 1) and the second opening (accommodating element 15, 30) have substantially (a very broad word) equal dimensions in a plane parallel to the upper surface of the support (11)”. Regarding claim 18, Wu’770 modified with Kinoshita’616 further teach, “The device according to claim 12, further comprising electrical connection wires (16, fig. 1) between the first electrical connection pads and second electrical connection pads (113) of the support (11) that are arranged on the side of the upper surface of the support (11), and wherein the first layer of resin (17) covers the first electrical connection pads wires and the second electrical connection pads”. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Wu’770 and Kinoshita’616 as applied to claim 12 as above, and further in view of Wang et al. (US 20170264799 A1, hereinafter Wang’799). Regarding claim 13, Wu’770 modified with Kinoshita’616 teach all the limitations described in claim 12. But Wu’770 modified with Kinoshita’616 is silent upon the provision of no glue is positioned between the upper surface of the integrated circuit chip and the lower surface of the transparent plate. However, Wang’799 teaches a similar optical device, wherein no glue is positioned between the upper surface of the integrated circuit chip (121, fig. 10) and the lower surface of the transparent plate (20). (The element 111 covering the bonding wires 124, circuit board 122 and photosensitive sensor 121, is made of polypropylene. See ¶ [0155]. Polypropylene is a non-adhesive resin) Wu’770 modified with Kinoshita’616 and Wang’799 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Wu’770 modified with Kinoshita’616 with the features of Wang’799 because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Wu’770 modified with Kinoshita’616 and Wang’799 to include non-adhesive resins to cover the bonding wires according to the teachings of Wang’799 to exploit the advantages of the non-adhesive resins such as high-temperature resistance, and friction reduction etc. Allowable Subject Matter Claims 1-11 are allowed. Response to Arguments Applicant’s arguments with respect to the newly amended claims have been considered but are moot because the arguments do not apply to any of the references being as used in the current rejection. Examiner’s Note Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182. Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M HOQUE whose telephone number is (571)272-6266. The examiner can normally be reached 9AM-7PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached on (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMMAD M HOQUE/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Nov 13, 2023
Application Filed
Jan 07, 2026
Non-Final Rejection mailed — §103, §112
Apr 02, 2026
Response Filed
Jun 11, 2026
Final Rejection mailed — §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
94%
With Interview (+9.2%)
2y 2m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 737 resolved cases by this examiner. Grant probability derived from career allowance rate.

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