Prosecution Insights
Last updated: August 17, 2026
Application No. 18/389,207

SYSTEM FOR PROCESS DEVELOPMENT ASSISTANCE

Non-Final OA §103
Filed
Nov 13, 2023
Examiner
AUGUSTINE, NICHOLAS
Art Unit
2178
Tech Center
2100 — Computer Architecture & Software
Assignee
Tokyo Electron Limited
OA Round
2 (Non-Final)
73%
Grant Probability
Favorable
2-3
OA Rounds
11m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
602 granted / 826 resolved
+17.9% vs TC avg
Strong +28% interview lift
Without
With
+27.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
32 currently pending
Career history
871
Total Applications
across all art units

Statute-Specific Performance

§101
10.6%
-29.4% vs TC avg
§103
37.3%
-2.7% vs TC avg
§102
48.9%
+8.9% vs TC avg
§112
1.9%
-38.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 826 resolved cases

Office Action

§103
DETAILED ACTION A. This action is in response to the following communications: Amendment filed: 03/13/2026. This action is made Final. B. Claims 1-20 remain pending. C. 35 USC 101 rejection is withdrawn due to amendment. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Clark, Robert et al. (US Pub. 2020/0081423 A1), herein referred to as “Clark” in view of Dismukes, John P. et al. (US Pub. 2004/0034555 A1), herein referred to as “Dismukes”. As for claims 1, 13 and 19, Clark teaches. A system and corresponding method of 13 and apparatus of 19, comprising: one or more processors and memory, the one or more processors configured to (par. 126-127 describes hardware environment for implementing the claimed invention): obtain, based on a scorecard for a set of criteria for fabricating a semiconductor device, a set of recipes stored in a knowledge base (par. 126 For example, a program stored in the memory of the control system 422 may be utilized to activate the inputs to the various processing systems and transfer systems according to a process recipe or sequence in order to perform desired integrated workpiece processing); obtain a set of feature dimensions associated with the set of recipes (par. 110 The active interdiction control can provide a multivariate, model-based system that is developed in conjunction with feed-forward and feedback mechanisms to automatically determine the optimal recipe for each workpiece based on both incoming workpieces and module or tool state properties); obtain, using an analytic hierarchy process on the set of feature dimensions, the set of criteria, and weights of the set of criteria, an objective function value of each of the set of recipes (par. 77 data utilization is provided with a hierarchical knowledge base built on equipment, data, and knowledge, established process technology, sensors and metrology data including virtual metrology data to monitor equipment and process status); select a subset of recipes according to the objective function value of each of the set of recipes; generate at least one recipe according to the selected subset of recipes and the objective function value (par. 219 The system can automatically select subsets of learned data from process sequences/ recipes to determine new recipes based upon collected and stored information inferred by the learning engine; such that the autonomous learning engine may implement data associated with the process sequence or recipe 1134 in order to determine proper corrective processing steps. Furthermore, the active interdiction control system may implement existing data from one or more databases 1132 for providing the necessary machine learning and artificial intelligence processing of the measured data 1136, process parameter data 1138 and platform performance data 1140 to detect non-conformities and determine corrective processing steps); and display, via a display device, the generated at least one recipe (par. 125 The controller 422 collects, provides, processes, stores, and displays data from any or all of the processing modules and tool components). Clark does not specifically in specific great detail teach execute analytic hierarchy process (pairwise); however in the same field of endeavor Dismukes teaches execute an analytic hierarchy process (par. 593-596 “AHP” and also alternatively the use of activity based costing ABC) on the set of feature dimensions, the set of criteria, and weights of the set of criteria (par. 274 The complex manufacturing system as shown in FIG. 7 is a flexible manufacturing cell, which is called cluster tool in semiconductor industry. It consists of 5 unite production processes (UPPs), which are named A, B, C, D, and E respectively); compute responsive to executing the analytic hierarchy process on the set of feature dimensions, the set of criteria an the weights of the set of criteria and objective function value for each set of recipe (par. 274 user is able to rework each step of manufacturing to adjust overall equipment effectiveness (OEE) of the UPPs); Obtain, responsive to execution of an optimization function using the objective function value and at least one parameter of the selected subset of recipes, an adjustment value of the at least one parameter (par. 401 wafer manufacturing in relation to the system analysis for OEE and UPPs to make adjustments to manufacturing process; par. 274 and 280); generate, responsive to obtaining the adjustment value of the at least one parameter at least one recipe comprising the adjustment value of the a least one parameter (par. 280 reworking manufacturing parameters/settings to make adjustments of OEE for the UPPs in create a product such as in par. 401 wafers of semiconductors); Display via a display device the generated at least one recipe and initiate subsequent to generating the at least one recipe a fabrication of the semiconductor device in accordance with the at least one recipe (par. 351; fig. 24 graphical user interface for displaying and interacting with adjusting values and viewing analysis of manufacturing discussed in par. 274,280 and 401-452 (clustering tool in semiconductor manufacturing)). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Dismukes into Clark because Dismukes in paragraph 25 suggests Following the first publication in 1988 of detailed information on the TPM methodology outside of Japan by Seichi Nakajima [1], manufacturing companies have recognized the importance of the OEE metric, and have begun applying it as part of their overall quality programs to address systematic waste elimination, continuous improvement and optimization of manufacturing processes carried out on individual production equipment. Researchers in the semiconductor chip industry [8-14] have taken the lead in these efforts, in collaboration with International SEMATECH (Austin, Tex.) and the Center for Semiconductor Manufacturing (UC Berkeley, California). Published literature assessments of OEE [11-12, 15-16] indicate some typical, broad ranges of OEE in manufacturing industries, but typically cite only overall OEE numbers, providing little insight into the effect of individual manufacturing variables on the three major efficiency factors of OEE in Equation. Dismukes includes by reference research paper “Using the Analytic Hierarchy Process and multi-objective programming for the selection of cost drivers in activity-based costing” Marc J. Schniederjans a, *, Tim Garvin b,1 1996 Examiner notes that parameters and recipe are arbitrary and would require clarification amendment to overcome; such as how recipe would be related to weights of the AHP. As for claims 2 and 14, Clark teaches. The system of claim 1, wherein to obtain the set of feature dimensions, the one or more processors are configured to: obtain a set of metrology images associated with the respective set of recipes; and convert the set of metrology images to the respective set of feature dimensions (par. 133 The active interdiction control system collects workpiece measurement data generally on-the-fly as the substrate moves in the processing sequence between one or more of the processing modules and the measurement/metrology module 516. The data is captured and then analyzed and processed to detect non-conformities and defects and provide corrective processing as discussed herein. The active interdiction control system 522 provides the necessary control of the processing steps of the sequence to make control adjustments to various fabrication processing steps as performed in order to correct for the detected non-conformities/defects. Adjustments may be made to process steps and processing chambers that precede or are upstream of the captured measurement data and/or process steps that follow or are downstream of the measurement data in sequence). As for claims 3 and 15, Clark teaches. The system of claim 1, wherein to obtain the set of feature dimensions, the one or more processors are configured to: obtain a plurality of sets of feature dimensions, each set associated with a recipe of the set of recipes (par. 120 various different dimensions for recipes in semi-conductor manufacturing). As for claim 4, Clark teaches. The system of claim 1, wherein to obtain the set of recipes, the one or more processors are configured to: execute a semantic search in the knowledge base according to the set of criteria; and receive, responsive to the semantic search, the set of recipes comprising one or more recipes having a set of features satisfying at least one criterion of the set of criteria (par. 219 Various combinations of the various machine learning algorithms implemented through the autonomous learning engine might be used for generating the knowledge that characterizes the measured data and the performance of the process sequence and determines a corrective processing action to address any detected non-conformities. The autonomous learning engine may implement data associated with the process sequence or recipe 1134 in order to determine proper corrective processing steps; note par. 323 describes in more detail about the knowledge network 1975). As for claims 5 and 16, Clark teaches. The system of claim 1, wherein the one or more processors are configured to: obtain an identifier associated with the scorecard; store the identifier in the knowledge base; and obtain the set of recipes associated with the identifier (par. 208 score identifiers are used for quality based upon the recipe that is currently being used in manufacturing to determined when a wafer is outside of normal behavior). As for claims 6 and 17, Clark teaches. The system of claim 5, wherein the one or more processors are configured to: store at least one of a set of metrology images, the set of feature dimensions, the subset of recipes, or the at least one recipe in association with the identifier (par. 14 a high volume manufacturing platform which incorporates metrology instruments integrated to measure workpieces before and/or after being treated in the platform's processing chambers. Par. 297 a high-resolution optical measurement systems may be used in the TMM/measurement module (e.g., high-resolution optical imaging and microscopy, hyperspectral (multi-spectral) imaging, interferometry, spectroscopy, Fourier transform Infrared spectroscopy (FTIR) reflectometry, scatterometry, spectroscopic ellipsometry, polarimetry, refractometers or non-optical imaging systems (e.g., SEM, TEM, AFM) to measure the dimensions of the contact feature). As for claim 7, Clark teaches. The system of claim 1, wherein a set of metrology images corresponds to scanning electron microscopy (SEM) images (par. 297 microscopy for high-resolution optical measurement). As for claims 8 and 18, Clark teaches. The system of claim 1, wherein to use the analytic hierarchy process, the one or more processors are configured to: perform a pairwise comparison between a set of features associated with the set of feature dimensions and the set of criteria (par. 371 Conceptualization engine 2545 can be a “virtual component” that can present coordinated activities of awareness autobots and conceptualization autobots. In an aspect, self-awareness component 2150 can feed forward (through FF loop 2152) a group of variables (e.g., variables in the group can be those that display good pairwise correlation properties) to self-conceptualization component 2160); obtain a weight of each feature of the set of features according to the pairwise comparison; and obtain the objective function value of each of the set of recipes by using the respective set of feature dimensions, the set of criteria, and the weight as input for an objective function (par. 338 A knowledge base may contain knowledge elements, or concepts. In an aspect, each knowledge element can be associated with two numeric attributes: a suitability (ξ) and an inertia (.Math.) of a knowledge element, or concept; collectively such attributes determine a priority of a concept. A well-defined function, e.g., a weighted sum, a geometric average, of these two numeric attributes can be a concept's situation score (σ). For example, σ=ξ+.Math.. The suitability of a knowledge element can be defined as a relevance of the knowledge element (e.g., concept) to a tool system or a goal component situation at a specific time). As for claim 9, Clark teaches. The system of claim 8, wherein each of the set of recipes is ranked according to the respective objective function value, and wherein the subset of recipes is selected according to smallest objective function value (par. 363 Summary generator 2445 thus generates a vector of components for normal data, whereas surprise score generator 1835 can incorporate, and rank or weight substantially all such differences in components of the vector and compute a net degradation surprise score for the tool system that reflect a health condition of the tool system and reflect how far “away from normal” the tool system is). As for claim 10, Clark teaches. The system of claim 1, wherein to generate the at least one recipe, the one or more processors are configured to: determine, using at least the objective function value and at least one parameter of the subset of recipes associated with the set of criteria as inputs for an optimization function, an adjustment value for the at least one parameter; and generate the at least one recipe including the adjustment value of the at least one parameter (par. 229 The controller can (i) identify process steps producing substrate results outside target specification, (ii) extract data, e.g., workpiece measurement and metrology data, etc., for the out-of-spec process step, emulate the impact of the out-of-spec condition on downstream process steps, (iii) display the data or portions of the data, (iv) optimize process recipe adjustment(s) to the process recipe, including upstream or downstream process adjustments to compensate for the defect, and (v) communicate proposed recipe adjustment(s) for adoption with the process flow to correct for the out-of-spec condition). As for claims 11 and 20, Clark teaches. The system of claim 1, wherein the one or more processors are configured to: determine whether the set of feature dimensions of a recipe satisfies the set of criteria of the scorecard; and responsive to the set of feature dimensions satisfying the set of criteria, provide the recipe for display via the display device (par. 229-230 the scorecard is a set of stored parameters used to determine by the intelligent engine defective profiles by checking critical dimensions CD among other attributes as well). As for claim 12, Clark teaches. The system of claim 11, wherein the one or more processors obtain the objective function value subsequent to determining that the set of feature dimensions of the recipe does not satisfy the set of criteria of the scorecard (par. 229-230 Corrective processing is performed when defective profile is identified, the scorecard is a set of stored parameters used to determine by the intelligent engine defective profiles by checking critical dimensions CD among other attributes as well). Examiner adds a second rejection in an aid to advance prosecution. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhang, Chunlei et al. (US Pub. 2023/0236569 A1), herein referred to as “Chunlei” in view of Dismukes, John P. et al. (US Pub. 2004/0034555 A1), herein referred to as “Dismukes”. As for claims 1, 13 and 19, Zhang teaches. A system and corresponding method of 13 and apparatus of 19, comprising: one or more processors and memory, the one or more processors configured to (par. 60 describes hardware environment for implementing the claimed invention): obtain, based on a scorecard for a set of criteria for fabricating a semiconductor device, a set of recipes stored in a knowledge base (par. 28 a system and method for assessing the condition of one or more chamber components in a process chamber, such as a process chamber for semiconductor processing. Process results of manufacturing processes depend on many factors, including process recipe, tool parameter settings (e.g., including chamber parameter settings and settings for parameters of one or more tools external to a chamber) and chamber component conditions; par. 36 Computer system architecture 100 includes a client device 120, manufacturing equipment 122, substrate measurement system 126, a predictive server 112 (e.g., to generate predictive data, to provide model adaptation, to use a knowledge base, etc.), and a data store 150); obtain a set of feature dimensions associated with the set of recipes (par. 80 controller 283 may further determine the one or more portions of substrate 202 to measure based on one or more operations of the process recipe; par. 98 processing device 322 can receive film thickness profile data (e.g., a wafer map) 336 collected by substrate measurement system 126 after a substrate has been processed in a process chamber. In another example, processing device 322 can receive metrology data collected by other metrology equipment before and/or after the substrate process for the substrate. Metrology data can include a metrology measurement value generated for the substrate by integrated metrology equipment. In some embodiments, processing device 322 can store the received spectral data, film thickness profile data and/or the received metrology data at data store 332.); obtain, using an analytic hierarchy process on the set of feature dimensions, the set of criteria, and weights of the set of criteria, an objective function value of each of the set of recipes (par. 40 Substrate measurement system 126 may be a component of a manufacturing system that can be used to measure substrates before and/or after those substrates are processed in one or more process chambers. The substrate measurement system 126 may be configured to generate optical emission spectroscopy data, reflectometry data, and/or other metrology data. The substrate measurement system 126 can include one or more components configured to collect and/or generate measurement data associated with one or more portions of a profile of a surface of a substrate after the substrate has been removed from a process chamber); select a subset of recipes according to the objective function value of each of the set of recipes; generate at least one recipe according to the selected subset of recipes and the objective function value (par. 123 using a CNN to interact with recipes such as calling upon them, adjusting them and creating new ones from old template recipes); display, via a display device, the generated at least one recipe (par. 43 the manufacturing system user can obtain metrology data for the substrate from substrate measurement system 126 and can provide the metrology data to computer system architecture via a graphical user interface (GUI) of client device 120). Zhang does not specifically in specific great detail teach execute analytic hierarchy process (pairwise); however in the same field of endeavor Dismukes teaches execute an analytic hierarchy process (par. 593-596 “AHP” and also alternatively the use of activity based costing ABC) on the set of feature dimensions, the set of criteria, and weights of the set of criteria (par. 274 The complex manufacturing system as shown in FIG. 7 is a flexible manufacturing cell, which is called cluster tool in semiconductor industry. It consists of 5 unite production processes (UPPs), which are named A, B, C, D, and E respectively); compute responsive to executing the analytic hierarchy process on the set of feature dimensions, the set of criteria an the weights of the set of criteria and objective function value for each set of recipe (par. 274 user is able to rework each step of manufacturing to adjust overall equipment effectiveness (OEE) of the UPPs); Obtain, responsive to execution of an optimization function using the objective function value and at least one parameter of the selected subset of recipes, an adjustment value of the at least one parameter (par. 401 wafer manufacturing in relation to the system analysis for OEE and UPPs to make adjustments to manufacturing process; par. 274 and 280); generate, responsive to obtaining the adjustment value of the at least one parameter at least one recipe comprising the adjustment value of the a least one parameter (par. 280 reworking manufacturing parameters/settings to make adjustments of OEE for the UPPs in create a product such as in par. 401 wafers of semiconductors); Display via a display device the generated at least one recipe and initiate subsequent to generating the at least one recipe a fabrication of the semiconductor device in accordance with the at least one recipe (par. 351; fig. 24 graphical user interface for displaying and interacting with adjusting values and viewing analysis of manufacturing discussed in par. 274,280 and 401-452 (clustering tool in semiconductor manufacturing)). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Dismukes into Zhang because Dismukes in paragraph 25 suggests Following the first publication in 1988 of detailed information on the TPM methodology outside of Japan by Seichi Nakajima [1], manufacturing companies have recognized the importance of the OEE metric, and have begun applying it as part of their overall quality programs to address systematic waste elimination, continuous improvement and optimization of manufacturing processes carried out on individual production equipment. Researchers in the semiconductor chip industry [8-14] have taken the lead in these efforts, in collaboration with International SEMATECH (Austin, Tex.) and the Center for Semiconductor Manufacturing (UC Berkeley, California). Published literature assessments of OEE [11-12, 15-16] indicate some typical, broad ranges of OEE in manufacturing industries, but typically cite only overall OEE numbers, providing little insight into the effect of individual manufacturing variables on the three major efficiency factors of OEE in Equation. Dismukes includes by reference research paper “Using the Analytic Hierarchy Process and multi-objective programming for the selection of cost drivers in activity-based costing” Marc J. Schniederjans a, *, Tim Garvin b,1 1996 Examiner notes that parameters and recipe are arbitrary and would require clarification amendment to overcome; such as how recipe would be related to weights of the AHP. As for claims 2 and 14, Zhang teaches. The system of claim 1, wherein to obtain the set of feature dimensions, the one or more processors are configured to: obtain a set of metrology images associated with the respective set of recipes; and convert the set of metrology images to the respective set of feature dimensions (par. 41 metrology description and use). As for claims 3 and 15, Zhang teaches. The system of claim 1, wherein to obtain the set of feature dimensions, the one or more processors are configured to: obtain a plurality of sets of feature dimensions, each set associated with a recipe of the set of recipes (par. 41 measurement dimension of substrates). As for claim 4, Zhang teaches. The system of claim 1, wherein to obtain the set of recipes, the one or more processors are configured to: execute a semantic search in the knowledge base according to the set of criteria; and receive, responsive to the semantic search, the set of recipes comprising one or more recipes having a set of features satisfying at least one criterion of the set of criteria (neural network called upon such as CNN for manufacturing wafer/semiconductor). As for claims 5 and 15, Zhang teaches. The system of claim 1, wherein the one or more processors are configured to: obtain an identifier associated with the scorecard; store the identifier in the knowledge base; and obtain the set of recipes associated with the identifier (par. 60 System controller 228 can execute instructions to perform any one or more of the methodologies and/or embodiments described herein. In some embodiments, system controller 228 can execute instructions to perform one or more operations at manufacturing system 200 in accordance with a process recipe. The instructions can be stored on a computer readable storage medium, which can include the main memory, static memory, secondary storage and/or processing device (during execution of the instructions). As for claims 6 and 17, Zhang teaches. The system of claim 5, wherein the one or more processors are configured to: store at least one of a set of metrology images, the set of feature dimensions, the subset of recipes, or the at least one recipe in association with the identifier (par. 41 metrology description and use). As for claim 7, Zhang teaches. The system of claim 1, wherein a set of metrology images corresponds to scanning electron microscopy (SEM) images (par. 62 FIG. 2B illustrates one embodiment of a substrate measurement system 251 that may be used to measure processed substrates. Substrate measurement system 251 may be an integrated measurement and/or imaging system (e.g., integrated reflectometry (IR) system) configured for measuring film properties (e.g., such as thickness) across a surface of a substrate 264 after the substrate 264 is processed in a processing chamber. Par. 41 metrology description and use). As for claims 8 and 18, Zhang teaches. The system of claim 1, wherein to use the analytic hierarchy process, the one or more processors are configured to: perform a pairwise comparison between a set of features associated with the set of feature dimensions and the set of criteria; obtain a weight of each feature of the set of features according to the pairwise comparison; and obtain the objective function value of each of the set of recipes by using the respective set of feature dimensions, the set of criteria, and the weight as input for an objective function (par. 30 The thickness information and/or feature information may be used to generate a thickness profile map for the substrate. Alternatively, one or more other profile map (e.g., of optical constants, or roughness, of particle counts, etc.) of the substrate may be generated from other measurement data. In an example, if the substrate includes a stack of patterned layers, then the profile map may include a critical dimensions profile map. The film and/or feature thickness information (e.g., thickness profile map) or other film and/or feature information (e.g., other profile maps such as an optical constant profile map, a particle count profile map, critical dimensions profile map, etc.) may then be processed using a model (e.g., a trained machine learning model, a physics-based model, a statistical model, etc.) and/or image processing to identify variations in the film property or properties and to determine information about one or more chamber components of the process chamber based on the identified property variations (e.g., such as film thickness variations, critical dimensions variations, etc.). Embodiments are discussed with reference to measuring a film on a substrate. However, it should be understood that the embodiments also apply to measuring one or more features (e.g., critical dimensions) on a substrate in addition to or instead of measuring a film on the substrate) As for claim 9, Zhang teaches. The system of claim 8, wherein each of the set of recipes is ranked according to the respective objective function value, and wherein the subset of recipes is selected according to smallest objective function value (par. 114 ranking through weights across network of all layers and nodes; par. 117 An artificial neural network includes an input layer that consists of values in a data point. The next layer is called a hidden layer, and nodes at the hidden layer each receive one or more of the input values. Each node contains parameters (e.g., weights) to apply to the input values. Each node therefore essentially inputs the input values into a multivariate function (e.g., a non-linear mathematical transformation) to produce an output value.). As for claim 10, Zhang teaches. The system of claim 1, wherein to generate the at least one recipe, the one or more processors are configured to: determine, using at least the objective function value and at least one parameter of the subset of recipes associated with the set of criteria as inputs for an optimization function, an adjustment value for the at least one parameter; and generate the at least one recipe including the adjustment value of the at least one parameter (par. 30 generate a profile map). As for claims 11 and 20, Zhang. The system of claim 1, wherein the one or more processors are configured to: determine whether the set of feature dimensions of a recipe satisfies the set of criteria of the scorecard; and responsive to the set of feature dimensions satisfying the set of criteria, provide the recipe for display via the display device (par. 29-30 critical dimensions). As for claim 12, Zhang teaches. The system of claim 11, wherein the one or more processors obtain the objective function value subsequent to determining that the set of feature dimensions of the recipe does not satisfy the set of criteria of the scorecard (par. 29-30 critical dimensions). (Note:) It is noted that any citation to specific, pages, columns, lines, or figures in the prior art references and any interpretation of the references should not be considered to be limiting in any way. A reference is relevant for all it contains and may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art. In re Heck, 699 F.2d 1331, 1332-33, 216 USPQ 1038, 1039 (Fed. Cir. 1983) (quoting In re Lemelson, 397 F.2d 1006,1009, 158 USPQ 275, 277 (CCPA 1968)). Response to Arguments Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Inquires Any inquiry concerning this communication should be directed to NICHOLAS AUGUSTINE at telephone number (571)270-1056. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. PNG media_image1.png 213 559 media_image1.png Greyscale /NICHOLAS AUGUSTINE/Primary Examiner, Art Unit 2178 May 6, 2026
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Prosecution Timeline

Nov 13, 2023
Application Filed
Jan 14, 2026
Non-Final Rejection mailed — §103
Feb 24, 2026
Applicant Interview (Telephonic)
Feb 24, 2026
Examiner Interview Summary
Mar 13, 2026
Response Filed
May 08, 2026
Final Rejection mailed — §103
Jun 25, 2026
Response after Non-Final Action

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Prosecution Projections

2-3
Expected OA Rounds
73%
Grant Probability
99%
With Interview (+27.7%)
3y 8m (~11m remaining)
Median Time to Grant
Moderate
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