DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, Claims 1-19 in the reply filed on 5/27/2026 is acknowledged.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55, which papers have been placed of record in the file.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/14/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The drawings were received on 11/14/2023. These drawings are considered acceptable by Examiner.
America Invents Act
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
1. Claim(s) 1-3, 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jeong et al., (U.S. Pub. No. 2018/0358584 A1).
Regarding Claim 1, Jeong et al., teaches a display panel comprising: a base layer (100, substrate, ¶ [0040]-¶ [0060]; see at least Fig. 6); an anode (210R, a first pixel electrode) disposed on the base layer (100); a pixel-definition layer (180) defining a light emitting opening which exposes a portion of the anode (210R, pixel defining layer), and disposed on the base layer (100); a first partition wall (510 + part of 220R) defining a first partition-wall opening therein overlapping the light emitting opening in a plan view, and disposed on the pixel- definition layer (180); a second partition wall defining a second partition-wall opening therein overlapping the first partition-wall opening in the plan view, and disposed on the first partition wall (510 + part of 220R); a cathode having at least a portion thereof disposed in the first partition-wall opening, being in contact with the first partition wall (510 + part of 220R), and disposed on the anode (210R); and a light emitting pattern disposed between the anode (210R) and the cathode, wherein: the first partition wall (510 + part of 220R) includes a conductive material (via 220R); and the second partition wall (part of 220R + 230R) includes: a first upper layer (part of 220R) including an inorganic material; and a second upper layer (230R) including a conductive material, and disposed on the first upper layer (part of 220R). Examiner notes that the element cited as 220R is comprised of multiple layers: may include a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer that are stacked in a single layer structure or a composite structure as referenced in ¶ [0074].
Regarding Claim 2, Jeong et al., teaches the display panel of claim 1, wherein the first upper layer (part of 220R) comprises at least one of silicon nitride, silicon oxide, silicon oxynitride, or aluminum oxide (ETL, electron transfer layer, ¶ [0074]).
Regarding Claim 3, Jeong et al., teaches the display panel of claim 1, wherein the second upper layer (230R, metal) comprises at least one of a metal or a metal nitride.
Regarding Claim 19, Jeong et al., teaches the display panel of claim 1, wherein a bias voltage is configured to be applied to the first partition wall (510+220R).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
2. Claim(s) 4-5 are rejected under 35 U.S.C. 103 as being obvious over Jeong et al., (U.S. Pub. No. 2018/0358584 A1).
Regarding Claim 4, Jeong et al., teaches the invention set forth above (see rejection in Claim 1 above). Jeong et al., fails to teach the second upper layer comprises at least one of tungsten, molybdenum, titanium nitride, or aluminum nitride.
However, Examiner takes official notice that employing a second upper layer comprising of at least one of tungsten, molybdenum, titanium nitride, or aluminum nitride is standard in production and employing such a material is well-known in the art of cathodes. This simple modification is predictable to one of ordinary skill in the art and is expected to produce predictable results thereof.
Therefore, Examiner reasonably contemplates it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the second electrode in the device of Jeong et al., in order to provide a material that facilitates cathodic functions properly.
Furthermore, one of ordinary skill in the art would have been led to using these particular materials for the second electrode as a matter of choice. Applicant(s) has not disclosed that the materials is for a particular unobvious purpose, produce an unexpected or significant result, or are otherwise critical and it appears prima facie that the process would possess utility using another configuration (In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966)).
Regarding Claim 5, Jeong et al., teaches the invention set forth above (see rejection in the corresponding claim(s) above). Jeong et al., is silent regarding a dummy pattern.
However, Examiner reasonably contemplates it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to add a first dummy pattern disposed on the second partition wall, wherein the first dummy pattern includes: a 1-1 dummy layer spaced apart from the light emitting pattern, and including a same material as a material of the light emitting pattern; and a 1-2 dummy layer spaced apart from the cathode, and including a same material as a material of the cathode, in the device of Jeong et al., in order to improve refresh rates of the display device during operation.
Allowable Subject Matter
A. Claim(s) 6-18 are objected as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims
The following is an examiner's statement of reasons for allowance:
The prior art of record (most comprehensive prior art of record to Jeong et al.,) suggests a display panel comprising: a base layer; an anode disposed on the base layer; a pixel-definition layer defining a light emitting opening which exposes a portion of the anode, and disposed on the base layer; a first partition wall defining a first partition-wall opening therein overlapping the light emitting opening in a plan view, and disposed on the pixel- definition layer; a second partition wall defining a second partition-wall opening therein overlapping the first partition-wall opening in the plan view, and disposed on the first partition wall; a cathode having at least a portion thereof disposed in the first partition-wall opening, being in contact with the first partition wall, and disposed on the anode; and a light emitting pattern disposed between the anode and the cathode, wherein: the first partition wall includes a conductive material; and the second partition wall includes: a first upper layer including an inorganic material; and a second upper layer including a conductive material, and disposed on the first upper layer.
However, the prior art of record neither anticipates nor renders obvious to one ordinary skilled in the art the display device comprising the various elements as claimed above in combination with the specific limitation of the first upper layer comprises a first upper inner surface defining a first upper region of the second partition-wall opening; and the second upper layer comprises a second upper inner surface defining a second upper region of the second partition-wall opening, wherein the first upper inner surface is recessed in a direction farther away from the light emitting opening than the second upper inner surface as set forth in Claim 6.
Claim(s) 7-18 are allowable because of their dependency status from Claim 6.
Other Prior Art Cited
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
U.S. Pub. No. 2020/0403180 teaches a display device with a second partition wall.
Examiner's Note
The Examiner cites particular figures, paragraphs, columns and line numbers in the reference(s), as applied to the claims above. Although the particular citations are representative teachings and are applied to specific limitations within the claims, other passages, internally cited references, and figures may also apply. In preparing a response, it is respectfully requested that the Applicant fully consider the references, in their entirety, as potentially disclosing or teaching all or part of the claimed invention, as well as fully consider the context of the passage as taught by the reference(s) or as disclosed by the Examiner.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Examiner H. Featherly whose telephone number is 571-272-8654. The examiner can normally be reached on M-F 9 AM-4 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James Greece can be reached on 571-272-3711.
The fax phone number for the organization where this application or proceeding is assigned is 571-272-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only.
For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/H. Featherly/
Examiner Featherly
Art Unit 2875 Patent Examiner
/JAMES R GREECE/ Supervisory Patent Examiner, Art Unit 2875
Prosecution Insights