DETAILED ACTION
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/20/2023 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 6-7, 12-13, 16, 18-19 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Cok (US 20190333901 A1).
Re: Claim 1, Cok discloses a driving panel (Fig. 1A), comprising:
a substrate (substrate 10), comprising a display area (grid area represented by column lines 16 and row lines 12, row connection lines 13, and pixels 40) and a non-display area (non-grid area represented by circuit connection);
column scanning lines (column lines 16), disposed in the display area of the substrate;
row scanning lines (row lines 12), disposed in the display area of the substrate and staggered with the column scanning lines (row and column lines 12 and 16 alternately disposed);
signal connecting lines (lines connecting to row and column driver circuits, Fig. 1A), disposed in the display area of the substrate and electrically connected to the row scanning lines;
a drive circuit (column driver 26, row driver 22, Fig. 1A), disposed in the non-display area of the substrate and electrically connected to the column scanning lines and the signal connecting lines;
first electrode pads (intersecting column lines 16 and pixels 40, Fig.1C), disposed in the display area of the substrate and electrically connected to the column scanning lines (Fig. 1C); and
second electrode pads (intersecting row lines 12 and pixels 40, Fig. 1C), disposed in the display area of the substrate and electrically connected to the row scanning lines (Fig. 1C) and the signal connecting lines (Fig. 1A).
Re: Claim 6, Cok discloses all the limitation of claim 1 on which this claim depends. Cok further discloses the column scanning lines are in parallel with the signal connecting lines (Fig. 1A), and the column scanning lines and the signal connecting lines are perpendicular to the row scanning lines (Fig. 1A).
Re: Claim 7, Cok discloses all the limitation of claim 1 on which this claim depends. Cok further discloses every two adjacent signal connecting lines of the signal connecting lines are provided one column scanning line therebetween, and every two adjacent column scanning lines of the column scanning lines are provided one signal connecting line therebetween (Fig. 1A).
Re: Claim 12, Cok discloses all the limitation of claim 1 on which this claim depends. Cok further discloses the driving panel comprising fan-out lines, wherein the fan-out lines are disposed in the non-display area, the column scanning lines and the signal connecting lines are connected to the drive circuit through the fan-out lines, and the row scanning lines are connected to the drive circuit through the signal connecting lines and the fan-out lines (Fig. 1A).
Re: Claim 13, Cok discloses a display device (Fig. 1A), comprising:
the driving panel according to claim 1; and
light emitting devices (pixels 40), disposed on the driving panel, wherein the light emitting devices comprise first electrodes and second electrodes (black dots on pixels 40 intersecting row lines 12 and columns lines 16, Fig. 1C), the first electrodes are electrically connected to the first electrode pads of the driving panel, and the second electrodes are electrically connected to the second electrode pads of the driving panel (Fig. 1A).
Re: Claim 16, Cok discloses all the limitation of claim 13 on which this claim depends. Cok further discloses each of the light emitting devices is a micron light emitting diode (micro-LED) or a submillimeter LED (mini-LED) (pixels are of micro-light-emitting diodes, ¶ [0048]).
Re: Claim 18, Cok discloses all the limitation of claim 13 on which this claim depends. Cok further discloses the display device is a passive matrix (PM) display device (passive-matrix display 99, Fig. 1A, ¶ [0091], and the driving panel is a passive driving panel (passive matrix control of micro-iLEDs, ¶ [0107]).
Re: Claim 19, Cok discloses passive driving panel (passive-matrix display 99, Fig. 1A), comprising:
a substrate (substrate 10, Fig. 1A), comprising a display area (area comprising row lines 12, column lines 16, row connection lines 13, and pixels 40) and a non-display area adjacent to the display area (area consisting circuit connections at the bottom of Fig. 1A);
column scanning lines (columns lines 16, Fig. 1A), disposed in the display area of the substrate (Fig. 1A);
row scanning lines (row lines 12, Fig. 1A), disposed in the display area of the substrate, wherein the row scanning lines are staggered with the column scanning lines and are perpendicular to the column scanning lines (Fig. 1A);
signal connecting lines (row connection lines 13, Fig, 1A), disposed in the display area of the substrate and electrically connected to the row scanning lines (black dots in Fig. 1A is electrically connected as described in ¶ [0053]);
a drive circuit (fan-out circuit connection at bottom of Fig. 1A), disposed in the non-display area of the substrate (Fig. 1A) and electrically connected to the column scanning lines and the signal connecting lines (Fig. 1A), wherein the row scanning lines are electrically connected to the drive circuit through the signal connecting lines (black dots indicating electrical connection between intersecting lines);
first electrode pads (intersecting dots of column lines 16 and pixels 40 in Fig. 1B), disposed in the display area of the substrate and electrically connected to the column scanning lines (intersecting dot marked as black dot indicating electrical connection); and
second electrode pads (intersecting dots of row lines 12 and pixels 40 in Fig. 1B), disposed in the display area of the substrate and electrically connected to the row scanning lines (black dots in Fig. 11A indicating electrical connection between intersecting lines) and the signal connecting lines (daisy chain connection since row connection lines 13 is electrically connected to row lines 12).
Claim Rejections - 35 USC § 103
The following is a quotation of AIA 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 9, 14 are rejected under AIA 35 U.S.C. 103 as being unpatentable over Cok (US 20190333901 A1) in view of Xu (US 20170069280 A1).
Re: Claim 2, Cok discloses all limitation of claim 1 on which this claim depends. Cok is silent regarding the first insulating layer covers the row scanning lines and disposed between the row scanning lines and the signal connecting lines, the first insulating layer is provided with first vias, and the row scanning lines are electrically connected to the signal connecting lines through the first vias.
Xu discloses a driving panel (Fig. 2) comprising row scanning lines (gate lines 20), signal connecting lines (gate line leads 21), column scanning lines (data lines 10, and pixels (pixels 40). Xu discloses a gate insulating layer between signal scanning lines (gate line lead 21) layer and row scanning lines (gate lines 20) layer wherein through holes penetrating the insulating layer in between to connect the gate line lead 21 and gate lines 20 as indicated by the black dots in Fig. 2 (¶ [0042]); furthermore, signal scanning lines (gate line lead 21) and column scanning lines (data lines 10) are disposed in different layers (¶ [0042]). This results in each set of the above lines are distributed in different layer and there is an insulation layer between the row scanning lines layer and the signal connecting lines layer to provide the via holes through.
Cok discloses the passive matrix driving panel with components disposed in a single layer. Xu discloses the active matrix driving panel with components disposed in different layers and electrically connected with each other via through holes penetrating the insulating layer in between. Ordinarily skilled artisans would have substituted one design for the other to crosstalk prevention and component protection.
It would have been obvious to one of ordinary skill in the art before the filing date of the invention to substitute the multilayer driving panel of Xu for the driving panel taught by Cok to achieve the crosstalk prevention and layer protection.
Re: Claim 9, Cok discloses all limitation of claim 1 on which this claim depends. Cok is silent regarding the signal connecting lines and the column scanning lines are disposed in different layers of the driving panel.
Xu discloses a driving panel (Fig. 2) wherein the signal connecting lines (21, Fig. 3) and the column scanning lines (10, Fig. 2) are disposed in different layers of the driving panel (¶ [0042]).
Ordinarily skilled artisan would have substituted the multilayer structure of Xu for the single layer interconnection of Cok to avoid crosstalk between signal lines.
It would have been obvious to one of ordinary skill in the art before the filing date of the invention to substitute the multilayer panel of Xu for the single layer panel taught by Cok to achieve crosstalk prevention.
Re: Claim 14, Cok discloses all limitation of claim 1 on which this claim depends. Cok is silent regarding the first insulating layer covers the row scanning lines and disposed between the row scanning lines and the signal connecting lines, the first insulating layer is provided with first vias, and the row scanning lines are electrically connected to the signal connecting lines through the first vias.
Xu discloses a driving panel (Fig. 2) wherein each of the signal connecting lines (21, Fig. 3), column scanning lines (10, Fig. 3), and row scanning lines (20, Fig. 3) are disposed on different layers on the substrate (¶ [0042]); furthermore, row scanning lines are connected to signal scanning lines through via holes penetrating the in-between insulation layer. Ordinarily skilled artisans would have substituted the multilayer panel of Xu for the single layer panel of Cok to avoid crosstalk between adjacent signal lines.
It would have been obvious to one of ordinary skill in the art before the filing date of the invention to adopt the multilayer panel of Xu to the single layer panel of Cok for the purpose of alleviating the crosstalk between adjacent signal lines.
Claims 17 is rejected under AIA 35 U.S.C. 103 as being unpatentable over Cok (US 20190333901 A1) in view of Fu (US 20200251539 A1).
Re: Claim 17, Cok discloses all limitations of claim 13 on which this claim depends. Cok is silent regarding an encapsulation layer covering the light emitting device and the driving panel.
Fu discloses a driving panel (cross-sectional panel, Fig. 15) incorporating the encapsulation (220, Fig. 14) covering the light-emitting functional portion (130, Fig. 14) and transparent carrier substrate (170, Fig. 17) so as to seal the light emitting functional portion from environmental elements (¶ [0123]). Ordinarily skilled artisans would have added the encapsulation layer of Fu to the panel of Cok to achieve the light emitting elements functional portion and overall panel protection.
It would have been obvious to one of ordinary skill in the art before the filing date of the invention to adopt the encapsulation of Fu to the panel of Cok to achieve the sealing protection of the panel components.
Claims 20 is rejected under AIA 35 U.S.C. 103 as being unpatentable over Cok (US 20190333901 A1) in view of Huang (US 20200335030 A1).
Re: Claim 20, Cok discloses all limitations of claim 19 on which this claim depends. Cok is silent regarding the binding surfaces of the electrode pads are leveling from the substrate.
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Huang discloses a driving panel (Fig. 2) wherein the micro-led has the first and second electrode pads and each electrode pad has a binding surface. Both binding surfaces are leveling from the substrate, forming a planar surface for even placement of micro-leds onto the display panel (see the above reproduced and annotated Fig. 3, hereinafter, Fig. 3).
Ordinarily skilled artisans would have adopted the micro-led layout of Huang to the panel structure of Cok to achieve the surface leveling for light emitting device installation.
It would have been obvious to one of ordinary skill in the art before the filing date of the invention to adopt the light emitting device layout of Huang to the panel of Cok to improve the planar surface of the display.
Claims 8 is rejected under AIA 35 U.S.C. 103 as being unpatentable over Cok (US 20190333901 A1) in view of Jo (US 20210287606 A1).
Re: Claim 8, Cok discloses all limitations of claim 1 on which this claim depends. Cok is silent regarding every two adjacent signal connecting lines of the signal connecting lines are provided with three column scanning lines therebetween.
Jo discloses a driving panel (Fig. 3) where in every two adjacent signal connecting lines (VDL, Fig. 3) are disposed with three column scanning lines (DL1, DL2, DL3, Fig. 3). Ordinarily skilled artisans would have modified the signal connecting lines and column scanning line ratio from 1:1 to 1:3 for panel design flexibilities.
It would have been obvious to one of ordinary skill in the art before the filing date of the invention to modify the signal connecting lines and column scanning lines ratio to achieve predictable solutions for panel design flexibilities.
Claims 15 is rejected under AIA 35 U.S.C. 103 as being unpatentable over Cok (US 20190333901 A1) in view of Xu (US 20170069280 A1) and further in view of Hu (US 20210183833 A1).
Re: Claim 15, Cok in view of Xu discloses all limitations of claim 14 on which this claim depends. Cok further discloses the row scanning lines and the column scanning lines are staggered with each other to form pixel units (Fig. 1A) therebetween; the light emitting devices are disposed in the pixel (Fig. 1A) units and form sub-pixels (Fig. 1B);
Cox in view of Xu is silent regarding a projection area of each of the first vias on the substrate is equal to a projection area of at least one of the sub-pixels on the substrate.
Jo discloses a passive matrix electronic device (Fig. 6) wherein each projection area of each via (210, Fig. 6) is equal to the projection area of at least one of the subpixels (104a, or 104b, or 104c, Fig. 6). Ordinary skilled artisan would have increased the size of the via to at least the size of one of the subpixels to improve circuitry connectivity of the driving panel.
It would have been obvious to one of ordinary skill in the art before the filing date of the invention to modify the panel of Cok to have the optimal via size taught by Jo to achieve the stability of circuitry connection.
Claims 3, 5, 11 are rejected under AIA 35 U.S.C. 103 as being unpatentable over Cok (US 20190333901 A1) in view of Xu (US 20170069280 A1) and further in view of Huang (US 20200335030 A1).
Re: Claim 3, Cok in view of Xu discloses all limitation of claim 2 on which this claim depends. Cok in view of Xu is silent regarding the second insulating layer covers the signal connecting lines and the first insulating layer; the second insulating layer is disposed between the second electrode pads and the signal connecting lines, and also disposed between the first insulating layer and the column scanning lines; and the second insulating layer is provided with second vias, and the second electrode pads are electrically connected to the signal connecting lines through the second vias.
Cok in view of Xu discloses all the lines are disposed in different layer and where there is the connection between the two layers, an insulating layer is provided in between for via holes connections. Cok in view of Xu is silent regarding a second insulating covering the other insulating layer and provide the via holes to connect the first and second electrode pads to the associated layers.
Huang discloses a passive matrix driving panel (Fig. 2) comprising row scanning lines (second electrode of row switch RSW, Fig. 2) and column scanning lines (second electrode of column switch CSW, Fig.2) driving the micro led L. Huang also the contact pads of the anode and cathode electrodes of the led L (Fig. 3) wherein the anode pads connecting to metal layer M2 and cathode pads connecting to metal layer M3. Metal layers M2 and M3 can be construed as the column scanning lines layer and the row scanning lines layer, respectively (as described in ¶ [0031], M2 and M3 serve as intermediate layers of second end of column switch CSW and second end of row switch RSW). The second insulating layer (I4 and I5, Fig. 3) provides vias connecting the first electrode pad (anode pad) with the column scanning layer (M2, Fig.3) and the second electrode pad (cathode pad) with the row scanning layer (M3, Fig. 3).
Ordinarily skilled artisans would have substituted the interconnection of the micro-led of Huang for the interconnection of the led in the driving panel taught by Cok in view of Xu for the purpose of ensuring each conductive layer is isolated for electromagnetic interference protection.
It would have been obvious to one of ordinary skill in the art before the filing date of the invention to substitute the led interconnection of Huang for the led interconnection of Cok modified by Xu to achieve the electromagnetic interference protection between the display components.
Cok’s driving pane modified by Xu and Huang would have each conductive lines in each layer, the first insulating layer between signal connecting lines layer and row scanning line layer, the second insulation layer between the led electrode pads and the column scanning lines layer, the second insulation layer also between electrode pads and the column scanning lines layer. The second insulation layer would cover layers on each side and provide vias to connect pads to column scanning lines and row scanning lines. Provided that Cok in view of Xu discloses the insulation layer between the column scanning layer and the row scanning layer forming the vias to connecting the two set of lines in each layer, ordinarily skilled artisans would have combined the two vias daisy chaining the connection from the cathode pads to the signal connecting layer to form the shortest path to improve circuit connectivity. It would have been obvious to one of ordinary skill in the art before the filing date of the invention to arrange the vias of the first and second insulating layers coincidently for the shortest path through routine optimization. MPEP 2144.05.
Re: Claim 5, Cok in view of Xu discloses all the limitation of claim 2 on which this claim depends. Cok in view of Xu is silent regarding each of the first electrode pads has a first binding surface, and each of the second electrode pads has a second binding surface; the first binding surface and the second binding surface are individually disposed at a side of the planarization layer facing away from the substrate; and a minimum distance between the first binding surface and the substrate is equal to a minimum distance between the second binding surface and the substrate.
Huang discloses a driving panel (Fig. 2) wherein the first and second electrode pads of the micro led L1, L2 (Fig. 3) having the binding surfaces (the planar surfaces on top of the pads, Fig. 3) the planar surfaces of both pads are at the same height from the substrate, achieving the level surface of the display panel.
It would have been obvious to one of ordinary skill in the art before the filing date of the invention to adopt the leveling binding surfaces of both the electrode pads of Huang to the driving panel of Cok modified by Xu to achieve the planar surface of the display panel.
Re: Claim 11, Cok discloses all limitation of claim 1 on which this claim depends. Coks is silent regarding all components of the driving panel are disposed on different layers on the substrate.
Xu discloses the driving panel (Fig. 2) where signal driving lines (21, Fig. 2), column scanning lines (10, Fig. 2), row scanning lines (20, Fig. 2) are disposed on different layers (¶ [0042]) and row scanning lines and signal scanning lines are connected thru via holes penetrating the in-between insulation layer. Ordinarily skilled artisans would have substituted the multiplayer of the panel for the single layer panel for crosstalk prevention.
It would have been obvious to one of ordinary skill in the art before the filing date of the invention to substitute the multilayer panel of Xu for the single layer panel of Cok to achieve crosstalk alleviation.
Cok in view of Xu does not disclose the electrode pads of the led are disposed in a different layer than the rest of the panel component.
Huang discloses a driving panel (Fig. 2) wherein the electrode pads (pads connected to L1, L2, Fig. 3), column scanning lines (M2 is construed as the column scanning lines as it connects to the second end of column switch in Fig. 2, ¶ [0031]), and row scanning line (M3 is construed as the row scanning line as it connects to the second end of the row switch in Fig. 2, ¶ [0031]). Ordinarily skilled artisans would have combined the disclosure of Huang with the disclosure of Xu to apply to the driving panel of Cok to achieve the crosstalk alleviation to the display panel.
It would have been obvious to one of ordinary skill in the art before the filling date of the invention to adopt the multilayer interconnection as disclosed in Xu and Huang to the single layer panel of Cok to isolate components from crosstalk.
Claims 4 is rejected under AIA 35 U.S.C. 103 as being unpatentable over Cok (US 20190333901 A1) in view of Xu (US 20170069280 A1), Huang (US 20200335030 A1) and further in view of Fu (US 20200251539 A1).
Re: Claim 4, Cok in view of Xu and Huang discloses all limitation of claim 3 on which this claim depends. Cok in view of Xu and Huang is silent regarding a planarization layer, wherein the planarization layer covers the second insulating layer and the column scanning lines, and the first electrode pads penetrate through the planarization layer and are electrically connected to the column scanning lines.
Fu discloses a display panel (Fig. 2) incorporating planarization layer 128 (Fig. 3) between light emitting elements 140, 150 and the interconnection structure (vias, transistor, Fig. 3) providing vias to connect the light elements and the underneath structure. The planarization layer functions to achieve a flat and even surface for the light elements’ overlay. Ordinarily skilled artisans would have employed the planarization of Fu to a multilayer structure to achieve a planar surface for light elements installation.
It would have been obvious to one of ordinary skill in the art before the filing date of the invention to employ the planarization of Fu to the multilayer interconnection structure of Cok’s modified driving panel in order to achieve the planar surface for the light element’s installation.
Prior art made of record and not relied upon are considered pertinent to current application disclosure.
Kim (US 10573626 B1) and Jeon (US 20160035307 A1) disclose a LED display device.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DZUNG T HOANG whose telephone number is (571)272-5622. The examiner can normally be reached M-F 8:00 - 5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at 571-272-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DTH/Examiner, Art Unit 2898
/Leonard Chang/Supervisory Patent Examiner, Art Unit 2898